From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:52284) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qx4rU-00044e-Jp for qemu-devel@nongnu.org; Fri, 26 Aug 2011 18:26:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Qx4rT-0003Tv-3D for qemu-devel@nongnu.org; Fri, 26 Aug 2011 18:26:52 -0400 Received: from fmmailgate03.web.de ([217.72.192.234]:44370) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Qx4rS-0003QP-Fv for qemu-devel@nongnu.org; Fri, 26 Aug 2011 18:26:51 -0400 Message-ID: <4E581DA4.1090501@web.de> Date: Sat, 27 Aug 2011 00:26:44 +0200 From: Jan Kiszka MIME-Version: 1.0 References: <1314389053-30841-1-git-send-email-lmr@redhat.com> In-Reply-To: <1314389053-30841-1-git-send-email-lmr@redhat.com> Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="------------enig03F529C17F6727C2DCB44AA2" Sender: jan.kiszka@web.de Subject: Re: [Qemu-devel] [PATCH] hw: Add test device for unittests execution List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Lucas Meneghel Rodrigues Cc: Avi Kivity , Marcelo Tosatti , qemu-devel@nongnu.org, Gerd Hoffmann This is an OpenPGP/MIME signed message (RFC 2440 and 3156) --------------enig03F529C17F6727C2DCB44AA2 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable On 2011-08-26 22:04, Lucas Meneghel Rodrigues wrote: > Add a test device which supports the kvmctl ioports, > for running the KVM test suite. This is a straight > port from the latest version of the test device present > on qemu-kvm, using the APIs currently in use by qemu. >=20 > With this we aim for daily execution of > the KVM unittests to capture any problems with the > KVM interface. In principle this works with TCG as well. >=20 > Usage: >=20 > qemu > -chardev file,path=3D/log/file/some/where,id=3Dtestlog > -device testdev,chardev=3Dtestlog >=20 > Signed-off-by: Gerd Hoffmann > Signed-off-by: Avi Kivity > Signed-off-by: Marcelo Tosatti > Signed-off-by: Lucas Meneghel Rodrigues > --- > Makefile.target | 1 + > hw/testdev.c | 140 +++++++++++++++++++++++++++++++++++++++++++++++= ++++++++ > 2 files changed, 141 insertions(+), 0 deletions(-) > create mode 100644 hw/testdev.c >=20 > diff --git a/Makefile.target b/Makefile.target > index e280bf6..e095dd5 100644 > --- a/Makefile.target > +++ b/Makefile.target > @@ -232,6 +232,7 @@ obj-i386-y +=3D debugcon.o multiboot.o > obj-i386-y +=3D pc_piix.o > obj-i386-$(CONFIG_KVM) +=3D kvmclock.o > obj-i386-$(CONFIG_SPICE) +=3D qxl.o qxl-logger.o qxl-render.o > +obj-i386-y +=3D testdev.o The name testdev is a bit too generic for this thing in its current form. I would suggest x86-testdev or pc-testdev - or a generalization that allows a PIO-free registration against the system bus. > =20 > # shared objects > obj-ppc-y =3D ppc.o > diff --git a/hw/testdev.c b/hw/testdev.c > new file mode 100644 > index 0000000..e38c20e > --- /dev/null > +++ b/hw/testdev.c > @@ -0,0 +1,140 @@ > +#include > +#include "hw.h" > +#include "qdev.h" > +#include "isa.h" > + > +struct testdev { > + ISADevice dev; > + CharDriverState *chr; > +}; > + > +static void test_device_serial_write(void *opaque, uint32_t addr, uint= 32_t data) > +{ > + struct testdev *dev =3D opaque; > + uint8_t buf[1] =3D { data }; > + > + if (dev->chr) { > + qemu_chr_fe_write(dev->chr, buf, 1); > + } > +} > + > +static void test_device_exit(void *opaque, uint32_t addr, uint32_t dat= a) > +{ > + exit(data); > +} > + > +static uint32_t test_device_memsize_read(void *opaque, uint32_t addr) > +{ > + return ram_size; > +} > + > +static void test_device_irq_line(void *opaque, uint32_t addr, uint32_t= data) > +{ > + qemu_set_irq(isa_get_irq(addr - 0x2000), !!data); Note that qemu-kvm retrieves (due to a hack) GSIs via isa_get_irq while QEMU is and will remain confined to true ISA IRQs, thus provides no access to IRQs 16-23. May break existing tests. So we likely have to introduce a cleaner interface now if GSI is what you need here. > +} > + > +static uint32 test_device_ioport_data; > + > +static void test_device_ioport_write(void *opaque, uint32_t addr, uint= 32_t data) > +{ > + test_device_ioport_data =3D data; > +} > + > +static uint32_t test_device_ioport_read(void *opaque, uint32_t addr) > +{ > + return test_device_ioport_data; > +} > + > +static void test_device_flush_page(void *opaque, uint32_t addr, uint32= _t data) > +{ > + target_phys_addr_t len =3D 4096; > + void *a =3D cpu_physical_memory_map(data & ~0xffful, &len, 0); > + > + mprotect(a, 4096, PROT_NONE); > + mprotect(a, 4096, PROT_READ|PROT_WRITE); > + cpu_physical_memory_unmap(a, len, 0, 0); > +} > + > +static char *iomem_buf; > + > +static uint32_t test_iomem_readb(void *opaque, target_phys_addr_t addr= ) > +{ > + return iomem_buf[addr]; > +} > + > +static uint32_t test_iomem_readw(void *opaque, target_phys_addr_t addr= ) > +{ > + return *(uint16_t*)(iomem_buf + addr); > +} > + > +static uint32_t test_iomem_readl(void *opaque, target_phys_addr_t addr= ) > +{ > + return *(uint32_t*)(iomem_buf + addr); > +} > + > +static void test_iomem_writeb(void *opaque, target_phys_addr_t addr, u= int32_t val) > +{ > + iomem_buf[addr] =3D val; > +} > + > +static void test_iomem_writew(void *opaque, target_phys_addr_t addr, u= int32_t val) > +{ > + *(uint16_t*)(iomem_buf + addr) =3D val; > +} > + > +static void test_iomem_writel(void *opaque, target_phys_addr_t addr, u= int32_t val) > +{ > + *(uint32_t*)(iomem_buf + addr) =3D val; > +} > + > +static CPUReadMemoryFunc * const test_iomem_read[3] =3D { > + test_iomem_readb, > + test_iomem_readw, > + test_iomem_readl, > +}; > + > +static CPUWriteMemoryFunc * const test_iomem_write[3] =3D { > + test_iomem_writeb, > + test_iomem_writew, > + test_iomem_writel, > +}; > + > +static int init_test_device(ISADevice *isa) > +{ > + struct testdev *dev =3D DO_UPCAST(struct testdev, dev, isa); > + int iomem; > + > + register_ioport_write(0xf1, 1, 1, test_device_serial_write, dev); > + register_ioport_write(0xf4, 1, 4, test_device_exit, dev); > + register_ioport_read(0xd1, 1, 4, test_device_memsize_read, dev); > + register_ioport_read(0xe0, 1, 1, test_device_ioport_read, dev); > + register_ioport_write(0xe0, 1, 1, test_device_ioport_write, dev); > + register_ioport_read(0xe0, 1, 2, test_device_ioport_read, dev); > + register_ioport_write(0xe0, 1, 2, test_device_ioport_write, dev); > + register_ioport_read(0xe0, 1, 4, test_device_ioport_read, dev); > + register_ioport_write(0xe0, 1, 4, test_device_ioport_write, dev); > + register_ioport_write(0xe4, 1, 4, test_device_flush_page, dev); > + register_ioport_write(0x2000, 24, 1, test_device_irq_line, NULL); > + iomem_buf =3D g_malloc0(0x10000); > + iomem =3D cpu_register_io_memory(test_iomem_read, test_iomem_write= , NULL, > + DEVICE_NATIVE_ENDIAN); > + cpu_register_physical_memory(0xff000000, 0x10000, iomem); We have MemoryRegion for MMIO and PIO now. > + return 0; > +} > + > +static ISADeviceInfo testdev_info =3D { > + .qdev.name =3D "testdev", > + .qdev.size =3D sizeof(struct testdev), > + .init =3D init_test_device, > + .qdev.props =3D (Property[]) { > + DEFINE_PROP_CHR("chardev", struct testdev, chr), > + DEFINE_PROP_END_OF_LIST(), > + }, > +}; > + > +static void testdev_register_devices(void) > +{ > + isa_qdev_register(&testdev_info); > +} > + > +device_init(testdev_register_devices) Jan --------------enig03F529C17F6727C2DCB44AA2 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.16 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iEYEARECAAYFAk5YHacACgkQitSsb3rl5xRWJACfQKvU2ySCIx2XZ0TdtHKETG64 mIoAoIDjb7R9ePqEB8lao1Fy7lQHGPoy =1JqG -----END PGP SIGNATURE----- --------------enig03F529C17F6727C2DCB44AA2--