From: Jan Kiszka <jan.kiszka@web.de>
To: Alan Amaral <alan.amaral@virtualcomputer.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] pci_change_irq_level is broken...
Date: Tue, 20 Sep 2011 21:41:47 +0200 [thread overview]
Message-ID: <4E78EC7B.9030808@web.de> (raw)
In-Reply-To: <E7BCD741-8D2C-43E1-863E-928A598E41CC@mimectl>
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On 2011-09-20 21:19, Alan Amaral wrote:
> QEMU emulator version 0.14.50, Copyright (c) 2003-2008 Fabrice Bellard
(That's an ambitious development version.)
>
> You are correct, it's not hardcoded to 4. However, when it's allocated the number of elements IS 4. Also,
> there's a comment just above pci_set_irq which says:
>
> /* 0 <= irq_num <= 3. level must be 0 or 1 */
> static void pci_set_irq(void *opaque, int irq_num, int level)
>
> so, that implies to me that it's probably always 4... Sorry for the confusion.
Assuming you look at PIIX3: Yes, it allocates 4 IRQs - but only returns
0..3 via pci_slot_get_pirq. Xen uses some more, but also looks safe.
Can you provide a backtrace where irq_num gets larger than 3 and writes
beyond the end of irq_count? Do you have private patches in your tree?
Jan
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next prev parent reply other threads:[~2011-09-20 19:41 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-20 17:24 [Qemu-devel] pci_change_irq_level is broken Alan Amaral
2011-09-20 18:57 ` Richard Henderson
2011-09-20 19:19 ` Alan Amaral
2011-09-20 19:41 ` Jan Kiszka [this message]
2011-09-20 19:56 ` Richard Henderson
2011-09-21 16:34 ` Alan Amaral
-- strict thread matches above, loose matches on Subject: below --
2011-09-21 16:26 Alan Amaral
2011-09-21 16:33 ` Jan Kiszka
2011-09-21 16:38 ` Alan Amaral
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