From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:39057) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R6Lxr-0006vE-AV for qemu-devel@nongnu.org; Wed, 21 Sep 2011 08:31:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R6Lxq-0007bL-EV for qemu-devel@nongnu.org; Wed, 21 Sep 2011 08:31:47 -0400 Received: from mx1.redhat.com ([209.132.183.28]:5098) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R6Lxq-0007bD-4v for qemu-devel@nongnu.org; Wed, 21 Sep 2011 08:31:46 -0400 Message-ID: <4E79D9E1.4060602@redhat.com> Date: Wed, 21 Sep 2011 14:34:41 +0200 From: Kevin Wolf MIME-Version: 1.0 References: <1314436348-28837-1-git-send-email-daniel@drv.nu> In-Reply-To: <1314436348-28837-1-git-send-email-daniel@drv.nu> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] ahci: add port I/O index-data pair List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Daniel Verkamp Cc: qemu-devel@nongnu.org Am 27.08.2011 11:12, schrieb Daniel Verkamp: > Implement an I/O space index-data register pair as defined by the AHCI > spec, including the corresponding SATA PCI capability and BAR. > > This allows real-mode code to access the AHCI registers; real-mode > code cannot address the memory-mapped register space because it is > beyond the first megabyte. > > Signed-off-by: Daniel Verkamp Thanks, applied to the block branch. > --- a/hw/ide/ich.c > +++ b/hw/ide/ich.c > @@ -72,6 +72,14 @@ > #include > #include > > +#define ICH9_SATA_CAP_OFFSET 0xA8 > + > +#define ICH9_IDP_BAR 4 > +#define ICH9_MEM_BAR 5 > + > +#define ICH9_IDP_INDEX 0x10 > +#define ICH9_IDP_INDEX_LOG2 0x04 Just wondering, why did you choose 0x10 and not 0? The spec reads as if the implementation could freely choose this, and I can't see what the first 16 Bytes are used for. Doesn't make it less correct, of course. Kevin