From: Avi Kivity <avi@redhat.com>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: Anthony Liguori <aliguori@us.ibm.com>,
Jan Kiszka <jan.kiszka@web.de>,
qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 11/22] i8259: Update IRQ state after reset
Date: Tue, 04 Oct 2011 14:12:25 +0200 [thread overview]
Message-ID: <4E8AF829.10005@redhat.com> (raw)
In-Reply-To: <CAAu8pHsN9gui_LxJVwh-Pi3u5XuHc2vD=00ffuMemfaE0wugUw@mail.gmail.com>
On 10/02/2011 10:36 PM, Blue Swirl wrote:
> On Sun, Oct 2, 2011 at 8:31 PM, Avi Kivity<avi@redhat.com> wrote:
> >
> >> >
> >> > In fact these aren't problems. The packet may be sent or data
> >> > written, as long as they aren't corrupted. A device is allowed to
> >> > "delay" a reset (but not indefinitely).
> >>
> >> Oh, but corruption could easily happen. Consider for example a disk
> >> controller waiting for DMA ready signal a device separate from the
> >> DMA
> >> controller. Due to reset glitches in the device or signal chain, the
> >> DMA ready signal arrives but the DMA controller still contains old
> >> information, writing the data to disk from wrong memory location.
> >
> >
> > Would not this corruption also happen on real hardware? If reset to the disk controller is delayed by a slow gate or extra capacitance on a line?
>
> Maybe, but the delays are probably too short on real HW before any
> packets are sent or disk gets written. On QEMU, I/O can be
> instantaneous.
As an anecdote, while reading a chip errata I came upon this:
15. CPU May Record Signal Glitches When MCH is Being Reset
Problem: When the MCH is reset via RSTIN# the CPU may record any one or
more of the
following errors: address strobe glitch (MSR IA32_MCi_STATUS bit 23),
data strobe
glitch (MSR IA32_MCi_STATUS bit 22), P/N data strobes out of sync (MSR
IA32_MCi_STATUS bit 21), PIC & FSB data parity (MSR IA32_MCi_STATUS bit
19), RSP
parity (MSR IA32_MCi_STATUS bit 18), or FSB address parity (MSR
IA32_MCi_STATUS
bit 16). This can happen when the MCH asserts CPURST# just after the
MCH drives an
FSB transaction. This may happen because RSTIN# and CPURST# maintain an
asynchronous relationship with each other.
Workaround: None.
Status: No Fix
(of course the situation there is different, there is no global reset
signal)
--
error compiling committee.c: too many arguments to function
next prev parent reply other threads:[~2011-10-04 12:12 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-28 11:00 [Qemu-devel] [PATCH 00/22] Rework i8259 and PC interrupt models Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 01/22] pc: Drop useless test from isa_irq_handler Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 02/22] pc: Generalize ISA IRQs to GSIs Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 03/22] pc: Convert GSIState::i8259_irq into array Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 04/22] pc: Fix and clean up PIC-to-APIC IRQ path Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 05/22] i8259: Remove premature inline function attributes Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 06/22] i8259: Drop obsolete prototypes Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 07/22] i8259: Move pic_set_irq1 after pic_update_irq Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 08/22] i8239: Introduce per-PIC output interrupt Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 09/22] i8259: Do not update IRQ output after spurious pic_poll_read Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 10/22] i8259: Reorder intack in pic_read_irq Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 11/22] i8259: Update IRQ state after reset Jan Kiszka
2011-09-28 18:01 ` Blue Swirl
2011-09-28 18:09 ` Peter Maydell
2011-09-28 18:42 ` Blue Swirl
2011-09-28 21:38 ` Peter Maydell
2011-09-29 19:35 ` Blue Swirl
2011-09-28 21:18 ` Jan Kiszka
2011-09-29 19:45 ` Blue Swirl
2011-09-30 6:47 ` Jan Kiszka
2011-09-30 9:14 ` Peter Maydell
2011-09-30 20:52 ` Blue Swirl
2011-09-30 20:47 ` Blue Swirl
2011-10-01 6:47 ` Jan Kiszka
2011-10-01 7:31 ` Blue Swirl
2011-10-02 16:27 ` Jan Kiszka
2011-10-02 19:01 ` Blue Swirl
2011-10-02 16:56 ` Avi Kivity
2011-10-02 19:13 ` Blue Swirl
2011-10-02 19:20 ` Avi Kivity
2011-10-02 19:39 ` Blue Swirl
2011-10-02 19:44 ` Avi Kivity
2011-10-02 19:49 ` Blue Swirl
2011-10-02 19:52 ` Avi Kivity
2011-10-02 19:59 ` Blue Swirl
2011-10-02 20:03 ` Avi Kivity
2011-10-02 20:11 ` Blue Swirl
2011-10-02 20:17 ` Avi Kivity
2011-10-02 20:26 ` Blue Swirl
2011-10-02 20:31 ` Avi Kivity
2011-10-02 20:36 ` Blue Swirl
2011-10-02 20:41 ` Avi Kivity
2011-10-02 20:55 ` Blue Swirl
2011-10-03 7:21 ` Paolo Bonzini
2011-10-04 12:12 ` Avi Kivity [this message]
2011-10-01 11:20 ` Peter Maydell
2011-10-02 16:39 ` Avi Kivity
2011-10-02 17:46 ` Jan Kiszka
2011-10-02 19:07 ` Avi Kivity
2011-10-02 19:15 ` Blue Swirl
2011-10-02 19:47 ` Jan Kiszka
2011-10-02 19:50 ` Avi Kivity
2011-10-02 19:06 ` Blue Swirl
2011-10-02 19:08 ` Avi Kivity
2011-10-02 19:26 ` Blue Swirl
2011-10-02 19:35 ` Avi Kivity
2011-10-02 19:40 ` Blue Swirl
2011-10-02 19:47 ` Avi Kivity
2011-10-02 19:52 ` Blue Swirl
2011-10-02 19:58 ` Avi Kivity
2011-10-02 20:05 ` Blue Swirl
2011-10-02 20:14 ` Avi Kivity
2011-10-02 20:18 ` Blue Swirl
2011-10-02 20:21 ` Avi Kivity
2011-10-02 20:30 ` Blue Swirl
2011-10-02 20:39 ` Avi Kivity
2011-10-02 20:53 ` Blue Swirl
2011-09-28 11:00 ` [Qemu-devel] [PATCH 12/22] i8259: Switch to per-PIC IRQ update Jan Kiszka
2011-09-28 11:00 ` [Qemu-devel] [PATCH 13/22] i8259: Fix poll command Jan Kiszka
2011-09-28 11:01 ` [Qemu-devel] [PATCH 14/22] i8259: Clean up pic_ioport_read Jan Kiszka
2011-09-28 11:01 ` [Qemu-devel] [PATCH 15/22] i8259: PREP: Replace pic_intack_read with pic_read_irq Jan Kiszka
2011-09-28 11:15 ` Alexander Graf
2011-09-28 11:01 ` [Qemu-devel] [PATCH 16/22] i8259: Replace PicState::pics_state with master flag Jan Kiszka
2011-09-28 11:01 ` [Qemu-devel] [PATCH 17/22] i8259: Eliminate PicState2 Jan Kiszka
2011-09-28 16:23 ` Richard Henderson
2011-09-28 16:29 ` Richard Henderson
2011-09-28 11:01 ` [Qemu-devel] [PATCH 18/22] qdev: Add HEX8 property Jan Kiszka
2011-09-28 11:01 ` [Qemu-devel] [PATCH 19/22] i8259: Convert to qdev Jan Kiszka
2011-09-28 11:01 ` [Qemu-devel] [PATCH 20/22] i8259: Fix coding style Jan Kiszka
2011-09-28 11:01 ` [Qemu-devel] [PATCH 21/22] monitor: Restrict pic/irq_info to supporting targets Jan Kiszka
2011-09-28 18:19 ` Blue Swirl
2011-09-28 21:26 ` Jan Kiszka
2011-09-29 19:29 ` Blue Swirl
2011-09-30 6:50 ` [Qemu-devel] [PATCH v2 " Jan Kiszka
2011-09-30 20:32 ` Blue Swirl
2011-09-28 11:01 ` [Qemu-devel] [PATCH 22/22] i8259: Move to hw library Jan Kiszka
2011-09-28 18:21 ` Blue Swirl
2011-09-28 21:50 ` [Qemu-devel] [PATCH v2 " Jan Kiszka
2011-09-28 16:39 ` [Qemu-devel] [PATCH 00/22] Rework i8259 and PC interrupt models Richard Henderson
2011-09-28 21:53 ` Jan Kiszka
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4E8AF829.10005@redhat.com \
--to=avi@redhat.com \
--cc=aliguori@us.ibm.com \
--cc=blauwirbel@gmail.com \
--cc=jan.kiszka@web.de \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).