From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:57045) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RB7D7-0002AU-Id for qemu-devel@nongnu.org; Tue, 04 Oct 2011 11:47:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RB7Cz-0004vN-Tk for qemu-devel@nongnu.org; Tue, 04 Oct 2011 11:47:13 -0400 Message-ID: <4E8B29F2.9020000@freescale.com> Date: Tue, 4 Oct 2011 10:44:50 -0500 From: Scott Wood MIME-Version: 1.0 References: <1317674600-19083-1-git-send-email-sw@weilnetz.de> <1317674600-19083-3-git-send-email-sw@weilnetz.de> <4E8A208E.3050201@freescale.com> <4E8A24BC.1020506@weilnetz.de> <4E8A2BCE.2050809@freescale.com> <4E8A9FCA.5080801@weilnetz.de> In-Reply-To: <4E8A9FCA.5080801@weilnetz.de> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/2] tcg/ppc*: Move cache initialization to ppc specific code List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Stefan Weil Cc: Peter Maydell , qemu-ppc@nongnu.org, QEMU Developers , Alexander Graf On 10/04/2011 12:55 AM, Stefan Weil wrote: > Am 03.10.2011 23:40, schrieb Scott Wood: >> The interface isn't powerpc-specific. It just happens to be the only >> arch so far that qemu supports that needs the implementation to do >> something (or possibly just the only one where that need has been >> discovered). >> >> What problem is it causing the way it is? > > My patch was triggered by this discussion thread and a remark from > Peter Maydell: > > http://lists.nongnu.org/archive/html/qemu-devel/2011-09/msg02272.html > > The only problem is that ppc differs from all other hosts: > > * No other host needs qemu_cache_utils_init() today. > > * All other hosts define flush_icache_range() in tcg-target.h. > > * All other hosts only call flush_icache_range() from tcg code. > > I learned now that ppc will need flush_icache_range() for kvm, too. > So it won't be possible to implement a uniform handling of > flush_icache_range() for all host architectures. This doesn't smell right... why would other arches need it for TCG, but not KVM? Either you need to flush when writing code to memory, or you don't. Is it just that KVM isn't implemented yet on those architectures? -Scott