qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Andreas Färber" <andreas.faerber@web.de>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [RFC 0/2] target-arm: Adding Cortex-R4F support
Date: Thu, 06 Oct 2011 12:16:42 +0200	[thread overview]
Message-ID: <4E8D800A.9040409@web.de> (raw)
In-Reply-To: <CAFEAcA_jiVuxYJ6iUW_BvRqQPBXg3J_qL7nnNT=HUXJbABm3vw@mail.gmail.com>

Am 02.10.2011 23:44, schrieb Peter Maydell:
> On 2 October 2011 19:56, Andreas Färber <andreas.faerber@web.de> wrote:
>> I've been looking into adding support for Cortex-R4F.
> 
> Ooh, that will be the first R profile core. In particular the only
> other non-M-profile PMSA core we support is the 946 which was a v5
> core,

Yeah, I rarely pick the easy tasks. :)

>> 1) Currently, -cpu is used to look up a Main ID Register value and to base
>> feature decisions on that. This doesn't work for Cortex-R4 and Cortex-R4F,
>> which have an identical MIDR but only -R4F has the FPU.
>> Re-checking the model string, while ugly, does the trick. Comments?
> 
> That is indeed kind of ugly. I think if CPUID value isn't a unique value
> for the things we pass to -cpu then we shouldn't treat it as one.

For the reset, the MIDR is read, then the memset() is performed and
cpu_reset_model_id() is called with the previously read MIDR value,
which the function then writes into the register first thing. I'd
suggest to move that out into cpu_reset(), drop the id parameter and
switch on the register instead (only other use is cpu_abort()).

> More
> generally, it would be nice to be able to say "I want a Cortex-A9
> but I only want the no-neon VFPv3D16 variant". (I think some of the
> other targets already have syntax for this.)

Coming from a ppc background, we have a whole matrix of processors with
fixed features but I'm not aware of an arch where we opt-in/out
processor core features.

> Currently the approach is to say "you only get one variant of the
> processor, and it's the one with all the bells and whistles enabled".
> That would imply that '-cpu cortex-r4' gives you one with an FPU.

I'll go with cortex-r4f then.

> I think that (1) the bare CPU name should be the most recent rev of the
> core that QEMU knows about [and that we should be happy to change qemu
> to move up to supporting newer revisions]

> (Anybody want to argue with (1) ?)

I concur that an easy-to-type -cpu should provide the latest and
greatest features. Features hidden will not get much exposure. But if a
revision noticeably changes behavior, I guess we should remain command
line compatible.

Andreas

  parent reply	other threads:[~2011-10-06 10:16 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-10-02 18:56 [Qemu-devel] [RFC 0/2] target-arm: Adding Cortex-R4F support Andreas Färber
2011-10-02 18:56 ` [Qemu-devel] [RFC 1/2] target-arm: Prepare support for Cortex-R4 Andreas Färber
2011-10-02 18:56 ` [Qemu-devel] [RFC 2/2] target-arm: Add support for Cortex-R4F Andreas Färber
2011-10-02 21:44 ` [Qemu-devel] [RFC 0/2] target-arm: Adding Cortex-R4F support Peter Maydell
2011-10-03  8:28   ` Peter Maydell
2011-10-06 10:16   ` Andreas Färber [this message]
2011-10-06 10:37     ` Peter Maydell
2011-10-22 11:00       ` [Qemu-devel] [RFC] target-arm: Preserve CPUID over CPU reset Andreas Färber
2011-11-10 10:31         ` [Qemu-devel] [RFC post-1.0 0/5] Inference of ARM features Andreas Färber
2011-11-10 10:31           ` [Qemu-devel] [RFC 1/5] target-arm: Infer ARMv4T feature Andreas Färber
2011-11-10 10:31           ` [Qemu-devel] [RFC 2/5] target-arm: Infer ARMv5 feature Andreas Färber
2011-11-10 10:31           ` [Qemu-devel] [RFC 3/5] target-arm: Infer ARMv6 feature Andreas Färber
2011-11-10 10:31           ` [Qemu-devel] [FYI 4/5] target-arm: Prepare support for Cortex-R4 Andreas Färber
2011-11-10 10:32           ` [Qemu-devel] [FYI 5/5] target-arm: Add support for Cortex-R4F Andreas Färber
2011-11-10 16:12             ` Peter Maydell
2011-11-10 13:25           ` [Qemu-devel] [RFC post-1.0 0/5] Inference of ARM features Peter Maydell
2011-11-10 15:03         ` [Qemu-devel] [RFC] target-arm: Preserve CPUID over CPU reset Peter Maydell
2011-10-03 10:32 ` [Qemu-devel] [PATCH] target-arm: Tidy up ARM1136 CPUID naming Andreas Färber
2011-10-22  9:22   ` Andreas Färber
2011-10-22 10:20   ` Peter Maydell
2011-10-22 10:33     ` Andreas Färber
2011-10-24 11:15       ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4E8D800A.9040409@web.de \
    --to=andreas.faerber@web.de \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).