From: Fabien Chouteau <chouteau@adacore.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, agraf@suse.de
Subject: Re: [Qemu-devel] [PATCH] Set an invalid-bits mask for each SPE instructions
Date: Thu, 06 Oct 2011 16:41:25 +0200 [thread overview]
Message-ID: <4E8DBE15.7070200@adacore.com> (raw)
In-Reply-To: <1317225245-24360-1-git-send-email-chouteau@adacore.com>
On 28/09/2011 17:54, Fabien Chouteau wrote:
> SPE instructions are defined by pairs. Currently, the invalid-bits mask is set
> for the first instruction, but the second one can have a different mask.
>
> example:
> GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, 0x00180000, PPC_SPE_DOUBLE),
>
Any comments?
--
Fabien Chouteau
next prev parent reply other threads:[~2011-10-06 14:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-28 15:54 [Qemu-devel] [PATCH] Set an invalid-bits mask for each SPE instructions Fabien Chouteau
2011-10-06 14:41 ` Fabien Chouteau [this message]
2011-10-07 12:40 ` Alexander Graf
2011-10-07 13:10 ` Fabien Chouteau
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