[Qemu-devel] [PATCH] apic: test tsc deadline timer

[Qemu-devel] [PATCH] apic: test tsc deadline timer

[Liu, Jinsong]

[-- Attachment #1: Type: text/plain, Size: 3053 bytes --]

Marcelo,

I add test case for tsc deadline timer https://github.com/avikivity/kvm-unit-tests, as attached.

According to the kvm-unit-tests README, I try to run
qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=apic.out -kernel ./x86/apic.flat
but get nothing from the testlog 'apic.out'
(BTW, at kvm side I did observe the expected tsc deadline timer action)

I also try to run the README example
qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=msr.out -kernel ./x86/msr.flat
but still get nothing from 'msr.out'

Do I miss something? how can I get test log?

Thanks,
Jinsong

==================
>From 92d05a2caca4d0a35651bd06b88cf78b4e24d5b7 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Sun, 9 Oct 2011 17:16:17 +0800
Subject: [PATCH] apic: test tsc deadline timer

Test tsc deadline timer: detect tsc deadline timer support by CPUID,
enable tsc deadline timer mode by MMIO, then start tsc deadline timer by WRMSR.

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
---
 x86/apic.c |   53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 53 insertions(+), 0 deletions(-)

diff --git a/x86/apic.c b/x86/apic.c
index c51e6a5..b086663 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -25,6 +25,57 @@ static void test_lapic_existence(void)
     report("apic existence", (u16)lvr == 0x14);
 }
 
+#define TSC_DEADLINE_TIMER_MODE (2 << 17)
+#define TSC_DEADLINE_TIMER_VECTOR 0xef
+#define MSR_IA32_TSC            0x00000010
+#define MSR_IA32_TSCDEADLINE    0x000006e0
+
+static int tdt_count;
+
+static void tsc_deadline_timer_isr(isr_regs_t *regs)
+{
+    ++tdt_count;
+}
+
+static void start_tsc_deadline_timer(void)
+{
+    unsigned a, d;
+
+    handle_irq(TSC_DEADLINE_TIMER_VECTOR, tsc_deadline_timer_isr);
+    irq_enable();
+
+    asm ("rdmsr" : "=a"(a), "=d"(d) : "c"(MSR_IA32_TSC));
+    asm ("wrmsr" : : "a"(a), "d"(d), "c"(MSR_IA32_TSCDEADLINE));
+    asm volatile ("nop");
+    report("tsc deadline timer", tdt_count == 1);
+}
+
+static int enable_tsc_deadline_timer(void)
+{
+    unsigned a, b, c, d;
+    uint32_t lvtt;
+
+    asm ("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(1));
+
+    if (c & (1 << 24)) {
+        lvtt = TSC_DEADLINE_TIMER_MODE | TSC_DEADLINE_TIMER_VECTOR;
+        apic_write(APIC_LVTT, lvtt);
+        start_tsc_deadline_timer();
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+static void test_tsc_deadline_timer(void)
+{
+    if(enable_tsc_deadline_timer()) {
+        printf("tsc deadline timer enabled\n");
+    } else {
+        printf("tsc deadline timer not detected\n");
+    }
+}
+
 #define MSR_APIC_BASE 0x0000001b
 
 void test_enable_x2apic(void)
@@ -291,6 +342,8 @@ int main()
     test_sti_nmi();
     test_multiple_nmi();
 
+    test_tsc_deadline_timer();
+
     printf("\nsummary: %d tests, %d failures\n", g_tests, g_fail);
 
     return g_fail != 0;
-- 
1.6.5.6

[-- Attachment #2: test-tsc-deadline-timer.patch --]
[-- Type: application/octet-stream, Size: 2287 bytes --]

From 92d05a2caca4d0a35651bd06b88cf78b4e24d5b7 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Sun, 9 Oct 2011 17:16:17 +0800
Subject: [PATCH] apic: test tsc deadline timer

Test tsc deadline timer: detect tsc deadline timer support by CPUID,
enable tsc deadline timer mode by MMIO, then start tsc deadline timer by WRMSR.

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
---
 x86/apic.c |   53 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 53 insertions(+), 0 deletions(-)

diff --git a/x86/apic.c b/x86/apic.c
index c51e6a5..b086663 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -25,6 +25,57 @@ static void test_lapic_existence(void)
     report("apic existence", (u16)lvr == 0x14);
 }
 
+#define TSC_DEADLINE_TIMER_MODE (2 << 17)
+#define TSC_DEADLINE_TIMER_VECTOR 0xef
+#define MSR_IA32_TSC            0x00000010
+#define MSR_IA32_TSCDEADLINE    0x000006e0
+
+static int tdt_count;
+
+static void tsc_deadline_timer_isr(isr_regs_t *regs)
+{
+    ++tdt_count;
+}
+
+static void start_tsc_deadline_timer(void)
+{
+    unsigned a, d;
+
+    handle_irq(TSC_DEADLINE_TIMER_VECTOR, tsc_deadline_timer_isr);
+    irq_enable();
+
+    asm ("rdmsr" : "=a"(a), "=d"(d) : "c"(MSR_IA32_TSC));
+    asm ("wrmsr" : : "a"(a), "d"(d), "c"(MSR_IA32_TSCDEADLINE));
+    asm volatile ("nop");
+    report("tsc deadline timer", tdt_count == 1);
+}
+
+static int enable_tsc_deadline_timer(void)
+{
+    unsigned a, b, c, d;
+    uint32_t lvtt;
+
+    asm ("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(1));
+
+    if (c & (1 << 24)) {
+        lvtt = TSC_DEADLINE_TIMER_MODE | TSC_DEADLINE_TIMER_VECTOR;
+        apic_write(APIC_LVTT, lvtt);
+        start_tsc_deadline_timer();
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+static void test_tsc_deadline_timer(void)
+{
+    if(enable_tsc_deadline_timer()) {
+        printf("tsc deadline timer enabled\n");
+    } else {
+        printf("tsc deadline timer not detected\n");
+    }
+}
+
 #define MSR_APIC_BASE 0x0000001b
 
 void test_enable_x2apic(void)
@@ -291,6 +342,8 @@ int main()
     test_sti_nmi();
     test_multiple_nmi();
 
+    test_tsc_deadline_timer();
+
     printf("\nsummary: %d tests, %d failures\n", g_tests, g_fail);
 
     return g_fail != 0;
-- 
1.6.5.6

Re: [Qemu-devel] [PATCH] apic: test tsc deadline timer

[Avi Kivity]

On 10/09/2011 12:05 PM, Liu, Jinsong wrote:
> Marcelo,
>
> I add test case for tsc deadline timer https://github.com/avikivity/kvm-unit-tests, as attached.
>
> According to the kvm-unit-tests README, I try to run
> qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=apic.out -kernel ./x86/apic.flat
> but get nothing from the testlog 'apic.out'
> (BTW, at kvm side I did observe the expected tsc deadline timer action)
>
> I also try to run the README example
> qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=msr.out -kernel ./x86/msr.flat
> but still get nothing from 'msr.out'
>
> Do I miss something? how can I get test log?

This was recently changed, it now outputs to the serial port.

Try


qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=apic.out -serial stdio -kernel ./x86/apic.flat


> +
> +static void start_tsc_deadline_timer(void)
> +{
> +    unsigned a, d;
> +
> +    handle_irq(TSC_DEADLINE_TIMER_VECTOR, tsc_deadline_timer_isr);
> +    irq_enable();
> +
> +    asm ("rdmsr" : "=a"(a), "=d"(d) : "c"(MSR_IA32_TSC));
> +    asm ("wrmsr" : : "a"(a), "d"(d), "c"(MSR_IA32_TSCDEADLINE));
> +    asm volatile ("nop");
> +    report("tsc deadline timer", tdt_count == 1);
> +}

Please use rdmsr()/wrmsr() from processor.h.

> +
> +static int enable_tsc_deadline_timer(void)
> +{
> +    unsigned a, b, c, d;
> +    uint32_t lvtt;
> +
> +    asm ("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(1));

cpuid()...

> +
> +    if (c&  (1<<  24)) {
> +        lvtt = TSC_DEADLINE_TIMER_MODE | TSC_DEADLINE_TIMER_VECTOR;
> +        apic_write(APIC_LVTT, lvtt);
> +        start_tsc_deadline_timer();
> +        return 1;
> +    } else {
> +        return 0;
> +    }
> +}
> +
> +static void test_tsc_deadline_timer(void)
> +{
> +    if(enable_tsc_deadline_timer()) {
> +        printf("tsc deadline timer enabled\n");
> +    } else {
> +        printf("tsc deadline timer not detected\n");
> +    }
> +}
> +
>   #define MSR_APIC_BASE 0x0000001b
>
>   void test_enable_x2apic(void)
> @@ -291,6 +342,8 @@ int main()
>       test_sti_nmi();
>       test_multiple_nmi();
>
> +    test_tsc_deadline_timer();
> +
>       printf("\nsummary: %d tests, %d failures\n", g_tests, g_fail);
>
>       return g_fail != 0;


-- 
error compiling committee.c: too many arguments to function

Re: [Qemu-devel] [PATCH] apic: test tsc deadline timer

[Liu, Jinsong]

Avi Kivity wrote:
> On 10/09/2011 12:05 PM, Liu, Jinsong wrote:
>> Marcelo,
>> 
>> I add test case for tsc deadline timer
>> https://github.com/avikivity/kvm-unit-tests, as attached. 
>> 
>> According to the kvm-unit-tests README, I try to run
>> qemu-system-x86_64 -device testdev,chardev=testlog -chardev
>> file,id=testlog,path=apic.out -kernel ./x86/apic.flat but get
>> nothing from the testlog 'apic.out' (BTW, at kvm side I did observe
>> the expected tsc deadline timer action) 
>> 
>> I also try to run the README example
>> qemu-system-x86_64 -device testdev,chardev=testlog -chardev
>> file,id=testlog,path=msr.out -kernel ./x86/msr.flat but still get
>> nothing from 'msr.out' 
>> 
>> Do I miss something? how can I get test log?
> 
> This was recently changed, it now outputs to the serial port.
> 
> Try
> 
> 
> qemu-system-x86_64 -device testdev,chardev=testlog -chardev
> file,id=testlog,path=apic.out -serial stdio -kernel ./x86/apic.flat 
> 
> 

Thanks Avi, I got test log as:

enabling apic
paging enabled
cr0 = 80010011
cr3 = 7fff000
cr4 = 20
apic version: 50014
apic existence: PASS
enabling apic
x2apic not detected
self ipi: PASS
ioapic interrupt: PASS
ioapic simultaneous interrupt: PASS
tsc deadline timer: PASS
tsc deadline timer enabled

summary: 5 tests, 0 failures

>> +
>> +static void start_tsc_deadline_timer(void)
>> +{
>> +    unsigned a, d;
>> +
>> +    handle_irq(TSC_DEADLINE_TIMER_VECTOR, tsc_deadline_timer_isr);
>> +    irq_enable(); +
>> +    asm ("rdmsr" : "=a"(a), "=d"(d) : "c"(MSR_IA32_TSC));
>> +    asm ("wrmsr" : : "a"(a), "d"(d), "c"(MSR_IA32_TSCDEADLINE)); + 
>> asm volatile ("nop"); +    report("tsc deadline timer", tdt_count ==
>> 1); +}
> 
> Please use rdmsr()/wrmsr() from processor.h.
> 

Updated.

Thanks,
Jinsong

>> +
>> +static int enable_tsc_deadline_timer(void)
>> +{
>> +    unsigned a, b, c, d;
>> +    uint32_t lvtt;
>> +
>> +    asm ("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(1));
> 
> cpuid()...
> 
>> +
>> +    if (c&  (1<<  24)) {
>> +        lvtt = TSC_DEADLINE_TIMER_MODE | TSC_DEADLINE_TIMER_VECTOR;
>> +        apic_write(APIC_LVTT, lvtt);
>> +        start_tsc_deadline_timer();
>> +        return 1;
>> +    } else {
>> +        return 0;
>> +    }
>> +}
>> +
>> +static void test_tsc_deadline_timer(void)
>> +{
>> +    if(enable_tsc_deadline_timer()) {
>> +        printf("tsc deadline timer enabled\n");
>> +    } else {
>> +        printf("tsc deadline timer not detected\n"); +    }
>> +}
>> +
>>   #define MSR_APIC_BASE 0x0000001b
>> 
>>   void test_enable_x2apic(void)
>> @@ -291,6 +342,8 @@ int main()
>>       test_sti_nmi();
>>       test_multiple_nmi();
>> 
>> +    test_tsc_deadline_timer();
>> +
>>       printf("\nsummary: %d tests, %d failures\n", g_tests, g_fail);
>> 
>>       return g_fail != 0;

Re: [Qemu-devel] [PATCH] apic: test tsc deadline timer

[Liu, Jinsong]

[-- Attachment #1: Type: text/plain, Size: 2329 bytes --]

Updated test case for kvm tsc deadline timer https://github.com/avikivity/kvm-unit-tests, as attached.

Thanks,
Jinsong

=================
>From 2b476cf741b36da5df35cf2e8f7f9562e8245fcd Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Sun, 9 Oct 2011 22:45:39 +0800
Subject: [PATCH] apic: test tsc deadline timer

Test tsc deadline timer: detect tsc deadline timer support by CPUID,
enable tsc deadline timer mode by MMIO, then start tsc deadline timer by WRMSR.

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
---
 x86/apic.c |   47 +++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 47 insertions(+), 0 deletions(-)

diff --git a/x86/apic.c b/x86/apic.c
index c51e6a5..2725b9a 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -25,6 +25,51 @@ static void test_lapic_existence(void)
     report("apic existence", (u16)lvr == 0x14);
 }
 
+#define TSC_DEADLINE_TIMER_MODE (2 << 17)
+#define TSC_DEADLINE_TIMER_VECTOR 0xef
+#define MSR_IA32_TSC            0x00000010
+#define MSR_IA32_TSCDEADLINE    0x000006e0
+
+static int tdt_count;
+
+static void tsc_deadline_timer_isr(isr_regs_t *regs)
+{
+    ++tdt_count;
+}
+
+static void start_tsc_deadline_timer(void)
+{
+    handle_irq(TSC_DEADLINE_TIMER_VECTOR, tsc_deadline_timer_isr);
+    irq_enable();
+
+    wrmsr(MSR_IA32_TSCDEADLINE, rdmsr(MSR_IA32_TSC));
+    asm volatile ("nop");
+    report("tsc deadline timer", tdt_count == 1);
+}
+
+static int enable_tsc_deadline_timer(void)
+{
+    uint32_t lvtt;
+
+    if (cpuid(1).c & (1 << 24)) {
+        lvtt = TSC_DEADLINE_TIMER_MODE | TSC_DEADLINE_TIMER_VECTOR;
+        apic_write(APIC_LVTT, lvtt);
+        start_tsc_deadline_timer();
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+static void test_tsc_deadline_timer(void)
+{
+    if(enable_tsc_deadline_timer()) {
+        printf("tsc deadline timer enabled\n");
+    } else {
+        printf("tsc deadline timer not detected\n");
+    }
+}
+
 #define MSR_APIC_BASE 0x0000001b
 
 void test_enable_x2apic(void)
@@ -291,6 +336,8 @@ int main()
     test_sti_nmi();
     test_multiple_nmi();
 
+    test_tsc_deadline_timer();
+
     printf("\nsummary: %d tests, %d failures\n", g_tests, g_fail);
 
     return g_fail != 0;
-- 
1.6.5.6

[-- Attachment #2: test-tsc-deadline-timer.patch --]
[-- Type: application/octet-stream, Size: 2104 bytes --]

From 2b476cf741b36da5df35cf2e8f7f9562e8245fcd Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Sun, 9 Oct 2011 22:45:39 +0800
Subject: [PATCH] apic: test tsc deadline timer

Test tsc deadline timer: detect tsc deadline timer support by CPUID,
enable tsc deadline timer mode by MMIO, then start tsc deadline timer by WRMSR.

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
---
 x86/apic.c |   47 +++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 47 insertions(+), 0 deletions(-)

diff --git a/x86/apic.c b/x86/apic.c
index c51e6a5..2725b9a 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -25,6 +25,51 @@ static void test_lapic_existence(void)
     report("apic existence", (u16)lvr == 0x14);
 }
 
+#define TSC_DEADLINE_TIMER_MODE (2 << 17)
+#define TSC_DEADLINE_TIMER_VECTOR 0xef
+#define MSR_IA32_TSC            0x00000010
+#define MSR_IA32_TSCDEADLINE    0x000006e0
+
+static int tdt_count;
+
+static void tsc_deadline_timer_isr(isr_regs_t *regs)
+{
+    ++tdt_count;
+}
+
+static void start_tsc_deadline_timer(void)
+{
+    handle_irq(TSC_DEADLINE_TIMER_VECTOR, tsc_deadline_timer_isr);
+    irq_enable();
+
+    wrmsr(MSR_IA32_TSCDEADLINE, rdmsr(MSR_IA32_TSC));
+    asm volatile ("nop");
+    report("tsc deadline timer", tdt_count == 1);
+}
+
+static int enable_tsc_deadline_timer(void)
+{
+    uint32_t lvtt;
+
+    if (cpuid(1).c & (1 << 24)) {
+        lvtt = TSC_DEADLINE_TIMER_MODE | TSC_DEADLINE_TIMER_VECTOR;
+        apic_write(APIC_LVTT, lvtt);
+        start_tsc_deadline_timer();
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+static void test_tsc_deadline_timer(void)
+{
+    if(enable_tsc_deadline_timer()) {
+        printf("tsc deadline timer enabled\n");
+    } else {
+        printf("tsc deadline timer not detected\n");
+    }
+}
+
 #define MSR_APIC_BASE 0x0000001b
 
 void test_enable_x2apic(void)
@@ -291,6 +336,8 @@ int main()
     test_sti_nmi();
     test_multiple_nmi();
 
+    test_tsc_deadline_timer();
+
     printf("\nsummary: %d tests, %d failures\n", g_tests, g_fail);
 
     return g_fail != 0;
-- 
1.6.5.6

[Qemu-devel] [PATCH] Update README example

[Liu, Jinsong]

[-- Attachment #1: Type: text/plain, Size: 1763 bytes --]

>> 
>> This was recently changed, it now outputs to the serial port.
>> 
>> Try
>> 
>> 
>> qemu-system-x86_64 -device testdev,chardev=testlog -chardev
>> file,id=testlog,path=apic.out -serial stdio -kernel ./x86/apic.flat
>> 
>> 
> 
> Thanks Avi, I got test log as:
> 
> enabling apic
> paging enabled
> cr0 = 80010011
> cr3 = 7fff000
> cr4 = 20
> apic version: 50014
> apic existence: PASS
> enabling apic
> x2apic not detected
> self ipi: PASS
> ioapic interrupt: PASS
> ioapic simultaneous interrupt: PASS
> tsc deadline timer: PASS
> tsc deadline timer enabled
> 
> summary: 5 tests, 0 failures
> 

BTW, it better update kvm-unit-tests README.

Thanks,
Jinsong

=====================
>From ba2da790502f0ce2fb6dba9fc848cba041d051f8 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Sun, 9 Oct 2011 23:35:48 +0800
Subject: [PATCH] Update README example

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
 README |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/README b/README
index 9c0c518..4ceb869 100644
--- a/README
+++ b/README
@@ -10,8 +10,8 @@ To create the tests' images just type 'make' in this directory.
 Tests' images created in ./<ARCH>/*.flat
 
 An example of a test invocation:
-qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=msr.out -kernel ./x86/msr.flat
-This invocation runs the msr test case. The test output is in file msr.out.
+qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=msr.out -serial stdio -kernel ./x86/msr.flat
+This invocation runs the msr test case. The test outputs to stdio.
 
 
 
-- 
1.6.5.6

[-- Attachment #2: update-kvm-unit-tests-README.patch --]
[-- Type: application/octet-stream, Size: 1010 bytes --]

From ba2da790502f0ce2fb6dba9fc848cba041d051f8 Mon Sep 17 00:00:00 2001
From: Liu, Jinsong <jinsong.liu@intel.com>
Date: Sun, 9 Oct 2011 23:35:48 +0800
Subject: [PATCH] Update README example

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
 README |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/README b/README
index 9c0c518..4ceb869 100644
--- a/README
+++ b/README
@@ -10,8 +10,8 @@ To create the tests' images just type 'make' in this directory.
 Tests' images created in ./<ARCH>/*.flat
 
 An example of a test invocation:
-qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=msr.out -kernel ./x86/msr.flat
-This invocation runs the msr test case. The test output is in file msr.out.
+qemu-system-x86_64 -device testdev,chardev=testlog -chardev file,id=testlog,path=msr.out -serial stdio -kernel ./x86/msr.flat
+This invocation runs the msr test case. The test outputs to stdio.
 
 
 
-- 
1.6.5.6

Re: [Qemu-devel] [PATCH] Update README example

[Avi Kivity]

On 10/09/2011 06:02 PM, Liu, Jinsong wrote:
> Subject: [PATCH] Update README example
>
>

Thanks, applied.

-- 
error compiling committee.c: too many arguments to function

Re: [Qemu-devel] [PATCH] apic: test tsc deadline timer

[Avi Kivity]

On 10/09/2011 05:32 PM, Liu, Jinsong wrote:
> Updated test case for kvm tsc deadline timer https://github.com/avikivity/kvm-unit-tests, as attached.
>

Applied, thanks.

-- 
error compiling committee.c: too many arguments to function

Re: [Qemu-devel] [PATCH] apic: test tsc deadline timer

[Liu, Jinsong]

Avi Kivity wrote:
> On 10/09/2011 05:32 PM, Liu, Jinsong wrote:
>> Updated test case for kvm tsc deadline timer
>> https://github.com/avikivity/kvm-unit-tests, as attached. 
>> 
> 
> Applied, thanks.

Which tree? I didn't find it at git://github.com/avikivity/kvm-unit-tests.git

Thanks,
Jinsong