* [Qemu-devel] [PATCH 01/25] etrax-pic: Convert to MemoryRegion
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 02/25] etrax-ser: " Avi Kivity
` (24 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/etraxfs_pic.c | 30 +++++++++++++++---------------
1 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/hw/etraxfs_pic.c b/hw/etraxfs_pic.c
index 4feffda..47a56d7 100644
--- a/hw/etraxfs_pic.c
+++ b/hw/etraxfs_pic.c
@@ -39,6 +39,7 @@
struct etrax_pic
{
SysBusDevice busdev;
+ MemoryRegion mmio;
void *interrupt_vector;
qemu_irq parent_irq;
qemu_irq parent_nmi;
@@ -77,7 +78,8 @@ static void pic_update(struct etrax_pic *fs)
qemu_set_irq(fs->parent_irq, !!vector);
}
-static uint32_t pic_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+pic_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct etrax_pic *fs = opaque;
uint32_t rval;
@@ -87,8 +89,8 @@ static uint32_t pic_readl (void *opaque, target_phys_addr_t addr)
return rval;
}
-static void
-pic_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void pic_write(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned int size)
{
struct etrax_pic *fs = opaque;
D(printf("%s addr=%x val=%x\n", __func__, addr, value));
@@ -99,14 +101,14 @@ static uint32_t pic_readl (void *opaque, target_phys_addr_t addr)
}
}
-static CPUReadMemoryFunc * const pic_read[] = {
- NULL, NULL,
- &pic_readl,
-};
-
-static CPUWriteMemoryFunc * const pic_write[] = {
- NULL, NULL,
- &pic_writel,
+static const MemoryRegionOps pic_ops = {
+ .read = pic_read,
+ .write = pic_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4
+ }
};
static void nmi_handler(void *opaque, int irq, int level)
@@ -139,15 +141,13 @@ static void irq_handler(void *opaque, int irq, int level)
static int etraxfs_pic_init(SysBusDevice *dev)
{
struct etrax_pic *s = FROM_SYSBUS(typeof (*s), dev);
- int intr_vect_regs;
qdev_init_gpio_in(&dev->qdev, irq_handler, 32);
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_nmi);
- intr_vect_regs = cpu_register_io_memory(pic_read, pic_write, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, R_MAX * 4, intr_vect_regs);
+ memory_region_init_io(&s->mmio, &pic_ops, s, "etraxfs-pic", R_MAX * 4);
+ sysbus_init_mmio_region(dev, &s->mmio);
return 0;
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 02/25] etrax-ser: Convert to MemoryRegion
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 01/25] etrax-pic: Convert to MemoryRegion Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 03/25] etrax-timer: " Avi Kivity
` (23 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/etraxfs_ser.c | 33 ++++++++++++++++++---------------
1 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/hw/etraxfs_ser.c b/hw/etraxfs_ser.c
index 0036037..298b985 100644
--- a/hw/etraxfs_ser.c
+++ b/hw/etraxfs_ser.c
@@ -47,6 +47,7 @@
struct etrax_serial
{
SysBusDevice busdev;
+ MemoryRegion mmio;
CharDriverState *chr;
qemu_irq irq;
@@ -73,7 +74,8 @@ static void ser_update_irq(struct etrax_serial *s)
qemu_set_irq(s->irq, !!s->regs[R_MASKED_INTR]);
}
-static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+ser_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct etrax_serial *s = opaque;
D(CPUState *env = s->env);
@@ -108,10 +110,12 @@ static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
}
static void
-ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+ser_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val64, unsigned int size)
{
struct etrax_serial *s = opaque;
- unsigned char ch = value;
+ uint32_t value = val64;
+ unsigned char ch = val64;
D(CPUState *env = s->env);
D(qemu_log("%s " TARGET_FMT_plx "=%x\n", __func__, addr, value));
@@ -142,14 +146,14 @@ static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
ser_update_irq(s);
}
-static CPUReadMemoryFunc * const ser_read[] = {
- NULL, NULL,
- &ser_readl,
-};
-
-static CPUWriteMemoryFunc * const ser_write[] = {
- NULL, NULL,
- &ser_writel,
+static const MemoryRegionOps ser_ops = {
+ .read = ser_read,
+ .write = ser_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4
+ }
};
static void serial_receive(void *opaque, const uint8_t *buf, int size)
@@ -207,12 +211,11 @@ static void etraxfs_ser_reset(DeviceState *d)
static int etraxfs_ser_init(SysBusDevice *dev)
{
struct etrax_serial *s = FROM_SYSBUS(typeof (*s), dev);
- int ser_regs;
sysbus_init_irq(dev, &s->irq);
- ser_regs = cpu_register_io_memory(ser_read, ser_write, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, R_MAX * 4, ser_regs);
+ memory_region_init_io(&s->mmio, &ser_ops, s, "etraxfs-serial", R_MAX * 4);
+ sysbus_init_mmio_region(dev, &s->mmio);
+
s->chr = qdev_init_chardev(&dev->qdev);
if (s->chr)
qemu_chr_add_handlers(s->chr,
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 03/25] etrax-timer: Convert to MemoryRegion
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 01/25] etrax-pic: Convert to MemoryRegion Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 02/25] etrax-ser: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 04/25] etrax-dma: " Avi Kivity
` (22 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/etraxfs_timer.c | 31 ++++++++++++++++---------------
1 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/hw/etraxfs_timer.c b/hw/etraxfs_timer.c
index b08e574..57dc739 100644
--- a/hw/etraxfs_timer.c
+++ b/hw/etraxfs_timer.c
@@ -43,6 +43,7 @@
struct etrax_timer {
SysBusDevice busdev;
+ MemoryRegion mmio;
qemu_irq irq;
qemu_irq nmi;
@@ -72,7 +73,8 @@ struct etrax_timer {
uint32_t r_masked_intr;
};
-static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+timer_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct etrax_timer *t = opaque;
uint32_t r = 0;
@@ -239,9 +241,11 @@ static inline void timer_watchdog_update(struct etrax_timer *t, uint32_t value)
}
static void
-timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+timer_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val64, unsigned int size)
{
struct etrax_timer *t = opaque;
+ uint32_t value = val64;
switch (addr)
{
@@ -281,14 +285,14 @@ static inline void timer_watchdog_update(struct etrax_timer *t, uint32_t value)
}
}
-static CPUReadMemoryFunc * const timer_read[] = {
- NULL, NULL,
- &timer_readl,
-};
-
-static CPUWriteMemoryFunc * const timer_write[] = {
- NULL, NULL,
- &timer_writel,
+static const MemoryRegionOps timer_ops = {
+ .read = timer_read,
+ .write = timer_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4
+ }
};
static void etraxfs_timer_reset(void *opaque)
@@ -307,7 +311,6 @@ static void etraxfs_timer_reset(void *opaque)
static int etraxfs_timer_init(SysBusDevice *dev)
{
struct etrax_timer *t = FROM_SYSBUS(typeof (*t), dev);
- int timer_regs;
t->bh_t0 = qemu_bh_new(timer0_hit, t);
t->bh_t1 = qemu_bh_new(timer1_hit, t);
@@ -319,10 +322,8 @@ static int etraxfs_timer_init(SysBusDevice *dev)
sysbus_init_irq(dev, &t->irq);
sysbus_init_irq(dev, &t->nmi);
- timer_regs = cpu_register_io_memory(timer_read, timer_write, t,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x5c, timer_regs);
-
+ memory_region_init_io(&t->mmio, &timer_ops, t, "etraxfs-timer", 0x5c);
+ sysbus_init_mmio_region(dev, &t->mmio);
qemu_register_reset(etraxfs_timer_reset, t);
return 0;
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 04/25] etrax-dma: Convert to MemoryRegion
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (2 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 03/25] etrax-timer: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 05/25] etrax-eth: " Avi Kivity
` (21 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/etraxfs_dma.c | 43 +++++++++++++++++++++++++++----------------
1 files changed, 27 insertions(+), 16 deletions(-)
diff --git a/hw/etraxfs_dma.c b/hw/etraxfs_dma.c
index d3082ac..94bfb70 100644
--- a/hw/etraxfs_dma.c
+++ b/hw/etraxfs_dma.c
@@ -24,6 +24,7 @@
#include <stdio.h>
#include <sys/time.h>
#include "hw.h"
+#include "exec-memory.h"
#include "qemu-common.h"
#include "sysemu.h"
@@ -185,7 +186,7 @@ struct fs_dma_channel
struct fs_dma_ctrl
{
- int map;
+ MemoryRegion mmio;
int nr_channels;
struct fs_dma_channel *channels;
@@ -562,13 +563,17 @@ static uint32_t dma_rinvalid (void *opaque, target_phys_addr_t addr)
return 0;
}
-static uint32_t
-dma_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+dma_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct fs_dma_ctrl *ctrl = opaque;
int c;
uint32_t r = 0;
+ if (size != 4) {
+ dma_rinvalid(opaque, addr);
+ }
+
/* Make addr relative to this channel and bounded to nr regs. */
c = fs_channel(addr);
addr &= 0xff;
@@ -608,11 +613,17 @@ static uint32_t dma_rinvalid (void *opaque, target_phys_addr_t addr)
}
static void
-dma_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+dma_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val64, unsigned int size)
{
struct fs_dma_ctrl *ctrl = opaque;
+ uint32_t value = val64;
int c;
+ if (size != 4) {
+ dma_winvalid(opaque, addr, value);
+ }
+
/* Make addr relative to this channel and bounded to nr regs. */
c = fs_channel(addr);
addr &= 0xff;
@@ -668,16 +679,14 @@ static uint32_t dma_rinvalid (void *opaque, target_phys_addr_t addr)
}
}
-static CPUReadMemoryFunc * const dma_read[] = {
- &dma_rinvalid,
- &dma_rinvalid,
- &dma_readl,
-};
-
-static CPUWriteMemoryFunc * const dma_write[] = {
- &dma_winvalid,
- &dma_winvalid,
- &dma_writel,
+static const MemoryRegionOps dma_ops = {
+ .read = dma_read,
+ .write = dma_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 4
+ }
};
static int etraxfs_dmac_run(void *opaque)
@@ -750,7 +759,9 @@ static void DMA_run(void *opaque)
ctrl->nr_channels = nr_channels;
ctrl->channels = g_malloc0(sizeof ctrl->channels[0] * nr_channels);
- ctrl->map = cpu_register_io_memory(dma_read, dma_write, ctrl, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, nr_channels * 0x2000, ctrl->map);
+ memory_region_init_io(&ctrl->mmio, &dma_ops, ctrl, "etraxfs-dma",
+ nr_channels * 0x2000);
+ memory_region_add_subregion(get_system_memory(), base, &ctrl->mmio);
+
return ctrl;
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 05/25] etrax-eth: Convert to MemoryRegion
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (3 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 04/25] etrax-dma: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 06/25] serial: Convert serial_mm_init " Avi Kivity
` (20 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/etraxfs_eth.c | 30 ++++++++++++++++--------------
1 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/hw/etraxfs_eth.c b/hw/etraxfs_eth.c
index 48de6dc..246a279 100644
--- a/hw/etraxfs_eth.c
+++ b/hw/etraxfs_eth.c
@@ -320,6 +320,7 @@ static void mdio_cycle(struct qemu_mdio *bus)
struct fs_eth
{
SysBusDevice busdev;
+ MemoryRegion mmio;
NICState *nic;
NICConf conf;
int ethregs;
@@ -373,7 +374,8 @@ static void eth_validate_duplex(struct fs_eth *eth)
}
}
-static uint32_t eth_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+eth_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct fs_eth *eth = opaque;
uint32_t r = 0;
@@ -417,9 +419,11 @@ static void eth_update_ma(struct fs_eth *eth, int ma)
}
static void
-eth_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+eth_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val64, unsigned int size)
{
struct fs_eth *eth = opaque;
+ uint32_t value = val64;
addr >>= 2;
switch (addr)
@@ -553,14 +557,14 @@ static void eth_set_link(VLANClientState *nc)
eth->phy.link = !nc->link_down;
}
-static CPUReadMemoryFunc * const eth_read[] = {
- NULL, NULL,
- ð_readl,
-};
-
-static CPUWriteMemoryFunc * const eth_write[] = {
- NULL, NULL,
- ð_writel,
+static const MemoryRegionOps eth_ops = {
+ .read = eth_read,
+ .write = eth_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4
+ }
};
static void eth_cleanup(VLANClientState *nc)
@@ -589,7 +593,6 @@ static void eth_cleanup(VLANClientState *nc)
static int fs_eth_init(SysBusDevice *dev)
{
struct fs_eth *s = FROM_SYSBUS(typeof(*s), dev);
- int eth_regs;
if (!s->dma_out || !s->dma_in) {
hw_error("Unconnected ETRAX-FS Ethernet MAC.\n");
@@ -600,9 +603,8 @@ static int fs_eth_init(SysBusDevice *dev)
s->dma_in->client.opaque = s;
s->dma_in->client.pull = NULL;
- eth_regs = cpu_register_io_memory(eth_read, eth_write, s,
- DEVICE_LITTLE_ENDIAN);
- sysbus_init_mmio(dev, 0x5c, eth_regs);
+ memory_region_init_io(&s->mmio, ð_ops, s, "etraxfs-eth", 0x5c);
+ sysbus_init_mmio_region(dev, &s->mmio);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_etraxfs_info, &s->conf,
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 06/25] serial: Convert serial_mm_init to MemoryRegion
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (4 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 05/25] etrax-eth: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 07/25] serial: Use enum device_endian in serial_mm_init parameter Avi Kivity
` (19 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/serial.c | 145 +++++++++++++----------------------------------------------
1 files changed, 31 insertions(+), 114 deletions(-)
diff --git a/hw/serial.c b/hw/serial.c
index 2e6d212..310bfde 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -28,6 +28,7 @@
#include "pc.h"
#include "qemu-timer.h"
#include "sysemu.h"
+#include "exec-memory.h"
//#define DEBUG_SERIAL
@@ -153,11 +154,11 @@ struct SerialState {
int poll_msl;
struct QEMUTimer *modem_status_poll;
+ MemoryRegion io;
};
typedef struct ISASerialState {
ISADevice dev;
- MemoryRegion io;
uint32_t index;
uint32_t iobase;
uint32_t isairq;
@@ -786,8 +787,8 @@ static int serial_isa_initfn(ISADevice *dev)
serial_init_core(s);
qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 3);
- memory_region_init_io(&isa->io, &serial_io_ops, s, "serial", 8);
- isa_register_ioport(dev, &isa->io, isa->iobase);
+ memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8);
+ isa_register_ioport(dev, &s->io, isa->iobase);
return 0;
}
@@ -821,115 +822,37 @@ static int serial_isa_initfn(ISADevice *dev)
}
/* Memory mapped interface */
-static uint32_t serial_mm_readb(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
-
- return serial_ioport_read(s, addr >> s->it_shift) & 0xFF;
-}
-
-static void serial_mm_writeb(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- SerialState *s = opaque;
-
- serial_ioport_write(s, addr >> s->it_shift, value & 0xFF);
-}
-
-static uint32_t serial_mm_readw_be(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
- val = bswap16(val);
- return val;
-}
-
-static uint32_t serial_mm_readw_le(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
- return val;
-}
-
-static void serial_mm_writew_be(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- SerialState *s = opaque;
-
- value = bswap16(value);
- serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
-}
-
-static void serial_mm_writew_le(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
- SerialState *s = opaque;
-
- serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
-}
-
-static uint32_t serial_mm_readl_be(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift);
- val = bswap32(val);
- return val;
-}
-
-static uint32_t serial_mm_readl_le(void *opaque, target_phys_addr_t addr)
-{
- SerialState *s = opaque;
- uint32_t val;
-
- val = serial_ioport_read(s, addr >> s->it_shift);
- return val;
-}
-
-static void serial_mm_writel_be(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+static uint64_t serial_mm_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
SerialState *s = opaque;
-
- value = bswap32(value);
- serial_ioport_write(s, addr >> s->it_shift, value);
+ return serial_ioport_read(s, addr >> s->it_shift);
}
-static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+static void serial_mm_write(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned size)
{
SerialState *s = opaque;
-
+ value &= ~0u >> (32 - (size * 8));
serial_ioport_write(s, addr >> s->it_shift, value);
}
-static CPUReadMemoryFunc * const serial_mm_read_be[] = {
- &serial_mm_readb,
- &serial_mm_readw_be,
- &serial_mm_readl_be,
-};
-
-static CPUWriteMemoryFunc * const serial_mm_write_be[] = {
- &serial_mm_writeb,
- &serial_mm_writew_be,
- &serial_mm_writel_be,
-};
-
-static CPUReadMemoryFunc * const serial_mm_read_le[] = {
- &serial_mm_readb,
- &serial_mm_readw_le,
- &serial_mm_readl_le,
-};
-
-static CPUWriteMemoryFunc * const serial_mm_write_le[] = {
- &serial_mm_writeb,
- &serial_mm_writew_le,
- &serial_mm_writel_le,
+static const MemoryRegionOps serial_mm_ops[3] = {
+ [DEVICE_NATIVE_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ },
+ [DEVICE_LITTLE_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ },
+ [DEVICE_BIG_ENDIAN] = {
+ .read = serial_mm_read,
+ .write = serial_mm_write,
+ .endianness = DEVICE_BIG_ENDIAN,
+ },
};
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
@@ -938,7 +861,7 @@ static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr,
int be)
{
SerialState *s;
- int s_io_memory;
+ enum device_endian end;
s = g_malloc0(sizeof(SerialState));
@@ -950,17 +873,11 @@ static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr,
serial_init_core(s);
vmstate_register(NULL, base, &vmstate_serial, s);
+ end = (be ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN);
+ memory_region_init_io(&s->io, &serial_mm_ops[end], s,
+ "serial", 8 << it_shift);
if (ioregister) {
- if (be) {
- s_io_memory = cpu_register_io_memory(serial_mm_read_be,
- serial_mm_write_be, s,
- DEVICE_NATIVE_ENDIAN);
- } else {
- s_io_memory = cpu_register_io_memory(serial_mm_read_le,
- serial_mm_write_le, s,
- DEVICE_NATIVE_ENDIAN);
- }
- cpu_register_physical_memory(base, 8 << it_shift, s_io_memory);
+ memory_region_add_subregion(get_system_memory(), base, &s->io);
}
serial_update_msl(s);
return s;
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 07/25] serial: Use enum device_endian in serial_mm_init parameter
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (5 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 06/25] serial: Convert serial_mm_init " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 08/25] serial: Remove ioregister parameter from serial_mm_init Avi Kivity
` (18 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Richard Henderson <rth@twiddle.net>
The use of DEVICE_NATIVE_ENDIAN cleans up lots of ifdefs in
many of the callers.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/mips_jazz.c | 14 ++++----------
hw/mips_malta.c | 7 ++-----
hw/musicpal.c | 14 ++------------
hw/omap_uart.c | 17 ++---------------
hw/pc.h | 2 +-
hw/petalogix_ml605_mmu.c | 2 +-
hw/ppc405_uc.c | 8 ++++----
hw/ppc440.c | 4 ++--
hw/ppce500_mpc8544ds.c | 4 ++--
hw/pxa2xx.c | 33 +++++++++++++--------------------
hw/serial.c | 4 +---
hw/sm501.c | 8 +-------
hw/sun4u.c | 2 +-
hw/virtex_ml507.c | 3 ++-
14 files changed, 38 insertions(+), 84 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index ea07d32..9a87a8e 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -264,18 +264,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Serial ports */
if (serial_hds[0]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 1);
-#else
- serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 0);
-#endif
+ serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0],
+ 1, DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 1);
-#else
- serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 0);
-#endif
+ serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1],
+ 1, DEVICE_NATIVE_ENDIAN);
}
/* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 1ec1228..0b16914 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -446,11 +446,8 @@ static void malta_fpga_led_init(CharDriverState *chr)
s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
-#ifdef TARGET_WORDS_BIGENDIAN
- s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1, 1);
-#else
- s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1, 0);
-#endif
+ s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
+ 1, DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index 9b1f380..e79b07e 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1486,22 +1486,12 @@ static void musicpal_init(ram_addr_t ram_size,
pic[MP_TIMER4_IRQ], NULL);
if (serial_hds[0]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], 1, 1);
-#else
serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], 1, 0);
-#endif
+ serial_hds[0], 1, DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], 1, 1);
-#else
serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], 1, 0);
-#endif
+ serial_hds[1], 1, DEVICE_NATIVE_ENDIAN);
}
/* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index 191a0c2..66696ab 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -60,15 +60,9 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
s->base = base;
s->fclk = fclk;
s->irq = irq;
-#ifdef TARGET_WORDS_BIGENDIAN
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
chr ?: qemu_chr_new(label, "null", NULL), 1,
- 1);
-#else
- s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
- chr ?: qemu_chr_new(label, "null", NULL), 1,
- 0);
-#endif
+ DEVICE_NATIVE_ENDIAN);
return s;
}
@@ -182,15 +176,8 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
{
/* TODO: Should reuse or destroy current s->serial */
-#ifdef TARGET_WORDS_BIGENDIAN
- s->serial = serial_mm_init(s->base, 2, s->irq,
- omap_clk_getrate(s->fclk) / 16,
- chr ?: qemu_chr_new("null", "null", NULL), 1,
- 1);
-#else
s->serial = serial_mm_init(s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
chr ?: qemu_chr_new("null", "null", NULL), 1,
- 0);
-#endif
+ DEVICE_NATIVE_ENDIAN);
}
diff --git a/hw/pc.h b/hw/pc.h
index 7e6ddba..d70b81a 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -18,7 +18,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
CharDriverState *chr, int ioregister,
- int be);
+ enum device_endian);
static inline bool serial_isa_init(int index, CharDriverState *chr)
{
ISADevice *dev;
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index 38db521..97ff33d 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -185,7 +185,7 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
}
serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], 115200,
- serial_hds[0], 1, 0);
+ serial_hds[0], 1, DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 100 Mhz. */
xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 1000000);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index 9d5d2af..35584df 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2150,11 +2150,11 @@ static void ppc405cr_cpc_init (CPUState *env, clk_setup_t clk_setup[7],
/* Serial ports */
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, 1);
+ serial_hds[1], 1, DEVICE_BIG_ENDIAN);
}
/* IIC controller */
ppc405_i2c_init(0xef600500, pic[2]);
@@ -2505,11 +2505,11 @@ static void ppc405ep_cpc_init (CPUState *env, clk_setup_t clk_setup[8],
/* Serial ports */
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, 1);
+ serial_hds[1], 1, DEVICE_BIG_ENDIAN);
}
/* OCM */
ppc405_ocm_init(env);
diff --git a/hw/ppc440.c b/hw/ppc440.c
index 5885ff0..9dd9215 100644
--- a/hw/ppc440.c
+++ b/hw/ppc440.c
@@ -93,11 +93,11 @@
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, 1);
+ serial_hds[1], 1, DEVICE_BIG_ENDIAN);
}
return env;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 1274a3e..c3583f9 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -276,13 +276,13 @@ static void mpc8544ds_init(ram_addr_t ram_size,
if (serial_hds[0]) {
serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
0, mpic[12+26], 399193,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
0, mpic[12+26], 399193,
- serial_hds[0], 1, 1);
+ serial_hds[0], 1, DEVICE_BIG_ENDIAN);
}
/* General Utility device */
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 2aa8760..55b5d8c 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -2113,19 +2113,16 @@ static void pxa2xx_reset(void *opaque, int line, int level)
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
- for (i = 0; pxa270_serial[i].io_base; i ++)
- if (serial_hds[i])
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(pxa270_serial[i].io_base, 2,
- qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
- 14857000 / 16, serial_hds[i], 1, 1);
-#else
+ for (i = 0; pxa270_serial[i].io_base; i++) {
+ if (serial_hds[i]) {
serial_mm_init(pxa270_serial[i].io_base, 2,
- qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
- 14857000 / 16, serial_hds[i], 1, 0);
-#endif
- else
+ qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
+ 14857000 / 16, serial_hds[i], 1,
+ DEVICE_NATIVE_ENDIAN);
+ } else {
break;
+ }
+ }
if (serial_hds[i])
s->fir = pxa2xx_fir_init(0x40800000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP),
@@ -2248,20 +2245,16 @@ static void pxa2xx_reset(void *opaque, int line, int level)
qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI),
qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI));
- for (i = 0; pxa255_serial[i].io_base; i ++)
+ for (i = 0; pxa255_serial[i].io_base; i++) {
if (serial_hds[i]) {
-#ifdef TARGET_WORDS_BIGENDIAN
- serial_mm_init(pxa255_serial[i].io_base, 2,
- qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
- 14745600 / 16, serial_hds[i], 1, 1);
-#else
serial_mm_init(pxa255_serial[i].io_base, 2,
- qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
- 14745600 / 16, serial_hds[i], 1, 0);
-#endif
+ qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
+ 14745600 / 16, serial_hds[i], 1,
+ DEVICE_NATIVE_ENDIAN);
} else {
break;
}
+ }
if (serial_hds[i])
s->fir = pxa2xx_fir_init(0x40800000,
qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP),
diff --git a/hw/serial.c b/hw/serial.c
index 310bfde..a533c04 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -858,10 +858,9 @@ static void serial_mm_write(void *opaque, target_phys_addr_t addr,
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
CharDriverState *chr, int ioregister,
- int be)
+ enum device_endian end)
{
SerialState *s;
- enum device_endian end;
s = g_malloc0(sizeof(SerialState));
@@ -873,7 +872,6 @@ static void serial_mm_write(void *opaque, target_phys_addr_t addr,
serial_init_core(s);
vmstate_register(NULL, base, &vmstate_serial, s);
- end = (be ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN);
memory_region_init_io(&s->io, &serial_mm_ops[end], s,
"serial", 8 << it_shift);
if (ioregister) {
diff --git a/hw/sm501.c b/hw/sm501.c
index 1ed0a7e..26e2dfe 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -1440,15 +1440,9 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
/* bridge to serial emulation module */
if (chr) {
-#ifdef TARGET_WORDS_BIGENDIAN
serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
NULL, /* TODO : chain irq to IRL */
- 115200, chr, 1, 1);
-#else
- serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
- NULL, /* TODO : chain irq to IRL */
- 115200, chr, 1, 0);
-#endif
+ 115200, chr, 1, DEVICE_NATIVE_ENDIAN);
}
/* create qemu graphic console */
diff --git a/hw/sun4u.c b/hw/sun4u.c
index fbef350..b6d8171 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -771,7 +771,7 @@ static void sun4uv_init(ram_addr_t RAM_size,
i = 0;
if (hwdef->console_serial_base) {
serial_mm_init(hwdef->console_serial_base, 0, NULL, 115200,
- serial_hds[i], 1, 1);
+ serial_hds[i], 1, DEVICE_BIG_ENDIAN);
i++;
}
for(; i < MAX_SERIAL_PORTS; i++) {
diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index 7459b0b..a4721e3 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -226,7 +226,8 @@ static void virtex_init(ram_addr_t ram_size,
irq[i] = qdev_get_gpio_in(dev, i);
}
- serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0], 1, 0);
+ serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0],
+ 1, DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 62 Mhz. */
xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 08/25] serial: Remove ioregister parameter from serial_mm_init
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (6 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 07/25] serial: Use enum device_endian in serial_mm_init parameter Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 09/25] serial: Add MemoryRegion parameter to serial_mm_init Avi Kivity
` (17 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Richard Henderson <rth@twiddle.net>
All callers passed 1.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/mips_jazz.c | 4 ++--
hw/mips_malta.c | 2 +-
hw/musicpal.c | 4 ++--
hw/omap_uart.c | 4 ++--
hw/pc.h | 3 +--
hw/petalogix_ml605_mmu.c | 2 +-
hw/ppc405_uc.c | 8 ++++----
hw/ppc440.c | 4 ++--
hw/ppce500_mpc8544ds.c | 4 ++--
hw/pxa2xx.c | 4 ++--
hw/serial.c | 8 +++-----
hw/sm501.c | 2 +-
hw/sun4u.c | 2 +-
hw/virtex_ml507.c | 2 +-
14 files changed, 25 insertions(+), 28 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 9a87a8e..1f3998f 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -265,11 +265,11 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Serial ports */
if (serial_hds[0]) {
serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0],
- 1, DEVICE_NATIVE_ENDIAN);
+ DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1],
- 1, DEVICE_NATIVE_ENDIAN);
+ DEVICE_NATIVE_ENDIAN);
}
/* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 0b16914..84d1e47 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -447,7 +447,7 @@ static void malta_fpga_led_init(CharDriverState *chr)
s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
- 1, DEVICE_NATIVE_ENDIAN);
+ DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index e79b07e..2131db1 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1487,11 +1487,11 @@ static void musicpal_init(ram_addr_t ram_size,
if (serial_hds[0]) {
serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], 1, DEVICE_NATIVE_ENDIAN);
+ serial_hds[0], DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], 1, DEVICE_NATIVE_ENDIAN);
+ serial_hds[1], DEVICE_NATIVE_ENDIAN);
}
/* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index 66696ab..b43f04c 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -61,7 +61,7 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
s->fclk = fclk;
s->irq = irq;
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
- chr ?: qemu_chr_new(label, "null", NULL), 1,
+ chr ?: qemu_chr_new(label, "null", NULL),
DEVICE_NATIVE_ENDIAN);
return s;
}
@@ -178,6 +178,6 @@ void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
/* TODO: Should reuse or destroy current s->serial */
s->serial = serial_mm_init(s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
- chr ?: qemu_chr_new("null", "null", NULL), 1,
+ chr ?: qemu_chr_new("null", "null", NULL),
DEVICE_NATIVE_ENDIAN);
}
diff --git a/hw/pc.h b/hw/pc.h
index d70b81a..a0d7265 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -17,8 +17,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
CharDriverState *chr);
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
- CharDriverState *chr, int ioregister,
- enum device_endian);
+ CharDriverState *chr, enum device_endian);
static inline bool serial_isa_init(int index, CharDriverState *chr)
{
ISADevice *dev;
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index 97ff33d..ab89341 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -185,7 +185,7 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
}
serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], 115200,
- serial_hds[0], 1, DEVICE_LITTLE_ENDIAN);
+ serial_hds[0], DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 100 Mhz. */
xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 1000000);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index 35584df..924aada 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2150,11 +2150,11 @@ static void ppc405cr_cpc_init (CPUState *env, clk_setup_t clk_setup[7],
/* Serial ports */
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[1], DEVICE_BIG_ENDIAN);
}
/* IIC controller */
ppc405_i2c_init(0xef600500, pic[2]);
@@ -2505,11 +2505,11 @@ static void ppc405ep_cpc_init (CPUState *env, clk_setup_t clk_setup[8],
/* Serial ports */
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[1], DEVICE_BIG_ENDIAN);
}
/* OCM */
ppc405_ocm_init(env);
diff --git a/hw/ppc440.c b/hw/ppc440.c
index 9dd9215..0cd7bca 100644
--- a/hw/ppc440.c
+++ b/hw/ppc440.c
@@ -93,11 +93,11 @@
if (serial_hds[0] != NULL) {
serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[1], DEVICE_BIG_ENDIAN);
}
return env;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index c3583f9..fc46991 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -276,13 +276,13 @@ static void mpc8544ds_init(ram_addr_t ram_size,
if (serial_hds[0]) {
serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
0, mpic[12+26], 399193,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
0, mpic[12+26], 399193,
- serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[0], DEVICE_BIG_ENDIAN);
}
/* General Utility device */
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 55b5d8c..60f4c34 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -2117,7 +2117,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
if (serial_hds[i]) {
serial_mm_init(pxa270_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
- 14857000 / 16, serial_hds[i], 1,
+ 14857000 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
} else {
break;
@@ -2249,7 +2249,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
if (serial_hds[i]) {
serial_mm_init(pxa255_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
- 14745600 / 16, serial_hds[i], 1,
+ 14745600 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
} else {
break;
diff --git a/hw/serial.c b/hw/serial.c
index a533c04..0fafc1d 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -857,8 +857,7 @@ static void serial_mm_write(void *opaque, target_phys_addr_t addr,
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
- CharDriverState *chr, int ioregister,
- enum device_endian end)
+ CharDriverState *chr, enum device_endian end)
{
SerialState *s;
@@ -874,9 +873,8 @@ static void serial_mm_write(void *opaque, target_phys_addr_t addr,
memory_region_init_io(&s->io, &serial_mm_ops[end], s,
"serial", 8 << it_shift);
- if (ioregister) {
- memory_region_add_subregion(get_system_memory(), base, &s->io);
- }
+ memory_region_add_subregion(get_system_memory(), base, &s->io);
+
serial_update_msl(s);
return s;
}
diff --git a/hw/sm501.c b/hw/sm501.c
index 26e2dfe..fddf21a 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -1442,7 +1442,7 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
if (chr) {
serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
NULL, /* TODO : chain irq to IRL */
- 115200, chr, 1, DEVICE_NATIVE_ENDIAN);
+ 115200, chr, DEVICE_NATIVE_ENDIAN);
}
/* create qemu graphic console */
diff --git a/hw/sun4u.c b/hw/sun4u.c
index b6d8171..60e1e9d 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -771,7 +771,7 @@ static void sun4uv_init(ram_addr_t RAM_size,
i = 0;
if (hwdef->console_serial_base) {
serial_mm_init(hwdef->console_serial_base, 0, NULL, 115200,
- serial_hds[i], 1, DEVICE_BIG_ENDIAN);
+ serial_hds[i], DEVICE_BIG_ENDIAN);
i++;
}
for(; i < MAX_SERIAL_PORTS; i++) {
diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index a4721e3..8c52a06 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -227,7 +227,7 @@ static void virtex_init(ram_addr_t ram_size,
}
serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0],
- 1, DEVICE_LITTLE_ENDIAN);
+ DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 62 Mhz. */
xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 09/25] serial: Add MemoryRegion parameter to serial_mm_init
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (7 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 08/25] serial: Remove ioregister parameter from serial_mm_init Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 10/25] ppc405: Pass in address_space_mem to ppc405{cr, ep}_init Avi Kivity
` (16 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Richard Henderson <rth@twiddle.net>
Remove the get_system_memory() call from serial_mm_init, pushing
it back into the callers. In many cases we already have the
system memory region available.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/mips_jazz.c | 8 ++++----
hw/mips_malta.c | 4 ++--
hw/musicpal.c | 8 ++++----
hw/omap_uart.c | 6 ++++--
hw/pc.h | 7 ++++---
hw/petalogix_ml605_mmu.c | 6 ++++--
hw/ppc405_uc.c | 20 ++++++++++++--------
hw/ppc440.c | 11 +++++++----
hw/ppce500_mpc8544ds.c | 6 ++++--
hw/pxa2xx.c | 5 +++--
hw/serial.c | 10 +++++-----
hw/sm501.c | 4 +++-
hw/sun4u.c | 5 +++--
hw/virtex_ml507.c | 6 ++++--
14 files changed, 63 insertions(+), 43 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 1f3998f..14beea2 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -264,12 +264,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Serial ports */
if (serial_hds[0]) {
- serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0],
- DEVICE_NATIVE_ENDIAN);
+ serial_mm_init(address_space, 0x80006000, 0, rc4030[8], 8000000/16,
+ serial_hds[0], DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
- serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1],
- DEVICE_NATIVE_ENDIAN);
+ serial_mm_init(address_space, 0x80007000, 0, rc4030[9], 8000000/16,
+ serial_hds[1], DEVICE_NATIVE_ENDIAN);
}
/* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 84d1e47..bb49749 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -446,8 +446,8 @@ static void malta_fpga_led_init(CharDriverState *chr)
s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
- s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
- DEVICE_NATIVE_ENDIAN);
+ s->uart = serial_mm_init(address_space, base + 0x900, 3, uart_irq,
+ 230400, uart_chr, DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index 2131db1..20553b5 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1486,12 +1486,12 @@ static void musicpal_init(ram_addr_t ram_size,
pic[MP_TIMER4_IRQ], NULL);
if (serial_hds[0]) {
- serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], DEVICE_NATIVE_ENDIAN);
+ serial_mm_init(address_space_mem, MP_UART1_BASE, 2, pic[MP_UART1_IRQ],
+ 1825000, serial_hds[0], DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
- serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], DEVICE_NATIVE_ENDIAN);
+ serial_mm_init(address_space_mem, MP_UART2_BASE, 2, pic[MP_UART2_IRQ],
+ 1825000, serial_hds[1], DEVICE_NATIVE_ENDIAN);
}
/* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index b43f04c..19f8e6e 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -22,6 +22,7 @@
#include "omap.h"
/* We use pc-style serial ports. */
#include "pc.h"
+#include "exec-memory.h"
/* UARTs */
struct omap_uart_s {
@@ -60,7 +61,8 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
s->base = base;
s->fclk = fclk;
s->irq = irq;
- s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
+ s->serial = serial_mm_init(get_system_memory(), base, 2, irq,
+ omap_clk_getrate(fclk)/16,
chr ?: qemu_chr_new(label, "null", NULL),
DEVICE_NATIVE_ENDIAN);
return s;
@@ -176,7 +178,7 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
{
/* TODO: Should reuse or destroy current s->serial */
- s->serial = serial_mm_init(s->base, 2, s->irq,
+ s->serial = serial_mm_init(get_system_memory(), s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
chr ?: qemu_chr_new("null", "null", NULL),
DEVICE_NATIVE_ENDIAN);
diff --git a/hw/pc.h b/hw/pc.h
index a0d7265..f3e21b6 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -15,9 +15,10 @@
SerialState *serial_init(int base, qemu_irq irq, int baudbase,
CharDriverState *chr);
-SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
- qemu_irq irq, int baudbase,
- CharDriverState *chr, enum device_endian);
+SerialState *serial_mm_init(MemoryRegion *address_space,
+ target_phys_addr_t base, int it_shift,
+ qemu_irq irq, int baudbase,
+ CharDriverState *chr, enum device_endian);
static inline bool serial_isa_init(int index, CharDriverState *chr)
{
ISADevice *dev;
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index ab89341..2a0f7fd 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -38,6 +38,7 @@
#include "elf.h"
#include "blockdev.h"
#include "pc.h"
+#include "exec-memory.h"
#include "microblaze_pic_cpu.h"
#include "xilinx_axidma.h"
@@ -141,6 +142,7 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
+ MemoryRegion *address_space_mem = get_system_memory();
DeviceState *dev;
CPUState *env;
int kernel_size;
@@ -184,8 +186,8 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
irq[i] = qdev_get_gpio_in(dev, i);
}
- serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], 115200,
- serial_hds[0], DEVICE_LITTLE_ENDIAN);
+ serial_mm_init(address_space_mem, UART16550_BASEADDR + 0x1000, 2,
+ irq[5], 115200, serial_hds[0], DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 100 Mhz. */
xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 1000000);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index 924aada..86cf768 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2149,12 +2149,14 @@ static void ppc405cr_cpc_init (CPUState *env, clk_setup_t clk_setup[7],
ppc405_dma_init(env, dma_irqs);
/* Serial ports */
if (serial_hds[0] != NULL) {
- serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
+ DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
+ DEVICE_BIG_ENDIAN);
}
/* IIC controller */
ppc405_i2c_init(0xef600500, pic[2]);
@@ -2504,12 +2506,14 @@ static void ppc405ep_cpc_init (CPUState *env, clk_setup_t clk_setup[8],
ppc405_gpio_init(0xef600700);
/* Serial ports */
if (serial_hds[0] != NULL) {
- serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
+ DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
+ DEVICE_BIG_ENDIAN);
}
/* OCM */
ppc405_ocm_init(env);
diff --git a/hw/ppc440.c b/hw/ppc440.c
index 0cd7bca..1d1376e 100644
--- a/hw/ppc440.c
+++ b/hw/ppc440.c
@@ -20,6 +20,7 @@
#include "ppc405.h"
#include "sysemu.h"
#include "kvm.h"
+#include "exec-memory.h"
#define PPC440EP_PCI_CONFIG 0xeec00000
#define PPC440EP_PCI_INTACK 0xeed00000
@@ -92,12 +93,14 @@
isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN);
if (serial_hds[0] != NULL) {
- serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[0], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
+ DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
- serial_hds[1], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
+ DEVICE_BIG_ENDIAN);
}
return env;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index fc46991..274b37c 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -32,6 +32,7 @@
#include "loader.h"
#include "elf.h"
#include "sysbus.h"
+#include "exec-memory.h"
#define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
#define UIMAGE_LOAD_BASE 0
@@ -225,6 +226,7 @@ static void mpc8544ds_init(ram_addr_t ram_size,
const char *initrd_filename,
const char *cpu_model)
{
+ MemoryRegion *address_space_mem = get_system_memory();
PCIBus *pci_bus;
CPUState *env;
uint64_t elf_entry;
@@ -274,13 +276,13 @@ static void mpc8544ds_init(ram_addr_t ram_size,
/* Serial */
if (serial_hds[0]) {
- serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
+ serial_mm_init(address_space_mem, MPC8544_SERIAL0_REGS_BASE,
0, mpic[12+26], 399193,
serial_hds[0], DEVICE_BIG_ENDIAN);
}
if (serial_hds[1]) {
- serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
+ serial_mm_init(address_space_mem, MPC8544_SERIAL1_REGS_BASE,
0, mpic[12+26], 399193,
serial_hds[0], DEVICE_BIG_ENDIAN);
}
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 60f4c34..c47e698 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -15,6 +15,7 @@
#include "ssi.h"
#include "qemu-char.h"
#include "blockdev.h"
+#include "exec-memory.h"
static struct {
target_phys_addr_t io_base;
@@ -2115,7 +2116,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
for (i = 0; pxa270_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(pxa270_serial[i].io_base, 2,
+ serial_mm_init(get_system_memory(), pxa270_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
14857000 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
@@ -2247,7 +2248,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
for (i = 0; pxa255_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(pxa255_serial[i].io_base, 2,
+ serial_mm_init(get_system_memory(), pxa255_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
14745600 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
diff --git a/hw/serial.c b/hw/serial.c
index 0fafc1d..d35c7a9 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -28,7 +28,6 @@
#include "pc.h"
#include "qemu-timer.h"
#include "sysemu.h"
-#include "exec-memory.h"
//#define DEBUG_SERIAL
@@ -855,9 +854,10 @@ static void serial_mm_write(void *opaque, target_phys_addr_t addr,
},
};
-SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
- qemu_irq irq, int baudbase,
- CharDriverState *chr, enum device_endian end)
+SerialState *serial_mm_init(MemoryRegion *address_space,
+ target_phys_addr_t base, int it_shift,
+ qemu_irq irq, int baudbase,
+ CharDriverState *chr, enum device_endian end)
{
SerialState *s;
@@ -873,7 +873,7 @@ static void serial_mm_write(void *opaque, target_phys_addr_t addr,
memory_region_init_io(&s->io, &serial_mm_ops[end], s,
"serial", 8 << it_shift);
- memory_region_add_subregion(get_system_memory(), base, &s->io);
+ memory_region_add_subregion(address_space, base, &s->io);
serial_update_msl(s);
return s;
diff --git a/hw/sm501.c b/hw/sm501.c
index fddf21a..6b54717 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -30,6 +30,7 @@
#include "sysbus.h"
#include "qdev-addr.h"
#include "range.h"
+#include "exec-memory.h"
/*
* Status: 2010/05/07
@@ -1440,7 +1441,8 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
/* bridge to serial emulation module */
if (chr) {
- serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
+ serial_mm_init(get_system_memory(),
+ base + MMIO_BASE_OFFSET + SM501_UART0, 2,
NULL, /* TODO : chain irq to IRL */
115200, chr, DEVICE_NATIVE_ENDIAN);
}
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 60e1e9d..28a5374 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -38,6 +38,7 @@
#include "loader.h"
#include "elf.h"
#include "blockdev.h"
+#include "exec-memory.h"
//#define DEBUG_IRQ
//#define DEBUG_EBUS
@@ -770,8 +771,8 @@ static void sun4uv_init(ram_addr_t RAM_size,
i = 0;
if (hwdef->console_serial_base) {
- serial_mm_init(hwdef->console_serial_base, 0, NULL, 115200,
- serial_hds[i], DEVICE_BIG_ENDIAN);
+ serial_mm_init(get_system_memory(), hwdef->console_serial_base, 0,
+ NULL, 115200, serial_hds[i], DEVICE_BIG_ENDIAN);
i++;
}
for(; i < MAX_SERIAL_PORTS; i++) {
diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index 8c52a06..68bf53a 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -34,6 +34,7 @@
#include "loader.h"
#include "elf.h"
#include "qemu-log.h"
+#include "exec-memory.h"
#include "ppc.h"
#include "ppc4xx.h"
@@ -191,6 +192,7 @@ static void virtex_init(ram_addr_t ram_size,
const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
+ MemoryRegion *address_space_mem = get_system_memory();
DeviceState *dev;
CPUState *env;
target_phys_addr_t ram_base = 0;
@@ -226,8 +228,8 @@ static void virtex_init(ram_addr_t ram_size,
irq[i] = qdev_get_gpio_in(dev, i);
}
- serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0],
- DEVICE_LITTLE_ENDIAN);
+ serial_mm_init(address_space_mem, 0x83e01003ULL, 2, irq[9], 115200,
+ serial_hds[0], DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 62 Mhz. */
xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 10/25] ppc405: Pass in address_space_mem to ppc405{cr, ep}_init
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (8 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 09/25] serial: Add MemoryRegion parameter to serial_mm_init Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 11/25] ppc440: Pass in address_space_mem to ppc440ep_init Avi Kivity
` (15 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/ppc405.h | 22 ++++++++++++----------
hw/ppc405_boards.c | 8 ++++----
hw/ppc405_uc.c | 30 ++++++++++++++++--------------
3 files changed, 32 insertions(+), 28 deletions(-)
diff --git a/hw/ppc405.h b/hw/ppc405.h
index f0e81a6..d8fdf09 100644
--- a/hw/ppc405.h
+++ b/hw/ppc405.h
@@ -59,16 +59,18 @@ struct ppc4xx_bd_info_t {
ram_addr_t ppc405_set_bootinfo (CPUState *env, ppc4xx_bd_info_t *bd,
uint32_t flags);
-CPUState *ppc405cr_init (MemoryRegion ram_memories[4],
- target_phys_addr_t ram_bases[4],
- target_phys_addr_t ram_sizes[4],
- uint32_t sysclk, qemu_irq **picp,
- int do_init);
-CPUState *ppc405ep_init (MemoryRegion ram_memories[2],
- target_phys_addr_t ram_bases[2],
- target_phys_addr_t ram_sizes[2],
- uint32_t sysclk, qemu_irq **picp,
- int do_init);
+CPUState *ppc405cr_init(MemoryRegion *address_space_mem,
+ MemoryRegion ram_memories[4],
+ target_phys_addr_t ram_bases[4],
+ target_phys_addr_t ram_sizes[4],
+ uint32_t sysclk, qemu_irq **picp,
+ int do_init);
+CPUState *ppc405ep_init(MemoryRegion *address_space_mem,
+ MemoryRegion ram_memories[2],
+ target_phys_addr_t ram_bases[2],
+ target_phys_addr_t ram_sizes[2],
+ uint32_t sysclk, qemu_irq **picp,
+ int do_init);
/* IBM STBxxx microcontrollers */
CPUState *ppc_stb025_init (MemoryRegion ram_memories[2],
target_phys_addr_t ram_bases[2],
diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c
index e6c8ac6..ca65ac3 100644
--- a/hw/ppc405_boards.c
+++ b/hw/ppc405_boards.c
@@ -207,8 +207,8 @@ static void ref405ep_init (ram_addr_t ram_size,
#ifdef DEBUG_BOARD_INIT
printf("%s: register cpu\n", __func__);
#endif
- env = ppc405ep_init(ram_memories, ram_bases, ram_sizes, 33333333, &pic,
- kernel_filename == NULL ? 0 : 1);
+ env = ppc405ep_init(get_system_memory(), ram_memories, ram_bases, ram_sizes,
+ 33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate SRAM */
sram_size = 512 * 1024;
sram_offset = qemu_ram_alloc(NULL, "ef405ep.sram", sram_size);
@@ -534,8 +534,8 @@ static void taihu_405ep_init(ram_addr_t ram_size,
#ifdef DEBUG_BOARD_INIT
printf("%s: register cpu\n", __func__);
#endif
- ppc405ep_init(ram_memories, ram_bases, ram_sizes, 33333333, &pic,
- kernel_filename == NULL ? 0 : 1);
+ ppc405ep_init(get_system_memory(), ram_memories, ram_bases, ram_sizes,
+ 33333333, &pic, kernel_filename == NULL ? 0 : 1);
/* allocate and load BIOS */
#ifdef DEBUG_BOARD_INIT
printf("%s: register BIOS\n", __func__);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index 86cf768..a6e7431 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2107,11 +2107,12 @@ static void ppc405cr_cpc_init (CPUState *env, clk_setup_t clk_setup[7],
qemu_register_reset(ppc405cr_cpc_reset, cpc);
}
-CPUState *ppc405cr_init (MemoryRegion ram_memories[4],
- target_phys_addr_t ram_bases[4],
- target_phys_addr_t ram_sizes[4],
- uint32_t sysclk, qemu_irq **picp,
- int do_init)
+CPUState *ppc405cr_init(MemoryRegion *address_space_mem,
+ MemoryRegion ram_memories[4],
+ target_phys_addr_t ram_bases[4],
+ target_phys_addr_t ram_sizes[4],
+ uint32_t sysclk, qemu_irq **picp,
+ int do_init)
{
clk_setup_t clk_setup[PPC405CR_CLK_NB];
qemu_irq dma_irqs[4];
@@ -2149,12 +2150,12 @@ static void ppc405cr_cpc_init (CPUState *env, clk_setup_t clk_setup[7],
ppc405_dma_init(env, dma_irqs);
/* Serial ports */
if (serial_hds[0] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
DEVICE_BIG_ENDIAN);
}
@@ -2455,11 +2456,12 @@ static void ppc405ep_cpc_init (CPUState *env, clk_setup_t clk_setup[8],
#endif
}
-CPUState *ppc405ep_init (MemoryRegion ram_memories[2],
- target_phys_addr_t ram_bases[2],
- target_phys_addr_t ram_sizes[2],
- uint32_t sysclk, qemu_irq **picp,
- int do_init)
+CPUState *ppc405ep_init(MemoryRegion *address_space_mem,
+ MemoryRegion ram_memories[2],
+ target_phys_addr_t ram_bases[2],
+ target_phys_addr_t ram_sizes[2],
+ uint32_t sysclk, qemu_irq **picp,
+ int do_init)
{
clk_setup_t clk_setup[PPC405EP_CLK_NB], tlb_clk_setup;
qemu_irq dma_irqs[4], gpt_irqs[5], mal_irqs[4];
@@ -2506,12 +2508,12 @@ static void ppc405ep_cpc_init (CPUState *env, clk_setup_t clk_setup[8],
ppc405_gpio_init(0xef600700);
/* Serial ports */
if (serial_hds[0] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
DEVICE_BIG_ENDIAN);
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 11/25] ppc440: Pass in address_space_mem to ppc440ep_init
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (9 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 10/25] ppc405: Pass in address_space_mem to ppc405{cr, ep}_init Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 12/25] pxa: Pass in address_space to pxa{255, 270}_init Avi Kivity
` (14 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/ppc440.c | 11 +++++------
hw/ppc440.h | 6 +++---
hw/ppc440_bamboo.c | 5 ++++-
3 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/hw/ppc440.c b/hw/ppc440.c
index 1d1376e..cd8a95d 100644
--- a/hw/ppc440.c
+++ b/hw/ppc440.c
@@ -20,7 +20,6 @@
#include "ppc405.h"
#include "sysemu.h"
#include "kvm.h"
-#include "exec-memory.h"
#define PPC440EP_PCI_CONFIG 0xeec00000
#define PPC440EP_PCI_INTACK 0xeed00000
@@ -35,9 +34,9 @@
256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0
};
-CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
- const unsigned int pci_irq_nrs[4], int do_init,
- const char *cpu_model)
+CPUState *ppc440ep_init(MemoryRegion *address_space_mem, ram_addr_t *ram_size,
+ PCIBus **pcip, const unsigned int pci_irq_nrs[4],
+ int do_init, const char *cpu_model)
{
MemoryRegion *ram_memories
= g_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories));
@@ -93,12 +92,12 @@
isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN);
if (serial_hds[0] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600300, 0, pic[0],
+ serial_mm_init(address_space_mem, 0xef600300, 0, pic[0],
PPC_SERIAL_MM_BAUDBASE, serial_hds[0],
DEVICE_BIG_ENDIAN);
}
if (serial_hds[1] != NULL) {
- serial_mm_init(get_system_memory(), 0xef600400, 0, pic[1],
+ serial_mm_init(address_space_mem, 0xef600400, 0, pic[1],
PPC_SERIAL_MM_BAUDBASE, serial_hds[1],
DEVICE_BIG_ENDIAN);
}
diff --git a/hw/ppc440.h b/hw/ppc440.h
index a40f917..9c27c36 100644
--- a/hw/ppc440.h
+++ b/hw/ppc440.h
@@ -14,8 +14,8 @@
#include "hw.h"
-CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
- const unsigned int pci_irq_nrs[4], int do_init,
- const char *cpu_model);
+CPUState *ppc440ep_init(MemoryRegion *address_space, ram_addr_t *ram_size,
+ PCIBus **pcip, const unsigned int pci_irq_nrs[4],
+ int do_init, const char *cpu_model);
#endif
diff --git a/hw/ppc440_bamboo.c b/hw/ppc440_bamboo.c
index 1addb68..9228939 100644
--- a/hw/ppc440_bamboo.c
+++ b/hw/ppc440_bamboo.c
@@ -23,6 +23,7 @@
#include "device_tree.h"
#include "loader.h"
#include "elf.h"
+#include "exec-memory.h"
#define BINARY_DEVICE_TREE_FILE "bamboo.dtb"
@@ -96,6 +97,7 @@ static void bamboo_init(ram_addr_t ram_size,
const char *cpu_model)
{
unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 };
+ MemoryRegion *address_space_mem = get_system_memory();
PCIBus *pcibus;
CPUState *env;
uint64_t elf_entry;
@@ -107,7 +109,8 @@ static void bamboo_init(ram_addr_t ram_size,
int i;
/* Setup CPU. */
- env = ppc440ep_init(&ram_size, &pcibus, pci_irq_nrs, 1, cpu_model);
+ env = ppc440ep_init(address_space_mem, &ram_size, &pcibus,
+ pci_irq_nrs, 1, cpu_model);
if (pcibus) {
/* Register network interfaces. */
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 12/25] pxa: Pass in address_space to pxa{255, 270}_init
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (10 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 11/25] ppc440: Pass in address_space_mem to ppc440ep_init Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 13/25] sm501: Pass address_space_mem to sm501_init Avi Kivity
` (13 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/gumstix.c | 7 +++++--
hw/mainstone.c | 2 +-
hw/pxa.h | 7 +++++--
hw/pxa2xx.c | 10 +++++-----
hw/spitz.c | 4 +++-
hw/tosa.c | 4 +++-
hw/z2.c | 4 +++-
7 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/hw/gumstix.c b/hw/gumstix.c
index b8b76f4..686a5ed 100644
--- a/hw/gumstix.c
+++ b/hw/gumstix.c
@@ -38,6 +38,7 @@
#include "devices.h"
#include "boards.h"
#include "blockdev.h"
+#include "exec-memory.h"
static const int sector_len = 128 * 1024;
@@ -49,11 +50,12 @@ static void connex_init(ram_addr_t ram_size,
PXA2xxState *cpu;
DriveInfo *dinfo;
int be;
+ MemoryRegion *address_space_mem = get_system_memory();
uint32_t connex_rom = 0x01000000;
uint32_t connex_ram = 0x04000000;
- cpu = pxa255_init(connex_ram);
+ cpu = pxa255_init(address_space_mem, connex_ram);
dinfo = drive_get(IF_PFLASH, 0, 0);
if (!dinfo) {
@@ -87,11 +89,12 @@ static void verdex_init(ram_addr_t ram_size,
PXA2xxState *cpu;
DriveInfo *dinfo;
int be;
+ MemoryRegion *address_space_mem = get_system_memory();
uint32_t verdex_rom = 0x02000000;
uint32_t verdex_ram = 0x10000000;
- cpu = pxa270_init(verdex_ram, cpu_model ?: "pxa270-c0");
+ cpu = pxa270_init(address_space_mem, verdex_ram, cpu_model ?: "pxa270-c0");
dinfo = drive_get(IF_PFLASH, 0, 0);
if (!dinfo) {
diff --git a/hw/mainstone.c b/hw/mainstone.c
index 336f31e..3ed6649 100644
--- a/hw/mainstone.c
+++ b/hw/mainstone.c
@@ -110,7 +110,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
cpu_model = "pxa270-c5";
/* Setup CPU & memory */
- cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
+ cpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);
diff --git a/hw/pxa.h b/hw/pxa.h
index 859fc67..1204165 100644
--- a/hw/pxa.h
+++ b/hw/pxa.h
@@ -9,6 +9,8 @@
#ifndef PXA_H
# define PXA_H "pxa.h"
+#include "memory.h"
+
/* Interrupt numbers */
# define PXA2XX_PIC_SSP3 0
# define PXA2XX_PIC_USBH2 2
@@ -173,7 +175,8 @@ struct PXA2xxI2SState {
# define PA_FMT "0x%08lx"
# define REG_FMT "0x" TARGET_FMT_plx
-PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision);
-PXA2xxState *pxa255_init(unsigned int sdram_size);
+PXA2xxState *pxa270_init(MemoryRegion *address_space, unsigned int sdram_size,
+ const char *revision);
+PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size);
#endif /* PXA_H */
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index c47e698..70d7c8a 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -15,7 +15,6 @@
#include "ssi.h"
#include "qemu-char.h"
#include "blockdev.h"
-#include "exec-memory.h"
static struct {
target_phys_addr_t io_base;
@@ -2060,7 +2059,8 @@ static void pxa2xx_reset(void *opaque, int line, int level)
}
/* Initialise a PXA270 integrated chip (ARM based core). */
-PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
+PXA2xxState *pxa270_init(MemoryRegion *address_space,
+ unsigned int sdram_size, const char *revision)
{
PXA2xxState *s;
int iomemtype, i;
@@ -2116,7 +2116,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
for (i = 0; pxa270_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(get_system_memory(), pxa270_serial[i].io_base, 2,
+ serial_mm_init(address_space, pxa270_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
14857000 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
@@ -2199,7 +2199,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
}
/* Initialise a PXA255 integrated chip (ARM based core). */
-PXA2xxState *pxa255_init(unsigned int sdram_size)
+PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
{
PXA2xxState *s;
int iomemtype, i;
@@ -2248,7 +2248,7 @@ static void pxa2xx_reset(void *opaque, int line, int level)
for (i = 0; pxa255_serial[i].io_base; i++) {
if (serial_hds[i]) {
- serial_mm_init(get_system_memory(), pxa255_serial[i].io_base, 2,
+ serial_mm_init(address_space, pxa255_serial[i].io_base, 2,
qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
14745600 / 16, serial_hds[i],
DEVICE_NATIVE_ENDIAN);
diff --git a/hw/spitz.c b/hw/spitz.c
index 0adae59..6f8a94c 100644
--- a/hw/spitz.c
+++ b/hw/spitz.c
@@ -24,6 +24,7 @@
#include "boards.h"
#include "blockdev.h"
#include "sysbus.h"
+#include "exec-memory.h"
#undef REG_FMT
#define REG_FMT "0x%02lx"
@@ -896,12 +897,13 @@ static void spitz_common_init(ram_addr_t ram_size,
{
PXA2xxState *cpu;
DeviceState *scp0, *scp1 = NULL;
+ MemoryRegion *address_space_mem = get_system_memory();
if (!cpu_model)
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
/* Setup CPU & memory */
- cpu = pxa270_init(spitz_binfo.ram_size, cpu_model);
+ cpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
diff --git a/hw/tosa.c b/hw/tosa.c
index 7b407f4..92702d1 100644
--- a/hw/tosa.c
+++ b/hw/tosa.c
@@ -20,6 +20,7 @@
#include "ssi.h"
#include "blockdev.h"
#include "sysbus.h"
+#include "exec-memory.h"
#define TOSA_RAM 0x04000000
#define TOSA_ROM 0x00800000
@@ -206,6 +207,7 @@ static void tosa_init(ram_addr_t ram_size,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
+ MemoryRegion *address_space_mem = get_system_memory();
PXA2xxState *cpu;
TC6393xbState *tmio;
DeviceState *scp0, *scp1;
@@ -213,7 +215,7 @@ static void tosa_init(ram_addr_t ram_size,
if (!cpu_model)
cpu_model = "pxa255";
- cpu = pxa255_init(tosa_binfo.ram_size);
+ cpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
cpu_register_physical_memory(0, TOSA_ROM,
qemu_ram_alloc(NULL, "tosa.rom", TOSA_ROM) | IO_MEM_ROM);
diff --git a/hw/z2.c b/hw/z2.c
index b6ae608..a03bb33 100644
--- a/hw/z2.c
+++ b/hw/z2.c
@@ -20,6 +20,7 @@
#include "blockdev.h"
#include "console.h"
#include "audio/audio.h"
+#include "exec-memory.h"
#ifdef DEBUG_Z2
#define DPRINTF(fmt, ...) \
@@ -277,6 +278,7 @@ static void z2_init(ram_addr_t ram_size,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
+ MemoryRegion *address_space_mem = get_system_memory();
uint32_t sector_len = 0x10000;
PXA2xxState *cpu;
DriveInfo *dinfo;
@@ -290,7 +292,7 @@ static void z2_init(ram_addr_t ram_size,
}
/* Setup CPU & memory */
- cpu = pxa270_init(z2_binfo.ram_size, cpu_model);
+ cpu = pxa270_init(address_space_mem, z2_binfo.ram_size, cpu_model);
#ifdef TARGET_WORDS_BIGENDIAN
be = 1;
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 13/25] sm501: Pass address_space_mem to sm501_init
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (11 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 12/25] pxa: Pass in address_space to pxa{255, 270}_init Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 14/25] sun4u: Pass address_space_mem to sun4uv_init Avi Kivity
` (12 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/devices.h | 6 +++++-
hw/r2d.c | 5 ++++-
hw/sm501.c | 7 +++----
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/hw/devices.h b/hw/devices.h
index 07fda83..8ac384f 100644
--- a/hw/devices.h
+++ b/hw/devices.h
@@ -1,6 +1,9 @@
#ifndef QEMU_DEVICES_H
#define QEMU_DEVICES_H
+/* ??? Not all users of this file can include cpu-common.h. */
+struct MemoryRegion;
+
/* Devices that have nowhere better to go. */
/* smc91c111.c */
@@ -57,7 +60,8 @@ qemu_irq *tc6393xb_gpio_in_get(TC6393xbState *s);
qemu_irq tc6393xb_l3v_get(TC6393xbState *s);
/* sm501.c */
-void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
+void sm501_init(struct MemoryRegion *address_space_mem, uint32_t base,
+ uint32_t local_mem_bytes, qemu_irq irq,
CharDriverState *chr);
#endif
diff --git a/hw/r2d.c b/hw/r2d.c
index b8b0df3..82377a0 100644
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -37,6 +37,7 @@
#include "usb.h"
#include "flash.h"
#include "blockdev.h"
+#include "exec-memory.h"
#define FLASH_BASE 0x00000000
#define FLASH_SIZE 0x02000000
@@ -235,6 +236,7 @@ static void r2d_init(ram_addr_t ram_size,
qemu_irq *irq;
DriveInfo *dinfo;
int i;
+ MemoryRegion *address_space_mem = get_system_memory();
if (!cpu_model)
cpu_model = "SH7751R";
@@ -258,7 +260,8 @@ static void r2d_init(ram_addr_t ram_size,
sysbus_create_varargs("sh_pci", 0x1e200000, irq[PCI_INTA], irq[PCI_INTB],
irq[PCI_INTC], irq[PCI_INTD], NULL);
- sm501_init(0x10000000, SM501_VRAM_SIZE, irq[SM501], serial_hds[2]);
+ sm501_init(address_space_mem, 0x10000000, SM501_VRAM_SIZE,
+ irq[SM501], serial_hds[2]);
/* onboard CF (True IDE mode, Master only). */
dinfo = drive_get(IF_IDE, 0, 0);
diff --git a/hw/sm501.c b/hw/sm501.c
index 6b54717..a7ed6fa 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -30,7 +30,6 @@
#include "sysbus.h"
#include "qdev-addr.h"
#include "range.h"
-#include "exec-memory.h"
/*
* Status: 2010/05/07
@@ -1386,8 +1385,8 @@ static void sm501_update_display(void *opaque)
sm501_draw_crt(s);
}
-void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
- CharDriverState *chr)
+void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
+ uint32_t local_mem_bytes, qemu_irq irq, CharDriverState *chr)
{
SM501State * s;
DeviceState *dev;
@@ -1441,7 +1440,7 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
/* bridge to serial emulation module */
if (chr) {
- serial_mm_init(get_system_memory(),
+ serial_mm_init(address_space_mem,
base + MMIO_BASE_OFFSET + SM501_UART0, 2,
NULL, /* TODO : chain irq to IRL */
115200, chr, DEVICE_NATIVE_ENDIAN);
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 14/25] sun4u: Pass address_space_mem to sun4uv_init
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (12 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 13/25] sm501: Pass address_space_mem to sm501_init Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 15/25] hw/smc91c111: Convert to MemoryRegion Avi Kivity
` (11 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Richard Henderson <rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/sun4u.c | 11 ++++++-----
1 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 28a5374..88c633d 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -736,7 +736,8 @@ static void ram_register_devices(void)
return env;
}
-static void sun4uv_init(ram_addr_t RAM_size,
+static void sun4uv_init(MemoryRegion *address_space_mem,
+ ram_addr_t RAM_size,
const char *boot_devices,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model,
@@ -771,7 +772,7 @@ static void sun4uv_init(ram_addr_t RAM_size,
i = 0;
if (hwdef->console_serial_base) {
- serial_mm_init(get_system_memory(), hwdef->console_serial_base, 0,
+ serial_mm_init(address_space_mem, hwdef->console_serial_base, 0,
NULL, 115200, serial_hds[i], DEVICE_BIG_ENDIAN);
i++;
}
@@ -876,7 +877,7 @@ static void sun4u_init(ram_addr_t RAM_size,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4uv_init(RAM_size, boot_devices, kernel_filename,
+ sun4uv_init(get_system_memory(), RAM_size, boot_devices, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[0]);
}
@@ -886,7 +887,7 @@ static void sun4v_init(ram_addr_t RAM_size,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4uv_init(RAM_size, boot_devices, kernel_filename,
+ sun4uv_init(get_system_memory(), RAM_size, boot_devices, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[1]);
}
@@ -896,7 +897,7 @@ static void niagara_init(ram_addr_t RAM_size,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- sun4uv_init(RAM_size, boot_devices, kernel_filename,
+ sun4uv_init(get_system_memory(), RAM_size, boot_devices, kernel_filename,
kernel_cmdline, initrd_filename, cpu_model, &hwdefs[2]);
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 15/25] hw/smc91c111: Convert to MemoryRegion
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (13 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 14/25] sun4u: Pass address_space_mem to sun4uv_init Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 16/25] openpic: Memory API conversion for mpic Avi Kivity
` (10 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/smc91c111.c | 29 +++++++++++++----------------
1 files changed, 13 insertions(+), 16 deletions(-)
diff --git a/hw/smc91c111.c b/hw/smc91c111.c
index 3a8a85c..fc8c498 100644
--- a/hw/smc91c111.c
+++ b/hw/smc91c111.c
@@ -43,7 +43,7 @@
uint8_t data[NUM_PACKETS][2048];
uint8_t int_level;
uint8_t int_mask;
- int mmio_index;
+ MemoryRegion mmio;
} smc91c111_state;
static const VMStateDescription vmstate_smc91c111 = {
@@ -717,16 +717,15 @@ static ssize_t smc91c111_receive(VLANClientState *nc, const uint8_t *buf, size_t
return size;
}
-static CPUReadMemoryFunc * const smc91c111_readfn[] = {
- smc91c111_readb,
- smc91c111_readw,
- smc91c111_readl
-};
-
-static CPUWriteMemoryFunc * const smc91c111_writefn[] = {
- smc91c111_writeb,
- smc91c111_writew,
- smc91c111_writel
+static const MemoryRegionOps smc91c111_mem_ops = {
+ /* The special case for 32 bit writes to 0xc means we can't just
+ * set .impl.min/max_access_size to 1, unfortunately
+ */
+ .old_mmio = {
+ .read = { smc91c111_readb, smc91c111_readw, smc91c111_readl, },
+ .write = { smc91c111_writeb, smc91c111_writew, smc91c111_writel, },
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void smc91c111_cleanup(VLANClientState *nc)
@@ -747,11 +746,9 @@ static void smc91c111_cleanup(VLANClientState *nc)
static int smc91c111_init1(SysBusDevice *dev)
{
smc91c111_state *s = FROM_SYSBUS(smc91c111_state, dev);
-
- s->mmio_index = cpu_register_io_memory(smc91c111_readfn,
- smc91c111_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 16, s->mmio_index);
+ memory_region_init_io(&s->mmio, &smc91c111_mem_ops, s,
+ "smc91c111-mmio", 16);
+ sysbus_init_mmio_region(dev, &s->mmio);
sysbus_init_irq(dev, &s->irq);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_smc91c111_info, &s->conf,
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 16/25] openpic: Memory API conversion for mpic
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (14 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 15/25] hw/smc91c111: Convert to MemoryRegion Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 17/25] milkymist-ac97: convert to memory API Avi Kivity
` (9 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Fabien Chouteau <chouteau@adacore.com>
This patch converts mpic to the new memory API (through old mmio).
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/openpic.c | 207 ++++++++++++++++++++++++++----------------------
hw/openpic.h | 4 +-
hw/ppce500_mpc8544ds.c | 2 +-
3 files changed, 114 insertions(+), 99 deletions(-)
diff --git a/hw/openpic.c b/hw/openpic.c
index 26c96e2..88e997e 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -206,6 +206,10 @@ enum IPVP_bits {
typedef struct openpic_t {
PCIDevice pci_dev;
MemoryRegion mem;
+
+ /* Sub-regions */
+ MemoryRegion sub_io_mem[7];
+
/* Global registers */
uint32_t frep; /* Feature reporting register */
uint32_t glbc; /* Global configuration register */
@@ -1537,107 +1541,122 @@ static uint32_t mpic_src_msi_read (void *opaque, target_phys_addr_t addr)
return retval;
}
-static CPUWriteMemoryFunc * const mpic_glb_write[] = {
- &openpic_buggy_write,
- &openpic_buggy_write,
- &openpic_gbl_write,
-};
-
-static CPUReadMemoryFunc * const mpic_glb_read[] = {
- &openpic_buggy_read,
- &openpic_buggy_read,
- &openpic_gbl_read,
-};
-
-static CPUWriteMemoryFunc * const mpic_tmr_write[] = {
- &openpic_buggy_write,
- &openpic_buggy_write,
- &mpic_timer_write,
+static const MemoryRegionOps mpic_glb_ops = {
+ .old_mmio = {
+ .write = { openpic_buggy_write,
+ openpic_buggy_write,
+ openpic_gbl_write,
+ },
+ .read = { openpic_buggy_read,
+ openpic_buggy_read,
+ openpic_gbl_read,
+ },
+ },
+ .endianness = DEVICE_BIG_ENDIAN,
};
-static CPUReadMemoryFunc * const mpic_tmr_read[] = {
- &openpic_buggy_read,
- &openpic_buggy_read,
- &mpic_timer_read,
+static const MemoryRegionOps mpic_tmr_ops = {
+ .old_mmio = {
+ .write = { openpic_buggy_write,
+ openpic_buggy_write,
+ mpic_timer_write,
+ },
+ .read = { openpic_buggy_read,
+ openpic_buggy_read,
+ mpic_timer_read,
+ },
+ },
+ .endianness = DEVICE_BIG_ENDIAN,
};
-static CPUWriteMemoryFunc * const mpic_cpu_write[] = {
- &openpic_buggy_write,
- &openpic_buggy_write,
- &openpic_cpu_write,
+static const MemoryRegionOps mpic_cpu_ops = {
+ .old_mmio = {
+ .write = { openpic_buggy_write,
+ openpic_buggy_write,
+ openpic_cpu_write,
+ },
+ .read = { openpic_buggy_read,
+ openpic_buggy_read,
+ openpic_cpu_read,
+ },
+ },
+ .endianness = DEVICE_BIG_ENDIAN,
};
-static CPUReadMemoryFunc * const mpic_cpu_read[] = {
- &openpic_buggy_read,
- &openpic_buggy_read,
- &openpic_cpu_read,
+static const MemoryRegionOps mpic_ext_ops = {
+ .old_mmio = {
+ .write = { openpic_buggy_write,
+ openpic_buggy_write,
+ mpic_src_ext_write,
+ },
+ .read = { openpic_buggy_read,
+ openpic_buggy_read,
+ mpic_src_ext_read,
+ },
+ },
+ .endianness = DEVICE_BIG_ENDIAN,
};
-static CPUWriteMemoryFunc * const mpic_ext_write[] = {
- &openpic_buggy_write,
- &openpic_buggy_write,
- &mpic_src_ext_write,
+static const MemoryRegionOps mpic_int_ops = {
+ .old_mmio = {
+ .write = { openpic_buggy_write,
+ openpic_buggy_write,
+ mpic_src_int_write,
+ },
+ .read = { openpic_buggy_read,
+ openpic_buggy_read,
+ mpic_src_int_read,
+ },
+ },
+ .endianness = DEVICE_BIG_ENDIAN,
};
-static CPUReadMemoryFunc * const mpic_ext_read[] = {
- &openpic_buggy_read,
- &openpic_buggy_read,
- &mpic_src_ext_read,
+static const MemoryRegionOps mpic_msg_ops = {
+ .old_mmio = {
+ .write = { openpic_buggy_write,
+ openpic_buggy_write,
+ mpic_src_msg_write,
+ },
+ .read = { openpic_buggy_read,
+ openpic_buggy_read,
+ mpic_src_msg_read,
+ },
+ },
+ .endianness = DEVICE_BIG_ENDIAN,
};
-static CPUWriteMemoryFunc * const mpic_int_write[] = {
- &openpic_buggy_write,
- &openpic_buggy_write,
- &mpic_src_int_write,
+static const MemoryRegionOps mpic_msi_ops = {
+ .old_mmio = {
+ .write = { openpic_buggy_write,
+ openpic_buggy_write,
+ mpic_src_msi_write,
+ },
+ .read = { openpic_buggy_read,
+ openpic_buggy_read,
+ mpic_src_msi_read,
+ },
+ },
+ .endianness = DEVICE_BIG_ENDIAN,
};
-static CPUReadMemoryFunc * const mpic_int_read[] = {
- &openpic_buggy_read,
- &openpic_buggy_read,
- &mpic_src_int_read,
-};
-
-static CPUWriteMemoryFunc * const mpic_msg_write[] = {
- &openpic_buggy_write,
- &openpic_buggy_write,
- &mpic_src_msg_write,
-};
-
-static CPUReadMemoryFunc * const mpic_msg_read[] = {
- &openpic_buggy_read,
- &openpic_buggy_read,
- &mpic_src_msg_read,
-};
-static CPUWriteMemoryFunc * const mpic_msi_write[] = {
- &openpic_buggy_write,
- &openpic_buggy_write,
- &mpic_src_msi_write,
-};
-
-static CPUReadMemoryFunc * const mpic_msi_read[] = {
- &openpic_buggy_read,
- &openpic_buggy_read,
- &mpic_src_msi_read,
-};
-
-qemu_irq *mpic_init (target_phys_addr_t base, int nb_cpus,
- qemu_irq **irqs, qemu_irq irq_out)
+qemu_irq *mpic_init (MemoryRegion *address_space, target_phys_addr_t base,
+ int nb_cpus, qemu_irq **irqs, qemu_irq irq_out)
{
- openpic_t *mpp;
- int i;
+ openpic_t *mpp;
+ int i;
struct {
- CPUReadMemoryFunc * const *read;
- CPUWriteMemoryFunc * const *write;
- target_phys_addr_t start_addr;
- ram_addr_t size;
+ const char *name;
+ MemoryRegionOps const *ops;
+ target_phys_addr_t start_addr;
+ ram_addr_t size;
} const list[] = {
- {mpic_glb_read, mpic_glb_write, MPIC_GLB_REG_START, MPIC_GLB_REG_SIZE},
- {mpic_tmr_read, mpic_tmr_write, MPIC_TMR_REG_START, MPIC_TMR_REG_SIZE},
- {mpic_ext_read, mpic_ext_write, MPIC_EXT_REG_START, MPIC_EXT_REG_SIZE},
- {mpic_int_read, mpic_int_write, MPIC_INT_REG_START, MPIC_INT_REG_SIZE},
- {mpic_msg_read, mpic_msg_write, MPIC_MSG_REG_START, MPIC_MSG_REG_SIZE},
- {mpic_msi_read, mpic_msi_write, MPIC_MSI_REG_START, MPIC_MSI_REG_SIZE},
- {mpic_cpu_read, mpic_cpu_write, MPIC_CPU_REG_START, MPIC_CPU_REG_SIZE},
+ {"glb", &mpic_glb_ops, MPIC_GLB_REG_START, MPIC_GLB_REG_SIZE},
+ {"tmr", &mpic_tmr_ops, MPIC_TMR_REG_START, MPIC_TMR_REG_SIZE},
+ {"ext", &mpic_ext_ops, MPIC_EXT_REG_START, MPIC_EXT_REG_SIZE},
+ {"int", &mpic_int_ops, MPIC_INT_REG_START, MPIC_INT_REG_SIZE},
+ {"msg", &mpic_msg_ops, MPIC_MSG_REG_START, MPIC_MSG_REG_SIZE},
+ {"msi", &mpic_msi_ops, MPIC_MSI_REG_START, MPIC_MSI_REG_SIZE},
+ {"cpu", &mpic_cpu_ops, MPIC_CPU_REG_START, MPIC_CPU_REG_SIZE},
};
/* XXX: for now, only one CPU is supported */
@@ -1646,16 +1665,16 @@ static uint32_t mpic_src_msi_read (void *opaque, target_phys_addr_t addr)
mpp = g_malloc0(sizeof(openpic_t));
+ memory_region_init(&mpp->mem, "mpic", 0x40000);
+ memory_region_add_subregion(address_space, base, &mpp->mem);
+
for (i = 0; i < sizeof(list)/sizeof(list[0]); i++) {
- int mem_index;
- mem_index = cpu_register_io_memory(list[i].read, list[i].write, mpp,
- DEVICE_BIG_ENDIAN);
- if (mem_index < 0) {
- goto free;
- }
- cpu_register_physical_memory(base + list[i].start_addr,
- list[i].size, mem_index);
+ memory_region_init_io(&mpp->sub_io_mem[i], list[i].ops, mpp,
+ list[i].name, list[i].size);
+
+ memory_region_add_subregion(&mpp->mem, list[i].start_addr,
+ &mpp->sub_io_mem[i]);
}
mpp->nb_cpus = nb_cpus;
@@ -1674,8 +1693,4 @@ static uint32_t mpic_src_msi_read (void *opaque, target_phys_addr_t addr)
qemu_register_reset(mpic_reset, mpp);
return qemu_allocate_irqs(openpic_set_irq, mpp, mpp->max_irq);
-
-free:
- g_free(mpp);
- return NULL;
}
diff --git a/hw/openpic.h b/hw/openpic.h
index 75de361..715f084 100644
--- a/hw/openpic.h
+++ b/hw/openpic.h
@@ -13,6 +13,6 @@ enum {
qemu_irq *openpic_init (PCIBus *bus, MemoryRegion **pmem, int nb_cpus,
qemu_irq **irqs, qemu_irq irq_out);
-qemu_irq *mpic_init (target_phys_addr_t base, int nb_cpus,
- qemu_irq **irqs, qemu_irq irq_out);
+qemu_irq *mpic_init (MemoryRegion *address_space, target_phys_addr_t base,
+ int nb_cpus, qemu_irq **irqs, qemu_irq irq_out);
#endif /* __OPENPIC_H__ */
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 274b37c..28acf0b 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -272,7 +272,7 @@ static void mpc8544ds_init(ram_addr_t ram_size,
irqs = g_malloc0(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
irqs[OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_INT];
irqs[OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_CINT];
- mpic = mpic_init(MPC8544_MPIC_REGS_BASE, 1, &irqs, NULL);
+ mpic = mpic_init(address_space_mem, MPC8544_MPIC_REGS_BASE, 1, &irqs, NULL);
/* Serial */
if (serial_hds[0]) {
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 17/25] milkymist-ac97: convert to memory API
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (15 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 16/25] openpic: Memory API conversion for mpic Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 18/25] milkymist-hpdmc: " Avi Kivity
` (8 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Michael Walle <michael@walle.cc>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/milkymist-ac97.c | 32 ++++++++++++++++----------------
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-ac97.c b/hw/milkymist-ac97.c
index 6104732..5c5ed27 100644
--- a/hw/milkymist-ac97.c
+++ b/hw/milkymist-ac97.c
@@ -53,6 +53,7 @@ enum {
struct MilkymistAC97State {
SysBusDevice busdev;
+ MemoryRegion regs_region;
QEMUSoundCard card;
SWVoiceIn *voice_in;
@@ -82,7 +83,8 @@ static void update_voices(MilkymistAC97State *s)
}
}
-static uint32_t ac97_read(void *opaque, target_phys_addr_t addr)
+static uint64_t ac97_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
MilkymistAC97State *s = opaque;
uint32_t r = 0;
@@ -113,7 +115,8 @@ static uint32_t ac97_read(void *opaque, target_phys_addr_t addr)
return r;
}
-static void ac97_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void ac97_write(void *opaque, target_phys_addr_t addr, uint64_t value,
+ unsigned size)
{
MilkymistAC97State *s = opaque;
@@ -159,16 +162,14 @@ static void ac97_write(void *opaque, target_phys_addr_t addr, uint32_t value)
}
-static CPUReadMemoryFunc * const ac97_read_fn[] = {
- NULL,
- NULL,
- &ac97_read,
-};
-
-static CPUWriteMemoryFunc * const ac97_write_fn[] = {
- NULL,
- NULL,
- &ac97_write,
+static const MemoryRegionOps ac97_mmio_ops = {
+ .read = ac97_read,
+ .write = ac97_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void ac97_in_cb(void *opaque, int avail_b)
@@ -280,7 +281,6 @@ static int ac97_post_load(void *opaque, int version_id)
static int milkymist_ac97_init(SysBusDevice *dev)
{
MilkymistAC97State *s = FROM_SYSBUS(typeof(*s), dev);
- int ac97_regs;
struct audsettings as;
sysbus_init_irq(dev, &s->crrequest_irq);
@@ -300,9 +300,9 @@ static int milkymist_ac97_init(SysBusDevice *dev)
s->voice_out = AUD_open_out(&s->card, s->voice_out,
"mm_ac97.out", s, ac97_out_cb, &as);
- ac97_regs = cpu_register_io_memory(ac97_read_fn, ac97_write_fn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, R_MAX * 4, ac97_regs);
+ memory_region_init_io(&s->regs_region, &ac97_mmio_ops, s,
+ "milkymist-ac97", R_MAX * 4);
+ sysbus_init_mmio_region(dev, &s->regs_region);
return 0;
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 18/25] milkymist-hpdmc: convert to memory API
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (16 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 17/25] milkymist-ac97: convert to memory API Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 19/25] milkymist-memcard: " Avi Kivity
` (7 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Michael Walle <michael@walle.cc>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/milkymist-hpdmc.c | 32 ++++++++++++++++----------------
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-hpdmc.c b/hw/milkymist-hpdmc.c
index c0962fb..17c840f 100644
--- a/hw/milkymist-hpdmc.c
+++ b/hw/milkymist-hpdmc.c
@@ -42,12 +42,14 @@ enum {
struct MilkymistHpdmcState {
SysBusDevice busdev;
+ MemoryRegion regs_region;
uint32_t regs[R_MAX];
};
typedef struct MilkymistHpdmcState MilkymistHpdmcState;
-static uint32_t hpdmc_read(void *opaque, target_phys_addr_t addr)
+static uint64_t hpdmc_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
MilkymistHpdmcState *s = opaque;
uint32_t r = 0;
@@ -72,7 +74,8 @@ static uint32_t hpdmc_read(void *opaque, target_phys_addr_t addr)
return r;
}
-static void hpdmc_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void hpdmc_write(void *opaque, target_phys_addr_t addr, uint64_t value,
+ unsigned size)
{
MilkymistHpdmcState *s = opaque;
@@ -96,16 +99,14 @@ static void hpdmc_write(void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
-static CPUReadMemoryFunc * const hpdmc_read_fn[] = {
- NULL,
- NULL,
- &hpdmc_read,
-};
-
-static CPUWriteMemoryFunc * const hpdmc_write_fn[] = {
- NULL,
- NULL,
- &hpdmc_write,
+static const MemoryRegionOps hpdmc_mmio_ops = {
+ .read = hpdmc_read,
+ .write = hpdmc_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void milkymist_hpdmc_reset(DeviceState *d)
@@ -125,11 +126,10 @@ static void milkymist_hpdmc_reset(DeviceState *d)
static int milkymist_hpdmc_init(SysBusDevice *dev)
{
MilkymistHpdmcState *s = FROM_SYSBUS(typeof(*s), dev);
- int hpdmc_regs;
- hpdmc_regs = cpu_register_io_memory(hpdmc_read_fn, hpdmc_write_fn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, R_MAX * 4, hpdmc_regs);
+ memory_region_init_io(&s->regs_region, &hpdmc_mmio_ops, s,
+ "milkymist-hpdmc", R_MAX * 4);
+ sysbus_init_mmio_region(dev, &s->regs_region);
return 0;
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 19/25] milkymist-memcard: convert to memory API
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (17 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 18/25] milkymist-hpdmc: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 20/25] milkymist-pfpu: " Avi Kivity
` (6 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Michael Walle <michael@walle.cc>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/milkymist-memcard.c | 32 ++++++++++++++++----------------
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-memcard.c b/hw/milkymist-memcard.c
index 22dc377..fb6e558 100644
--- a/hw/milkymist-memcard.c
+++ b/hw/milkymist-memcard.c
@@ -60,6 +60,7 @@ enum {
struct MilkymistMemcardState {
SysBusDevice busdev;
+ MemoryRegion regs_region;
SDState *card;
int command_write_ptr;
@@ -116,7 +117,8 @@ static void memcard_sd_command(MilkymistMemcardState *s)
}
}
-static uint32_t memcard_read(void *opaque, target_phys_addr_t addr)
+static uint64_t memcard_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
MilkymistMemcardState *s = opaque;
uint32_t r = 0;
@@ -164,7 +166,8 @@ static uint32_t memcard_read(void *opaque, target_phys_addr_t addr)
return r;
}
-static void memcard_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void memcard_write(void *opaque, target_phys_addr_t addr, uint64_t value,
+ unsigned size)
{
MilkymistMemcardState *s = opaque;
@@ -216,16 +219,14 @@ static void memcard_write(void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
-static CPUReadMemoryFunc * const memcard_read_fn[] = {
- NULL,
- NULL,
- &memcard_read,
-};
-
-static CPUWriteMemoryFunc * const memcard_write_fn[] = {
- NULL,
- NULL,
- &memcard_write,
+static const MemoryRegionOps memcard_mmio_ops = {
+ .read = memcard_read,
+ .write = memcard_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void milkymist_memcard_reset(DeviceState *d)
@@ -247,15 +248,14 @@ static int milkymist_memcard_init(SysBusDevice *dev)
{
MilkymistMemcardState *s = FROM_SYSBUS(typeof(*s), dev);
DriveInfo *dinfo;
- int memcard_regs;
dinfo = drive_get_next(IF_SD);
s->card = sd_init(dinfo ? dinfo->bdrv : NULL, 0);
s->enabled = dinfo ? bdrv_is_inserted(dinfo->bdrv) : 0;
- memcard_regs = cpu_register_io_memory(memcard_read_fn, memcard_write_fn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, R_MAX * 4, memcard_regs);
+ memory_region_init_io(&s->regs_region, &memcard_mmio_ops, s,
+ "milkymist-memcard", R_MAX * 4);
+ sysbus_init_mmio_region(dev, &s->regs_region);
return 0;
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 20/25] milkymist-pfpu: convert to memory API
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (18 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 19/25] milkymist-memcard: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 21/25] milkymist-sysctl: " Avi Kivity
` (5 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Michael Walle <michael@walle.cc>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/milkymist-pfpu.c | 33 ++++++++++++++++-----------------
1 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/hw/milkymist-pfpu.c b/hw/milkymist-pfpu.c
index 306d1ce..672f6e4 100644
--- a/hw/milkymist-pfpu.c
+++ b/hw/milkymist-pfpu.c
@@ -118,6 +118,7 @@ enum {
struct MilkymistPFPUState {
SysBusDevice busdev;
+ MemoryRegion regs_region;
CharDriverState *chr;
qemu_irq irq;
@@ -379,7 +380,8 @@ static inline int get_microcode_address(MilkymistPFPUState *s, uint32_t addr)
return (512 * s->regs[R_CODEPAGE]) + addr - MICROCODE_BEGIN;
}
-static uint32_t pfpu_read(void *opaque, target_phys_addr_t addr)
+static uint64_t pfpu_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
MilkymistPFPUState *s = opaque;
uint32_t r = 0;
@@ -418,8 +420,8 @@ static uint32_t pfpu_read(void *opaque, target_phys_addr_t addr)
return r;
}
-static void
-pfpu_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void pfpu_write(void *opaque, target_phys_addr_t addr, uint64_t value,
+ unsigned size)
{
MilkymistPFPUState *s = opaque;
@@ -459,16 +461,14 @@ static uint32_t pfpu_read(void *opaque, target_phys_addr_t addr)
}
}
-static CPUReadMemoryFunc * const pfpu_read_fn[] = {
- NULL,
- NULL,
- &pfpu_read,
-};
-
-static CPUWriteMemoryFunc * const pfpu_write_fn[] = {
- NULL,
- NULL,
- &pfpu_write,
+static const MemoryRegionOps pfpu_mmio_ops = {
+ .read = pfpu_read,
+ .write = pfpu_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void milkymist_pfpu_reset(DeviceState *d)
@@ -494,13 +494,12 @@ static void milkymist_pfpu_reset(DeviceState *d)
static int milkymist_pfpu_init(SysBusDevice *dev)
{
MilkymistPFPUState *s = FROM_SYSBUS(typeof(*s), dev);
- int pfpu_regs;
sysbus_init_irq(dev, &s->irq);
- pfpu_regs = cpu_register_io_memory(pfpu_read_fn, pfpu_write_fn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, MICROCODE_END * 4, pfpu_regs);
+ memory_region_init_io(&s->regs_region, &pfpu_mmio_ops, s,
+ "milkymist-pfpu", MICROCODE_END * 4);
+ sysbus_init_mmio_region(dev, &s->regs_region);
return 0;
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 21/25] milkymist-sysctl: convert to memory API
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (19 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 20/25] milkymist-pfpu: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 22/25] milkymist-tmu2: " Avi Kivity
` (4 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Michael Walle <michael@walle.cc>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/milkymist-sysctl.c | 32 ++++++++++++++++----------------
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-sysctl.c b/hw/milkymist-sysctl.c
index 7b2d544..5783f08 100644
--- a/hw/milkymist-sysctl.c
+++ b/hw/milkymist-sysctl.c
@@ -59,6 +59,7 @@ enum {
struct MilkymistSysctlState {
SysBusDevice busdev;
+ MemoryRegion regs_region;
QEMUBH *bh0;
QEMUBH *bh1;
@@ -88,7 +89,8 @@ static void sysctl_icap_write(MilkymistSysctlState *s, uint32_t value)
}
}
-static uint32_t sysctl_read(void *opaque, target_phys_addr_t addr)
+static uint64_t sysctl_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
MilkymistSysctlState *s = opaque;
uint32_t r = 0;
@@ -129,7 +131,8 @@ static uint32_t sysctl_read(void *opaque, target_phys_addr_t addr)
return r;
}
-static void sysctl_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void sysctl_write(void *opaque, target_phys_addr_t addr, uint64_t value,
+ unsigned size)
{
MilkymistSysctlState *s = opaque;
@@ -195,16 +198,14 @@ static void sysctl_write(void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
-static CPUReadMemoryFunc * const sysctl_read_fn[] = {
- NULL,
- NULL,
- &sysctl_read,
-};
-
-static CPUWriteMemoryFunc * const sysctl_write_fn[] = {
- NULL,
- NULL,
- &sysctl_write,
+static const MemoryRegionOps sysctl_mmio_ops = {
+ .read = sysctl_read,
+ .write = sysctl_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void timer0_hit(void *opaque)
@@ -258,7 +259,6 @@ static void milkymist_sysctl_reset(DeviceState *d)
static int milkymist_sysctl_init(SysBusDevice *dev)
{
MilkymistSysctlState *s = FROM_SYSBUS(typeof(*s), dev);
- int sysctl_regs;
sysbus_init_irq(dev, &s->gpio_irq);
sysbus_init_irq(dev, &s->timer0_irq);
@@ -271,9 +271,9 @@ static int milkymist_sysctl_init(SysBusDevice *dev)
ptimer_set_freq(s->ptimer0, s->freq_hz);
ptimer_set_freq(s->ptimer1, s->freq_hz);
- sysctl_regs = cpu_register_io_memory(sysctl_read_fn, sysctl_write_fn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, R_MAX * 4, sysctl_regs);
+ memory_region_init_io(&s->regs_region, &sysctl_mmio_ops, s,
+ "milkymist-sysctl", R_MAX * 4);
+ sysbus_init_mmio_region(dev, &s->regs_region);
return 0;
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 22/25] milkymist-tmu2: convert to memory API
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (20 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 21/25] milkymist-sysctl: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 23/25] milkymist-uart: " Avi Kivity
` (3 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Michael Walle <michael@walle.cc>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/milkymist-tmu2.c | 32 ++++++++++++++++----------------
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-tmu2.c b/hw/milkymist-tmu2.c
index 953d42f..aad0ed0 100644
--- a/hw/milkymist-tmu2.c
+++ b/hw/milkymist-tmu2.c
@@ -77,6 +77,7 @@ struct vertex {
struct MilkymistTMU2State {
SysBusDevice busdev;
+ MemoryRegion regs_region;
CharDriverState *chr;
qemu_irq irq;
@@ -309,7 +310,8 @@ static void tmu2_start(MilkymistTMU2State *s)
qemu_irq_pulse(s->irq);
}
-static uint32_t tmu2_read(void *opaque, target_phys_addr_t addr)
+static uint64_t tmu2_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
MilkymistTMU2State *s = opaque;
uint32_t r = 0;
@@ -370,7 +372,8 @@ static void tmu2_check_registers(MilkymistTMU2State *s)
}
}
-static void tmu2_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void tmu2_write(void *opaque, target_phys_addr_t addr, uint64_t value,
+ unsigned size)
{
MilkymistTMU2State *s = opaque;
@@ -414,16 +417,14 @@ static void tmu2_write(void *opaque, target_phys_addr_t addr, uint32_t value)
tmu2_check_registers(s);
}
-static CPUReadMemoryFunc * const tmu2_read_fn[] = {
- NULL,
- NULL,
- &tmu2_read,
-};
-
-static CPUWriteMemoryFunc * const tmu2_write_fn[] = {
- NULL,
- NULL,
- &tmu2_write,
+static const MemoryRegionOps tmu2_mmio_ops = {
+ .read = tmu2_read,
+ .write = tmu2_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void milkymist_tmu2_reset(DeviceState *d)
@@ -439,7 +440,6 @@ static void milkymist_tmu2_reset(DeviceState *d)
static int milkymist_tmu2_init(SysBusDevice *dev)
{
MilkymistTMU2State *s = FROM_SYSBUS(typeof(*s), dev);
- int tmu2_regs;
if (tmu2_glx_init(s)) {
return 1;
@@ -447,9 +447,9 @@ static int milkymist_tmu2_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
- tmu2_regs = cpu_register_io_memory(tmu2_read_fn, tmu2_write_fn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, R_MAX * 4, tmu2_regs);
+ memory_region_init_io(&s->regs_region, &tmu2_mmio_ops, s,
+ "milkymist-tmu2", R_MAX * 4);
+ sysbus_init_mmio_region(dev, &s->regs_region);
return 0;
}
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 23/25] milkymist-uart: convert to memory API
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (21 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 22/25] milkymist-tmu2: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 24/25] milkymist-vgafb: " Avi Kivity
` (2 subsequent siblings)
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Michael Walle <michael@walle.cc>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/milkymist-uart.c | 33 +++++++++++++++++----------------
1 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/hw/milkymist-uart.c b/hw/milkymist-uart.c
index e8e309d..128cd8c 100644
--- a/hw/milkymist-uart.c
+++ b/hw/milkymist-uart.c
@@ -35,7 +35,9 @@ enum {
struct MilkymistUartState {
SysBusDevice busdev;
+ MemoryRegion regs_region;
CharDriverState *chr;
+
qemu_irq rx_irq;
qemu_irq tx_irq;
@@ -43,7 +45,8 @@ struct MilkymistUartState {
};
typedef struct MilkymistUartState MilkymistUartState;
-static uint32_t uart_read(void *opaque, target_phys_addr_t addr)
+static uint64_t uart_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
MilkymistUartState *s = opaque;
uint32_t r = 0;
@@ -66,7 +69,8 @@ static uint32_t uart_read(void *opaque, target_phys_addr_t addr)
return r;
}
-static void uart_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void uart_write(void *opaque, target_phys_addr_t addr, uint64_t value,
+ unsigned size)
{
MilkymistUartState *s = opaque;
unsigned char ch = value;
@@ -93,16 +97,14 @@ static void uart_write(void *opaque, target_phys_addr_t addr, uint32_t value)
}
}
-static CPUReadMemoryFunc * const uart_read_fn[] = {
- NULL,
- NULL,
- &uart_read,
-};
-
-static CPUWriteMemoryFunc * const uart_write_fn[] = {
- NULL,
- NULL,
- &uart_write,
+static const MemoryRegionOps uart_mmio_ops = {
+ .read = uart_read,
+ .write = uart_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void uart_rx(void *opaque, const uint8_t *buf, int size)
@@ -136,14 +138,13 @@ static void milkymist_uart_reset(DeviceState *d)
static int milkymist_uart_init(SysBusDevice *dev)
{
MilkymistUartState *s = FROM_SYSBUS(typeof(*s), dev);
- int uart_regs;
sysbus_init_irq(dev, &s->rx_irq);
sysbus_init_irq(dev, &s->tx_irq);
- uart_regs = cpu_register_io_memory(uart_read_fn, uart_write_fn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, R_MAX * 4, uart_regs);
+ memory_region_init_io(&s->regs_region, &uart_mmio_ops, s,
+ "milkymist-uart", R_MAX * 4);
+ sysbus_init_mmio_region(dev, &s->regs_region);
s->chr = qdev_init_chardev(&dev->qdev);
if (s->chr) {
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 24/25] milkymist-vgafb: convert to memory API
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (22 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 23/25] milkymist-uart: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-02 14:26 ` [Qemu-devel] [PATCH 25/25] milkymist-{minimac2, softusb}: rename memory names Avi Kivity
2011-10-09 10:33 ` [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Michael Walle <michael@walle.cc>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/milkymist-vgafb.c | 33 ++++++++++++++++-----------------
1 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/hw/milkymist-vgafb.c b/hw/milkymist-vgafb.c
index 2e55e42..be81abd 100644
--- a/hw/milkymist-vgafb.c
+++ b/hw/milkymist-vgafb.c
@@ -64,6 +64,7 @@ enum {
struct MilkymistVgafbState {
SysBusDevice busdev;
+ MemoryRegion regs_region;
DisplayState *ds;
int invalidate;
@@ -153,7 +154,8 @@ static void vgafb_resize(MilkymistVgafbState *s)
s->invalidate = 1;
}
-static uint32_t vgafb_read(void *opaque, target_phys_addr_t addr)
+static uint64_t vgafb_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
MilkymistVgafbState *s = opaque;
uint32_t r = 0;
@@ -189,8 +191,8 @@ static uint32_t vgafb_read(void *opaque, target_phys_addr_t addr)
return r;
}
-static void
-vgafb_write(void *opaque, target_phys_addr_t addr, uint32_t value)
+static void vgafb_write(void *opaque, target_phys_addr_t addr, uint64_t value,
+ unsigned size)
{
MilkymistVgafbState *s = opaque;
@@ -238,16 +240,14 @@ static uint32_t vgafb_read(void *opaque, target_phys_addr_t addr)
}
}
-static CPUReadMemoryFunc * const vgafb_read_fn[] = {
- NULL,
- NULL,
- &vgafb_read
-};
-
-static CPUWriteMemoryFunc * const vgafb_write_fn[] = {
- NULL,
- NULL,
- &vgafb_write
+static const MemoryRegionOps vgafb_mmio_ops = {
+ .read = vgafb_read,
+ .write = vgafb_write,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4,
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void milkymist_vgafb_reset(DeviceState *d)
@@ -269,11 +269,10 @@ static void milkymist_vgafb_reset(DeviceState *d)
static int milkymist_vgafb_init(SysBusDevice *dev)
{
MilkymistVgafbState *s = FROM_SYSBUS(typeof(*s), dev);
- int vgafb_regs;
- vgafb_regs = cpu_register_io_memory(vgafb_read_fn, vgafb_write_fn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, R_MAX * 4, vgafb_regs);
+ memory_region_init_io(&s->regs_region, &vgafb_mmio_ops, s,
+ "milkymist-vgafb", R_MAX * 4);
+ sysbus_init_mmio_region(dev, &s->regs_region);
s->ds = graphic_console_init(vgafb_update_display,
vgafb_invalidate_display,
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [Qemu-devel] [PATCH 25/25] milkymist-{minimac2, softusb}: rename memory names
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (23 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 24/25] milkymist-vgafb: " Avi Kivity
@ 2011-10-02 14:26 ` Avi Kivity
2011-10-09 10:33 ` [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
25 siblings, 0 replies; 30+ messages in thread
From: Avi Kivity @ 2011-10-02 14:26 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
From: Michael Walle <michael@walle.cc>
Be consistent with other milkymist models.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Avi Kivity <avi@redhat.com>
---
hw/milkymist-minimac2.c | 4 ++--
hw/milkymist-softusb.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/milkymist-minimac2.c b/hw/milkymist-minimac2.c
index fb48e37..85d9400 100644
--- a/hw/milkymist-minimac2.c
+++ b/hw/milkymist-minimac2.c
@@ -464,11 +464,11 @@ static int milkymist_minimac2_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->tx_irq);
memory_region_init_io(&s->regs_region, &minimac2_ops, s,
- "minimac2-mmio", R_MAX * 4);
+ "milkymist-minimac2", R_MAX * 4);
sysbus_init_mmio_region(dev, &s->regs_region);
/* register buffers memory */
- memory_region_init_ram(&s->buffers, NULL, "milkymist_minimac2.buffers",
+ memory_region_init_ram(&s->buffers, NULL, "milkymist-minimac2.buffers",
buffers_size);
s->rx0_buf = memory_region_get_ram_ptr(&s->buffers);
s->rx1_buf = s->rx0_buf + MINIMAC2_BUFFER_SIZE;
diff --git a/hw/milkymist-softusb.c b/hw/milkymist-softusb.c
index ef4d9ee..ec5f334 100644
--- a/hw/milkymist-softusb.c
+++ b/hw/milkymist-softusb.c
@@ -267,10 +267,10 @@ static int milkymist_softusb_init(SysBusDevice *dev)
sysbus_init_mmio_region(dev, &s->regs_region);
/* register pmem and dmem */
- memory_region_init_ram(&s->pmem, NULL, "milkymist_softusb.pmem",
+ memory_region_init_ram(&s->pmem, NULL, "milkymist-softusb.pmem",
s->pmem_size);
sysbus_add_memory(dev, s->pmem_base, &s->pmem);
- memory_region_init_ram(&s->dmem, NULL, "milkymist_softusb.dmem",
+ memory_region_init_ram(&s->dmem, NULL, "milkymist-softusb.dmem",
s->dmem_size);
sysbus_add_memory(dev, s->dmem_base, &s->dmem);
--
1.7.6.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10
2011-10-02 14:26 [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
` (24 preceding siblings ...)
2011-10-02 14:26 ` [Qemu-devel] [PATCH 25/25] milkymist-{minimac2, softusb}: rename memory names Avi Kivity
@ 2011-10-09 10:33 ` Avi Kivity
2011-10-09 11:01 ` Blue Swirl
25 siblings, 1 reply; 30+ messages in thread
From: Avi Kivity @ 2011-10-09 10:33 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori
On 10/02/2011 04:26 PM, Avi Kivity wrote:
> Please pull from:
>
> git://github.com/avikivity/qemu.git memory/batch
>
> etrax, milkymist, serial conversions. All have already been posted on the
> list.
>
>
Ping?
--
error compiling committee.c: too many arguments to function
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10
2011-10-09 10:33 ` [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10 Avi Kivity
@ 2011-10-09 11:01 ` Blue Swirl
2011-10-09 12:07 ` Avi Kivity
0 siblings, 1 reply; 30+ messages in thread
From: Blue Swirl @ 2011-10-09 11:01 UTC (permalink / raw)
To: Avi Kivity; +Cc: qemu-devel
On Sun, Oct 9, 2011 at 10:33 AM, Avi Kivity <avi@redhat.com> wrote:
> On 10/02/2011 04:26 PM, Avi Kivity wrote:
>>
>> Please pull from:
>>
>> git://github.com/avikivity/qemu.git memory/batch
>>
>> etrax, milkymist, serial conversions. All have already been posted on the
>> list.
>>
>>
>
> Ping?
Sorry, the recent PPC and LM32 pulls are conflicting:
Auto-merging hw/etraxfs_dma.c
Auto-merging hw/milkymist-uart.c
CONFLICT (content): Merge conflict in hw/milkymist-uart.c
Auto-merging hw/openpic.c
Auto-merging hw/ppc405_boards.c
Auto-merging hw/ppc440_bamboo.c
Auto-merging hw/ppce500_mpc8544ds.c
CONFLICT (content): Merge conflict in hw/ppce500_mpc8544ds.c
Auto-merging hw/virtex_ml507.c
Automatic merge failed; fix conflicts and then commit the result.
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10
2011-10-09 11:01 ` Blue Swirl
@ 2011-10-09 12:07 ` Avi Kivity
2011-10-09 12:50 ` Blue Swirl
0 siblings, 1 reply; 30+ messages in thread
From: Avi Kivity @ 2011-10-09 12:07 UTC (permalink / raw)
To: Blue Swirl; +Cc: qemu-devel
On 10/09/2011 01:01 PM, Blue Swirl wrote:
> On Sun, Oct 9, 2011 at 10:33 AM, Avi Kivity<avi@redhat.com> wrote:
> > On 10/02/2011 04:26 PM, Avi Kivity wrote:
> >>
> >> Please pull from:
> >>
> >> git://github.com/avikivity/qemu.git memory/batch
> >>
> >> etrax, milkymist, serial conversions. All have already been posted on the
> >> list.
> >>
> >>
> >
> > Ping?
>
> Sorry, the recent PPC and LM32 pulls are conflicting:
>
>
I pushed a merge commit that resolves the conflict on top. Same URL and
branch:
git://github.com/avikivity/qemu.git memory/batch
--
error compiling committee.c: too many arguments to function
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [Qemu-devel] [PULL 00/25] Memory API conversion, batch 10
2011-10-09 12:07 ` Avi Kivity
@ 2011-10-09 12:50 ` Blue Swirl
0 siblings, 0 replies; 30+ messages in thread
From: Blue Swirl @ 2011-10-09 12:50 UTC (permalink / raw)
To: Avi Kivity; +Cc: qemu-devel
On Sun, Oct 9, 2011 at 12:07 PM, Avi Kivity <avi@redhat.com> wrote:
> On 10/09/2011 01:01 PM, Blue Swirl wrote:
>>
>> On Sun, Oct 9, 2011 at 10:33 AM, Avi Kivity<avi@redhat.com> wrote:
>> > On 10/02/2011 04:26 PM, Avi Kivity wrote:
>> >>
>> >> Please pull from:
>> >>
>> >> git://github.com/avikivity/qemu.git memory/batch
>> >>
>> >> etrax, milkymist, serial conversions. All have already been posted on
>> >> the
>> >> list.
>> >>
>> >>
>> >
>> > Ping?
>>
>> Sorry, the recent PPC and LM32 pulls are conflicting:
>>
>>
>
> I pushed a merge commit that resolves the conflict on top. Same URL and
> branch:
>
> git://github.com/avikivity/qemu.git memory/batch
Thanks, pulled.
^ permalink raw reply [flat|nested] 30+ messages in thread