* [Qemu-devel] [PATCH 1/7] integratorcp: convert core to memory API
2011-10-13 19:45 [Qemu-devel] [PATCH] finish to convert integratorcp.c and stellaris.c to the new memory API Benoît Canet
@ 2011-10-13 19:45 ` Benoît Canet
2011-10-17 14:14 ` Peter Maydell
2011-10-13 19:45 ` [Qemu-devel] [PATCH 2/7] integratorcp: convert icp pic " Benoît Canet
` (5 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Benoît Canet @ 2011-10-13 19:45 UTC (permalink / raw)
To: qemu-devel; +Cc: Benoît Canet
---
hw/integratorcp.c | 29 ++++++++++++-----------------
1 files changed, 12 insertions(+), 17 deletions(-)
diff --git a/hw/integratorcp.c b/hw/integratorcp.c
index 9a289b4..0dc84c4 100644
--- a/hw/integratorcp.c
+++ b/hw/integratorcp.c
@@ -18,6 +18,7 @@
typedef struct {
SysBusDevice busdev;
+ MemoryRegion iomem;
uint32_t memsz;
MemoryRegion flash;
bool flash_mapped;
@@ -39,7 +40,8 @@ static uint8_t integrator_spd[128] = {
0xe, 4, 0x1c, 1, 2, 0x20, 0xc0, 0, 0, 0, 0, 0x30, 0x28, 0x30, 0x28, 0x40
};
-static uint32_t integratorcm_read(void *opaque, target_phys_addr_t offset)
+static uint64_t integratorcm_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
integratorcm_state *s = (integratorcm_state *)opaque;
if (offset >= 0x100 && offset < 0x200) {
@@ -152,7 +154,7 @@ static void integratorcm_update(integratorcm_state *s)
}
static void integratorcm_write(void *opaque, target_phys_addr_t offset,
- uint32_t value)
+ uint64_t value, unsigned size)
{
integratorcm_state *s = (integratorcm_state *)opaque;
switch (offset >> 2) {
@@ -228,21 +230,14 @@ static void integratorcm_write(void *opaque, target_phys_addr_t offset,
/* Integrator/CM control registers. */
-static CPUReadMemoryFunc * const integratorcm_readfn[] = {
- integratorcm_read,
- integratorcm_read,
- integratorcm_read
-};
-
-static CPUWriteMemoryFunc * const integratorcm_writefn[] = {
- integratorcm_write,
- integratorcm_write,
- integratorcm_write
+static const MemoryRegionOps integratorcm_ops = {
+ .read = integratorcm_read,
+ .write = integratorcm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static int integratorcm_init(SysBusDevice *dev)
{
- int iomemtype;
integratorcm_state *s = FROM_SYSBUS(integratorcm_state, dev);
s->cm_osc = 0x01000048;
@@ -269,10 +264,10 @@ static int integratorcm_init(SysBusDevice *dev)
memory_region_init_ram(&s->flash, NULL, "integrator.flash", 0x100000);
s->flash_mapped = false;
- iomemtype = cpu_register_io_memory(integratorcm_readfn,
- integratorcm_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x00800000, iomemtype);
+ memory_region_init_io(&s->iomem, &integratorcm_ops, s,
+ "integratorcm", 0x00800000);
+ sysbus_init_mmio_region(dev, &s->iomem);
+
integratorcm_do_remap(s, 1);
/* ??? Save/restore. */
return 0;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [Qemu-devel] [PATCH 1/7] integratorcp: convert core to memory API
2011-10-13 19:45 ` [Qemu-devel] [PATCH 1/7] integratorcp: convert core to " Benoît Canet
@ 2011-10-17 14:14 ` Peter Maydell
2011-10-17 14:24 ` Avi Kivity
0 siblings, 1 reply; 17+ messages in thread
From: Peter Maydell @ 2011-10-17 14:14 UTC (permalink / raw)
To: Benoît Canet; +Cc: qemu-devel, Avi Kivity
2011/10/13 Benoît Canet <benoit.canet@gmail.com>:
These patches all need a Signed-off-by: line from you.
(when you've fixed this and the other review issues you
should resend, preferably with a cover letter email.
CC Avi since I'm assuming these patches should go via
his tree.)
Otherwise,
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
(which you should add to the commit message for the
patches where I've said it, and not the ones where I
don't :-))
-- PMM
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [Qemu-devel] [PATCH 1/7] integratorcp: convert core to memory API
2011-10-17 14:14 ` Peter Maydell
@ 2011-10-17 14:24 ` Avi Kivity
0 siblings, 0 replies; 17+ messages in thread
From: Avi Kivity @ 2011-10-17 14:24 UTC (permalink / raw)
To: Peter Maydell; +Cc: Benoît Canet, qemu-devel
On 10/17/2011 04:14 PM, Peter Maydell wrote:
> 2011/10/13 Benoît Canet <benoit.canet@gmail.com>:
>
> These patches all need a Signed-off-by: line from you.
> (when you've fixed this and the other review issues you
> should resend, preferably with a cover letter email.
> CC Avi since I'm assuming these patches should go via
> his tree.)
>
>
Yes please. Please rebase against
git://github.com/avikivity/qemu.git memory/master
to make sure there are no conflicts. From a quick check there shouldn't be.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply [flat|nested] 17+ messages in thread
* [Qemu-devel] [PATCH 2/7] integratorcp: convert icp pic to memory API
2011-10-13 19:45 [Qemu-devel] [PATCH] finish to convert integratorcp.c and stellaris.c to the new memory API Benoît Canet
2011-10-13 19:45 ` [Qemu-devel] [PATCH 1/7] integratorcp: convert core to " Benoît Canet
@ 2011-10-13 19:45 ` Benoît Canet
2011-10-17 14:16 ` Peter Maydell
2011-10-13 19:45 ` [Qemu-devel] [PATCH 3/7] integratorcp: convert control " Benoît Canet
` (4 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Benoît Canet @ 2011-10-13 19:45 UTC (permalink / raw)
To: qemu-devel; +Cc: Benoît Canet
---
hw/integratorcp.c | 29 +++++++++++------------------
1 files changed, 11 insertions(+), 18 deletions(-)
diff --git a/hw/integratorcp.c b/hw/integratorcp.c
index 0dc84c4..e3a5f24 100644
--- a/hw/integratorcp.c
+++ b/hw/integratorcp.c
@@ -279,6 +279,7 @@ static int integratorcm_init(SysBusDevice *dev)
typedef struct icp_pic_state
{
SysBusDevice busdev;
+ MemoryRegion iomem;
uint32_t level;
uint32_t irq_enabled;
uint32_t fiq_enabled;
@@ -306,7 +307,8 @@ static void icp_pic_set_irq(void *opaque, int irq, int level)
icp_pic_update(s);
}
-static uint32_t icp_pic_read(void *opaque, target_phys_addr_t offset)
+static uint64_t icp_pic_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
icp_pic_state *s = (icp_pic_state *)opaque;
@@ -335,7 +337,7 @@ static uint32_t icp_pic_read(void *opaque, target_phys_addr_t offset)
}
static void icp_pic_write(void *opaque, target_phys_addr_t offset,
- uint32_t value)
+ uint64_t value, unsigned size)
{
icp_pic_state *s = (icp_pic_state *)opaque;
@@ -371,30 +373,21 @@ static void icp_pic_write(void *opaque, target_phys_addr_t offset,
icp_pic_update(s);
}
-static CPUReadMemoryFunc * const icp_pic_readfn[] = {
- icp_pic_read,
- icp_pic_read,
- icp_pic_read
-};
-
-static CPUWriteMemoryFunc * const icp_pic_writefn[] = {
- icp_pic_write,
- icp_pic_write,
- icp_pic_write
-};
+static const MemoryRegionOps icp_pic_ops = {
+ .read = icp_pic_read,
+ .write = icp_pic_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
static int icp_pic_init(SysBusDevice *dev)
{
icp_pic_state *s = FROM_SYSBUS(icp_pic_state, dev);
- int iomemtype;
qdev_init_gpio_in(&dev->qdev, icp_pic_set_irq, 32);
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_fiq);
- iomemtype = cpu_register_io_memory(icp_pic_readfn,
- icp_pic_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x00800000, iomemtype);
+ memory_region_init_io(&s->iomem, &icp_pic_ops, s, "icp-pic", 0x00800000);
+ sysbus_init_mmio_region(dev, &s->iomem);
return 0;
}
--
1.7.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [Qemu-devel] [PATCH 3/7] integratorcp: convert control to memory API
2011-10-13 19:45 [Qemu-devel] [PATCH] finish to convert integratorcp.c and stellaris.c to the new memory API Benoît Canet
2011-10-13 19:45 ` [Qemu-devel] [PATCH 1/7] integratorcp: convert core to " Benoît Canet
2011-10-13 19:45 ` [Qemu-devel] [PATCH 2/7] integratorcp: convert icp pic " Benoît Canet
@ 2011-10-13 19:45 ` Benoît Canet
2011-10-17 14:17 ` Peter Maydell
2011-10-13 19:45 ` [Qemu-devel] [PATCH 4/7] stellaris: convert sys " Benoît Canet
` (3 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Benoît Canet @ 2011-10-13 19:45 UTC (permalink / raw)
To: qemu-devel; +Cc: Benoît Canet
---
hw/integratorcp.c | 35 ++++++++++++++++-------------------
1 files changed, 16 insertions(+), 19 deletions(-)
diff --git a/hw/integratorcp.c b/hw/integratorcp.c
index e3a5f24..9bda94e 100644
--- a/hw/integratorcp.c
+++ b/hw/integratorcp.c
@@ -392,7 +392,9 @@ static int icp_pic_init(SysBusDevice *dev)
}
/* CP control registers. */
-static uint32_t icp_control_read(void *opaque, target_phys_addr_t offset)
+
+static uint64_t icp_control_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
switch (offset >> 2) {
case 0: /* CP_IDFIELD */
@@ -410,7 +412,7 @@ static uint32_t icp_control_read(void *opaque, target_phys_addr_t offset)
}
static void icp_control_write(void *opaque, target_phys_addr_t offset,
- uint32_t value)
+ uint64_t value, unsigned size)
{
switch (offset >> 2) {
case 1: /* CP_FLASHPROG */
@@ -422,26 +424,21 @@ static void icp_control_write(void *opaque, target_phys_addr_t offset,
hw_error("icp_control_write: Bad offset %x\n", (int)offset);
}
}
-static CPUReadMemoryFunc * const icp_control_readfn[] = {
- icp_control_read,
- icp_control_read,
- icp_control_read
-};
-static CPUWriteMemoryFunc * const icp_control_writefn[] = {
- icp_control_write,
- icp_control_write,
- icp_control_write
-};
+static const MemoryRegionOps icp_control_ops = {
+ .read = icp_control_read,
+ .write = icp_control_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
-static void icp_control_init(uint32_t base)
+static void icp_control_init(target_phys_addr_t base)
{
- int iomemtype;
-
- iomemtype = cpu_register_io_memory(icp_control_readfn,
- icp_control_writefn, NULL,
- DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 0x00800000, iomemtype);
+ MemoryRegion *io;
+
+ io = (MemoryRegion *)g_malloc0(sizeof(MemoryRegion));
+ memory_region_init_io(io, &icp_control_ops, NULL,
+ "control", 0x00800000);
+ memory_region_add_subregion(get_system_memory(), base, io);
/* ??? Save/restore. */
}
--
1.7.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [Qemu-devel] [PATCH 4/7] stellaris: convert sys to memory API
2011-10-13 19:45 [Qemu-devel] [PATCH] finish to convert integratorcp.c and stellaris.c to the new memory API Benoît Canet
` (2 preceding siblings ...)
2011-10-13 19:45 ` [Qemu-devel] [PATCH 3/7] integratorcp: convert control " Benoît Canet
@ 2011-10-13 19:45 ` Benoît Canet
2011-10-17 14:28 ` Peter Maydell
2011-10-13 19:45 ` [Qemu-devel] [PATCH 5/7] stellaris: convert i2c " Benoît Canet
` (2 subsequent siblings)
6 siblings, 1 reply; 17+ messages in thread
From: Benoît Canet @ 2011-10-13 19:45 UTC (permalink / raw)
To: qemu-devel; +Cc: Benoît Canet
---
hw/stellaris.c | 30 ++++++++++++------------------
1 files changed, 12 insertions(+), 18 deletions(-)
diff --git a/hw/stellaris.c b/hw/stellaris.c
index 2bf1c23..b6486a3 100644
--- a/hw/stellaris.c
+++ b/hw/stellaris.c
@@ -327,6 +327,7 @@ static int stellaris_gptm_init(SysBusDevice *dev)
/* System controller. */
typedef struct {
+ MemoryRegion iomem;
uint32_t pborctl;
uint32_t ldopctl;
uint32_t int_status;
@@ -414,7 +415,8 @@ static int ssys_board_class(const ssys_state *s)
}
}
-static uint32_t ssys_read(void *opaque, target_phys_addr_t offset)
+static uint64_t ssys_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
ssys_state *s = (ssys_state *)opaque;
@@ -518,7 +520,8 @@ static void ssys_calculate_system_clock(ssys_state *s)
}
}
-static void ssys_write(void *opaque, target_phys_addr_t offset, uint32_t value)
+static void ssys_write(void *opaque, target_phys_addr_t offset,
+ uint64_t value, unsigned size)
{
ssys_state *s = (ssys_state *)opaque;
@@ -602,17 +605,11 @@ static void ssys_write(void *opaque, target_phys_addr_t offset, uint32_t value)
ssys_update(s);
}
-static CPUReadMemoryFunc * const ssys_readfn[] = {
- ssys_read,
- ssys_read,
- ssys_read
-};
-
-static CPUWriteMemoryFunc * const ssys_writefn[] = {
- ssys_write,
- ssys_write,
- ssys_write
-};
+static const MemoryRegionOps ssys_ops = {
+ .read = ssys_read,
+ .write = ssys_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+};
static void ssys_reset(void *opaque)
{
@@ -667,7 +664,6 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq,
stellaris_board_info * board,
uint8_t *macaddr)
{
- int iomemtype;
ssys_state *s;
s = (ssys_state *)g_malloc0(sizeof(ssys_state));
@@ -677,10 +673,8 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq,
s->user0 = macaddr[0] | (macaddr[1] << 8) | (macaddr[2] << 16);
s->user1 = macaddr[3] | (macaddr[4] << 8) | (macaddr[5] << 16);
- iomemtype = cpu_register_io_memory(ssys_readfn,
- ssys_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 0x00001000, iomemtype);
+ memory_region_init_io(&s->iomem, &ssys_ops, s, "ssys", 0x00001000);
+ memory_region_add_subregion(get_system_memory(), base, &s->iomem);
ssys_reset(s);
vmstate_register(NULL, -1, &vmstate_stellaris_sys, s);
return 0;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [Qemu-devel] [PATCH 5/7] stellaris: convert i2c to memory API
2011-10-13 19:45 [Qemu-devel] [PATCH] finish to convert integratorcp.c and stellaris.c to the new memory API Benoît Canet
` (3 preceding siblings ...)
2011-10-13 19:45 ` [Qemu-devel] [PATCH 4/7] stellaris: convert sys " Benoît Canet
@ 2011-10-13 19:45 ` Benoît Canet
2011-10-17 14:28 ` Peter Maydell
2011-10-13 19:45 ` [Qemu-devel] [PATCH 6/7] stellaris: convert adc " Benoît Canet
2011-10-13 19:45 ` [Qemu-devel] [PATCH 7/7] stellaris: convert gptm " Benoît Canet
6 siblings, 1 reply; 17+ messages in thread
From: Benoît Canet @ 2011-10-13 19:45 UTC (permalink / raw)
To: qemu-devel; +Cc: Benoît Canet
---
hw/stellaris.c | 28 +++++++++++-----------------
1 files changed, 11 insertions(+), 17 deletions(-)
diff --git a/hw/stellaris.c b/hw/stellaris.c
index b6486a3..8061e74 100644
--- a/hw/stellaris.c
+++ b/hw/stellaris.c
@@ -687,6 +687,7 @@ typedef struct {
SysBusDevice busdev;
i2c_bus *bus;
qemu_irq irq;
+ MemoryRegion iomem;
uint32_t msa;
uint32_t mcs;
uint32_t mdr;
@@ -704,7 +705,8 @@ typedef struct {
#define STELLARIS_I2C_MCS_IDLE 0x20
#define STELLARIS_I2C_MCS_BUSBSY 0x40
-static uint32_t stellaris_i2c_read(void *opaque, target_phys_addr_t offset)
+static uint64_t stellaris_i2c_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
stellaris_i2c_state *s = (stellaris_i2c_state *)opaque;
@@ -741,7 +743,7 @@ static void stellaris_i2c_update(stellaris_i2c_state *s)
}
static void stellaris_i2c_write(void *opaque, target_phys_addr_t offset,
- uint32_t value)
+ uint64_t value, unsigned size)
{
stellaris_i2c_state *s = (stellaris_i2c_state *)opaque;
@@ -832,16 +834,10 @@ static void stellaris_i2c_reset(stellaris_i2c_state *s)
stellaris_i2c_update(s);
}
-static CPUReadMemoryFunc * const stellaris_i2c_readfn[] = {
- stellaris_i2c_read,
- stellaris_i2c_read,
- stellaris_i2c_read
-};
-
-static CPUWriteMemoryFunc * const stellaris_i2c_writefn[] = {
- stellaris_i2c_write,
- stellaris_i2c_write,
- stellaris_i2c_write
+static const MemoryRegionOps stellaris_i2c_ops = {
+ .read = stellaris_i2c_read,
+ .write = stellaris_i2c_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static const VMStateDescription vmstate_stellaris_i2c = {
@@ -865,16 +861,14 @@ static int stellaris_i2c_init(SysBusDevice * dev)
{
stellaris_i2c_state *s = FROM_SYSBUS(stellaris_i2c_state, dev);
i2c_bus *bus;
- int iomemtype;
sysbus_init_irq(dev, &s->irq);
bus = i2c_init_bus(&dev->qdev, "i2c");
s->bus = bus;
- iomemtype = cpu_register_io_memory(stellaris_i2c_readfn,
- stellaris_i2c_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x1000, iomemtype);
+ memory_region_init_io(&s->iomem, &stellaris_i2c_ops, s,
+ "i2c", 0x1000);
+ sysbus_init_mmio_region(dev, &s->iomem);
/* ??? For now we only implement the master interface. */
stellaris_i2c_reset(s);
vmstate_register(&dev->qdev, -1, &vmstate_stellaris_i2c, s);
--
1.7.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [Qemu-devel] [PATCH 6/7] stellaris: convert adc to memory API
2011-10-13 19:45 [Qemu-devel] [PATCH] finish to convert integratorcp.c and stellaris.c to the new memory API Benoît Canet
` (4 preceding siblings ...)
2011-10-13 19:45 ` [Qemu-devel] [PATCH 5/7] stellaris: convert i2c " Benoît Canet
@ 2011-10-13 19:45 ` Benoît Canet
2011-10-17 14:07 ` Peter Maydell
2011-10-13 19:45 ` [Qemu-devel] [PATCH 7/7] stellaris: convert gptm " Benoît Canet
6 siblings, 1 reply; 17+ messages in thread
From: Benoît Canet @ 2011-10-13 19:45 UTC (permalink / raw)
To: qemu-devel; +Cc: Benoît Canet
---
hw/stellaris.c | 30 ++++++++++++------------------
1 files changed, 12 insertions(+), 18 deletions(-)
diff --git a/hw/stellaris.c b/hw/stellaris.c
index 8061e74..8e1ffc6 100644
--- a/hw/stellaris.c
+++ b/hw/stellaris.c
@@ -892,6 +892,7 @@ static int stellaris_i2c_init(SysBusDevice * dev)
typedef struct
{
SysBusDevice busdev;
+ MemoryRegion iomem;
uint32_t actss;
uint32_t ris;
uint32_t im;
@@ -992,7 +993,8 @@ static void stellaris_adc_reset(stellaris_adc_state *s)
}
}
-static uint32_t stellaris_adc_read(void *opaque, target_phys_addr_t offset)
+static uint64_t stellaris_adc_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
stellaris_adc_state *s = (stellaris_adc_state *)opaque;
@@ -1040,7 +1042,7 @@ static uint32_t stellaris_adc_read(void *opaque, target_phys_addr_t offset)
}
static void stellaris_adc_write(void *opaque, target_phys_addr_t offset,
- uint32_t value)
+ uint64_t value, unsigned size)
{
stellaris_adc_state *s = (stellaris_adc_state *)opaque;
@@ -1054,7 +1056,7 @@ static void stellaris_adc_write(void *opaque, target_phys_addr_t offset,
return;
case 0x04: /* SSCTL */
if (value != 6) {
- hw_error("ADC: Unimplemented sequence %x\n",
+ hw_error("ADC: Unimplemented sequence %lx\n",
value);
}
s->ssctl[n] = value;
@@ -1097,16 +1099,10 @@ static void stellaris_adc_write(void *opaque, target_phys_addr_t offset,
stellaris_adc_update(s);
}
-static CPUReadMemoryFunc * const stellaris_adc_readfn[] = {
- stellaris_adc_read,
- stellaris_adc_read,
- stellaris_adc_read
-};
-
-static CPUWriteMemoryFunc * const stellaris_adc_writefn[] = {
- stellaris_adc_write,
- stellaris_adc_write,
- stellaris_adc_write
+static const MemoryRegionOps stellaris_adc_ops = {
+ .read = stellaris_adc_read,
+ .write = stellaris_adc_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static const VMStateDescription vmstate_stellaris_adc = {
@@ -1147,17 +1143,15 @@ static const VMStateDescription vmstate_stellaris_adc = {
static int stellaris_adc_init(SysBusDevice *dev)
{
stellaris_adc_state *s = FROM_SYSBUS(stellaris_adc_state, dev);
- int iomemtype;
int n;
for (n = 0; n < 4; n++) {
sysbus_init_irq(dev, &s->irq[n]);
}
- iomemtype = cpu_register_io_memory(stellaris_adc_readfn,
- stellaris_adc_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x1000, iomemtype);
+ memory_region_init_io(&s->iomem, &stellaris_adc_ops, s,
+ "adc", 0x1000);
+ sysbus_init_mmio_region(dev, &s->iomem);
stellaris_adc_reset(s);
qdev_init_gpio_in(&dev->qdev, stellaris_adc_trigger, 1);
vmstate_register(&dev->qdev, -1, &vmstate_stellaris_adc, s);
--
1.7.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [Qemu-devel] [PATCH 6/7] stellaris: convert adc to memory API
2011-10-13 19:45 ` [Qemu-devel] [PATCH 6/7] stellaris: convert adc " Benoît Canet
@ 2011-10-17 14:07 ` Peter Maydell
0 siblings, 0 replies; 17+ messages in thread
From: Peter Maydell @ 2011-10-17 14:07 UTC (permalink / raw)
To: Benoît Canet; +Cc: qemu-devel
2011/10/13 Benoît Canet <benoit.canet@gmail.com>:
> @@ -1054,7 +1056,7 @@ static void stellaris_adc_write(void *opaque, target_phys_addr_t offset,
> return;
> case 0x04: /* SSCTL */
> if (value != 6) {
> - hw_error("ADC: Unimplemented sequence %x\n",
> + hw_error("ADC: Unimplemented sequence %lx\n",
> value);
> }
> s->ssctl[n] = value;
This doesn't compile on a 32 bit box:
hw/stellaris.c: In function 'stellaris_adc_write':
hw/stellaris.c:1060: error: format '%lx' expects type 'long unsigned
int', but argument 2 has type 'uint64_t'
You need to use "ADC: Unimplemented sequence %" PRIx64 "\n"
(watch the quotes).
-- PMM
^ permalink raw reply [flat|nested] 17+ messages in thread
* [Qemu-devel] [PATCH 7/7] stellaris: convert gptm to memory API
2011-10-13 19:45 [Qemu-devel] [PATCH] finish to convert integratorcp.c and stellaris.c to the new memory API Benoît Canet
` (5 preceding siblings ...)
2011-10-13 19:45 ` [Qemu-devel] [PATCH 6/7] stellaris: convert adc " Benoît Canet
@ 2011-10-13 19:45 ` Benoît Canet
2011-10-17 14:29 ` Peter Maydell
6 siblings, 1 reply; 17+ messages in thread
From: Benoît Canet @ 2011-10-13 19:45 UTC (permalink / raw)
To: qemu-devel; +Cc: Benoît Canet
---
hw/stellaris.c | 29 ++++++++++++-----------------
1 files changed, 12 insertions(+), 17 deletions(-)
diff --git a/hw/stellaris.c b/hw/stellaris.c
index 8e1ffc6..503ddb1 100644
--- a/hw/stellaris.c
+++ b/hw/stellaris.c
@@ -45,6 +45,7 @@ typedef const struct {
typedef struct gptm_state {
SysBusDevice busdev;
+ MemoryRegion iomem;
uint32_t config;
uint32_t mode[2];
uint32_t control;
@@ -140,7 +141,8 @@ static void gptm_tick(void *opaque)
gptm_update_irq(s);
}
-static uint32_t gptm_read(void *opaque, target_phys_addr_t offset)
+static uint64_t gptm_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
gptm_state *s = (gptm_state *)opaque;
@@ -188,7 +190,8 @@ static uint32_t gptm_read(void *opaque, target_phys_addr_t offset)
}
}
-static void gptm_write(void *opaque, target_phys_addr_t offset, uint32_t value)
+static void gptm_write(void *opaque, target_phys_addr_t offset,
+ uint64_t value, unsigned size)
{
gptm_state *s = (gptm_state *)opaque;
uint32_t oldval;
@@ -268,16 +271,10 @@ static void gptm_write(void *opaque, target_phys_addr_t offset, uint32_t value)
gptm_update_irq(s);
}
-static CPUReadMemoryFunc * const gptm_readfn[] = {
- gptm_read,
- gptm_read,
- gptm_read
-};
-
-static CPUWriteMemoryFunc * const gptm_writefn[] = {
- gptm_write,
- gptm_write,
- gptm_write
+static const MemoryRegionOps gptm_ops = {
+ .read = gptm_read,
+ .write = gptm_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static const VMStateDescription vmstate_stellaris_gptm = {
@@ -305,16 +302,14 @@ static const VMStateDescription vmstate_stellaris_gptm = {
static int stellaris_gptm_init(SysBusDevice *dev)
{
- int iomemtype;
gptm_state *s = FROM_SYSBUS(gptm_state, dev);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_out(&dev->qdev, &s->trigger, 1);
- iomemtype = cpu_register_io_memory(gptm_readfn,
- gptm_writefn, s,
- DEVICE_NATIVE_ENDIAN);
- sysbus_init_mmio(dev, 0x1000, iomemtype);
+ memory_region_init_io(&s->iomem, &gptm_ops, s,
+ "gptm", 0x1000);
+ sysbus_init_mmio_region(dev, &s->iomem);
s->opaque[0] = s->opaque[1] = s;
s->timer[0] = qemu_new_timer_ns(vm_clock, gptm_tick, &s->opaque[0]);
--
1.7.5.4
^ permalink raw reply related [flat|nested] 17+ messages in thread