From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:43483) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RHlZA-0002QN-4g for qemu-devel@nongnu.org; Sat, 22 Oct 2011 20:05:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RHlZ8-0003up-Ns for qemu-devel@nongnu.org; Sat, 22 Oct 2011 20:05:28 -0400 Received: from fmmailgate06.web.de ([217.72.192.247]:50245) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RHlZ7-0003uj-UN for qemu-devel@nongnu.org; Sat, 22 Oct 2011 20:05:26 -0400 Message-ID: <4EA359FE.9080707@web.de> Date: Sun, 23 Oct 2011 02:04:14 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1319116568-2663-1-git-send-email-peter.maydell@linaro.org> <1319116568-2663-4-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1319116568-2663-4-git-send-email-peter.maydell@linaro.org> Content-Type: text/plain; charset=ISO-8859-15 Sender: andreas.faerber@web.de Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 3/7] target-arm: Rename ARM_FEATURE_DIV to _THUMB_DIV List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Anthony Liguori , qemu-devel@nongnu.org Am 20.10.2011 15:16, schrieb Peter Maydell: > Rename the ARM_FEATURE_DIV feature bit to _THUMB_DIV, to > make room for a new feature switch enabling DIV in the ARM > encoding. (Cores may implement either (a) no divide insns > (b) divide insns in Thumb encodings only (c) divide insns > in both ARM and Thumb encodings.) >=20 > Signed-off-by: Peter Maydell Acked-by: Andreas F=E4rber Andreas > --- > target-arm/cpu.h | 2 +- > target-arm/helper.c | 4 ++-- > target-arm/translate.c | 3 ++- > 3 files changed, 5 insertions(+), 4 deletions(-) >=20 > diff --git a/target-arm/cpu.h b/target-arm/cpu.h > index 6ab780d..00e012e 100644 > --- a/target-arm/cpu.h > +++ b/target-arm/cpu.h > @@ -366,7 +366,7 @@ enum arm_features { > ARM_FEATURE_VFP3, > ARM_FEATURE_VFP_FP16, > ARM_FEATURE_NEON, > - ARM_FEATURE_DIV, > + ARM_FEATURE_THUMB_DIV, /* divide supported in Thumb encoding */ > ARM_FEATURE_M, /* Microcontroller profile. */ > ARM_FEATURE_OMAPCP, /* OMAP specific CP15 ops handling. */ > ARM_FEATURE_THUMB2EE, > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 17ef98b..faf0283 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -193,7 +193,7 @@ static void cpu_reset_model_id(CPUARMState *env, ui= nt32_t id) > set_feature(env, ARM_FEATURE_THUMB2); > set_feature(env, ARM_FEATURE_V7); > set_feature(env, ARM_FEATURE_M); > - set_feature(env, ARM_FEATURE_DIV); > + set_feature(env, ARM_FEATURE_THUMB_DIV); > break; > case ARM_CPUID_ANY: /* For userspace emulation. */ > set_feature(env, ARM_FEATURE_V4T); > @@ -207,7 +207,7 @@ static void cpu_reset_model_id(CPUARMState *env, ui= nt32_t id) > set_feature(env, ARM_FEATURE_VFP_FP16); > set_feature(env, ARM_FEATURE_NEON); > set_feature(env, ARM_FEATURE_THUMB2EE); > - set_feature(env, ARM_FEATURE_DIV); > + set_feature(env, ARM_FEATURE_THUMB_DIV); > set_feature(env, ARM_FEATURE_V7MP); > break; > case ARM_CPUID_TI915T: > diff --git a/target-arm/translate.c b/target-arm/translate.c > index e99fc18..deb0bcf 100644 > --- a/target-arm/translate.c > +++ b/target-arm/translate.c > @@ -8513,8 +8513,9 @@ static int disas_thumb2_insn(CPUState *env, Disas= Context *s, uint16_t insn_hw1) > tmp2 =3D load_reg(s, rm); > if ((op & 0x50) =3D=3D 0x10) { > /* sdiv, udiv */ > - if (!arm_feature(env, ARM_FEATURE_DIV)) > + if (!arm_feature(env, ARM_FEATURE_THUMB_DIV)) { > goto illegal_op; > + } > if (op & 0x20) > gen_helper_udiv(tmp, tmp, tmp2); > else