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From: Jan Kiszka <jan.kiszka@web.de>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: aliguori@us.ibm.com, pingfank@linux.vnet.ibm.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/1] Introduce a new bus "ICC" to connect APIC
Date: Sun, 23 Oct 2011 17:45:42 +0200	[thread overview]
Message-ID: <4EA436A6.4050702@web.de> (raw)
In-Reply-To: <CAAu8pHsuK3ExYKe0Fu9uHiMkj0L_+0gxOBFvWXOAm1k+MYe4qg@mail.gmail.com>

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On 2011-10-23 14:40, Blue Swirl wrote:
> I'm not sure that a full bus is needed for now, even if it could match
> real HW better, since the memory API already provides the separation
> needed. Perhaps this would be needed later to make IRQs per-CPU also,
> or to put IOAPIC also to the bus?

The ICC interconnects LAPICs and IOAPICs. So it should next take over
the management of the local_apics array from apic.c and the ioapics
array from ioapic.c. It could implement generic message delivery
services. Every bus participant would then have a reception handler that
first checks the type and additional fields of a generic ICC message
and, on match, forwards it to the corresponding device model functions.
That would allow for something nicer than global apic_deliver_irq or
ioapic_eoi_broadcast.

That's clearly beyond the scope of this series but a good reason to
model the ICC as accurately as qdev allows right from the start.

Jan


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  reply	other threads:[~2011-10-23 15:46 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-10-19  1:55 [Qemu-devel] [PATCH 1/1] Introduce a new bus "ICC" to connect APIC pingfank
2011-10-19 10:53 ` Jan Kiszka
2011-10-19 12:54   ` Anthony Liguori
2011-10-19 13:33     ` Jan Kiszka
2011-10-19 13:42       ` Jan Kiszka
2011-10-20  6:18         ` liu ping fan
2011-10-23 12:40 ` Blue Swirl
2011-10-23 15:45   ` Jan Kiszka [this message]
2011-10-23 15:54     ` Blue Swirl
2011-10-23 16:00       ` Jan Kiszka
2011-10-25  8:55   ` liu ping fan
2011-10-25 20:24     ` Blue Swirl
2011-10-27  8:41       ` liu ping fan
2011-10-27 20:22         ` Blue Swirl

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