* [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points
@ 2011-11-09 18:03 Richard Henderson
2011-11-09 18:03 ` [Qemu-devel] [PATCH 1/3] tcg: Standardize on TCGReg as the enum for hard registers Richard Henderson
` (5 more replies)
0 siblings, 6 replies; 9+ messages in thread
From: Richard Henderson @ 2011-11-09 18:03 UTC (permalink / raw)
To: qemu-devel; +Cc: Stefan Weil, Alexander Graf, Blue Swirl, Aurelien Jarno
This is the direction in which I believe we should fix the s390
compilation failure. I've cross-compiled --target-list=i386-softmmu
for every tcg host to make sure that they all build.
The second patch cannot be split into per-host patches, lest it
introduce regressions on the way to fixing them.
r~
Richard Henderson (3):
tcg: Standardize on TCGReg as the enum for hard registers
tcg: Use TCGReg for standard tcg-target entry points.
tcg-sparc: Fix set-but-not used warnings.
tcg/arm/tcg-target.c | 13 +++++++------
tcg/arm/tcg-target.h | 4 ++--
tcg/hppa/tcg-target.c | 12 ++++++------
tcg/hppa/tcg-target.h | 4 ++--
tcg/i386/tcg-target.c | 13 +++++++------
tcg/i386/tcg-target.h | 4 ++--
tcg/ia64/tcg-target.c | 12 ++++++------
tcg/ia64/tcg-target.h | 4 ++--
tcg/mips/tcg-target.c | 13 +++++++------
tcg/mips/tcg-target.h | 4 ++--
tcg/ppc/tcg-target.c | 8 ++++----
tcg/ppc/tcg-target.h | 4 ++--
tcg/ppc64/tcg-target.c | 8 ++++----
tcg/ppc64/tcg-target.h | 4 ++--
tcg/sparc/tcg-target.c | 17 +++++++----------
tcg/sparc/tcg-target.h | 4 ++--
tcg/tcg.c | 8 ++++----
tcg/tci/tcg-target.c | 8 ++++----
tcg/tci/tcg-target.h | 2 +-
tci.c | 38 +++++++++++++++++++-------------------
20 files changed, 92 insertions(+), 92 deletions(-)
--
1.7.6.4
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 1/3] tcg: Standardize on TCGReg as the enum for hard registers
2011-11-09 18:03 [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Richard Henderson
@ 2011-11-09 18:03 ` Richard Henderson
2011-11-09 18:03 ` [Qemu-devel] [PATCH 2/3] tcg: Use TCGReg for standard tcg-target entry points Richard Henderson
` (4 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Richard Henderson @ 2011-11-09 18:03 UTC (permalink / raw)
To: qemu-devel; +Cc: Stefan Weil, Alexander Graf, Blue Swirl, Aurelien Jarno
Most targets did not name the enum; tci used TCGRegister.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/arm/tcg-target.h | 4 ++--
tcg/hppa/tcg-target.h | 4 ++--
tcg/i386/tcg-target.h | 4 ++--
tcg/ia64/tcg-target.h | 4 ++--
tcg/mips/tcg-target.h | 4 ++--
tcg/ppc/tcg-target.h | 4 ++--
tcg/ppc64/tcg-target.h | 4 ++--
tcg/sparc/tcg-target.h | 4 ++--
tcg/tci/tcg-target.h | 2 +-
tci.c | 38 +++++++++++++++++++-------------------
10 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 33afd97..48586c3 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -27,7 +27,7 @@
#undef TCG_TARGET_WORDS_BIGENDIAN
#undef TCG_TARGET_STACK_GROWSUP
-enum {
+typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_R2,
@@ -44,7 +44,7 @@ enum {
TCG_REG_R13,
TCG_REG_R14,
TCG_REG_PC,
-};
+} TCGReg;
#define TCG_TARGET_NB_REGS 16
diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h
index ec9a7bf..7f3c4cc 100644
--- a/tcg/hppa/tcg-target.h
+++ b/tcg/hppa/tcg-target.h
@@ -32,7 +32,7 @@
#define TCG_TARGET_NB_REGS 32
-enum {
+typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_RP,
@@ -65,7 +65,7 @@ enum {
TCG_REG_RET1,
TCG_REG_SP,
TCG_REG_R31,
-};
+} TCGReg;
#define TCG_CT_CONST_0 0x0100
#define TCG_CT_CONST_S5 0x0200
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index b9c9d4e..7756e7b 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -36,7 +36,7 @@
# define TCG_TARGET_NB_REGS 8
#endif
-enum {
+typedef enum {
TCG_REG_EAX = 0,
TCG_REG_ECX,
TCG_REG_EDX,
@@ -64,7 +64,7 @@ enum {
TCG_REG_RBP = TCG_REG_EBP,
TCG_REG_RSI = TCG_REG_ESI,
TCG_REG_RDI = TCG_REG_EDI,
-};
+} TCGReg;
#define TCG_CT_CONST_S32 0x100
#define TCG_CT_CONST_U32 0x200
diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h
index 578cf29..c388089 100644
--- a/tcg/ia64/tcg-target.h
+++ b/tcg/ia64/tcg-target.h
@@ -26,7 +26,7 @@
/* We only map the first 64 registers */
#define TCG_TARGET_NB_REGS 64
-enum {
+typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_R2,
@@ -91,7 +91,7 @@ enum {
TCG_REG_R61,
TCG_REG_R62,
TCG_REG_R63,
-};
+} TCGReg;
#define TCG_CT_CONST_ZERO 0x100
#define TCG_CT_CONST_S22 0x200
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index e2a2571..477bc38 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -31,7 +31,7 @@
#define TCG_TARGET_NB_REGS 32
-enum {
+typedef enum {
TCG_REG_ZERO = 0,
TCG_REG_AT,
TCG_REG_V0,
@@ -64,7 +64,7 @@ enum {
TCG_REG_SP,
TCG_REG_FP,
TCG_REG_RA,
-};
+} TCGReg;
#define TCG_CT_CONST_ZERO 0x100
#define TCG_CT_CONST_U16 0x200
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index 25a6ea4..3f22aaa 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -26,7 +26,7 @@
#define TCG_TARGET_WORDS_BIGENDIAN
#define TCG_TARGET_NB_REGS 32
-enum {
+typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_R2,
@@ -59,7 +59,7 @@ enum {
TCG_REG_R29,
TCG_REG_R30,
TCG_REG_R31
-};
+} TCGReg;
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R1
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
index 8d1fb73..97eec08 100644
--- a/tcg/ppc64/tcg-target.h
+++ b/tcg/ppc64/tcg-target.h
@@ -26,7 +26,7 @@
#define TCG_TARGET_WORDS_BIGENDIAN
#define TCG_TARGET_NB_REGS 32
-enum {
+typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_R2,
@@ -59,7 +59,7 @@ enum {
TCG_REG_R29,
TCG_REG_R30,
TCG_REG_R31
-};
+} TCGReg;
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R1
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 1464ef4..c3fe131 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -27,7 +27,7 @@
#define TCG_TARGET_NB_REGS 32
-enum {
+typedef enum {
TCG_REG_G0 = 0,
TCG_REG_G1,
TCG_REG_G2,
@@ -60,7 +60,7 @@ enum {
TCG_REG_I5,
TCG_REG_I6,
TCG_REG_I7,
-};
+} TCGReg;
#define TCG_CT_CONST_S11 0x100
#define TCG_CT_CONST_S13 0x200
diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
index 81ded86..cb5858c 100644
--- a/tcg/tci/tcg-target.h
+++ b/tcg/tci/tcg-target.h
@@ -150,7 +150,7 @@ typedef enum {
#endif
/* Special value UINT8_MAX is used by TCI to encode constant values. */
TCG_CONST = UINT8_MAX
-} TCGRegister;
+} TCGReg;
void tci_disas(uint8_t opc);
diff --git a/tci.c b/tci.c
index f17785d..a20a714 100644
--- a/tci.c
+++ b/tci.c
@@ -63,90 +63,90 @@ void *tci_tb_ptr;
static tcg_target_ulong tci_reg[TCG_TARGET_NB_REGS];
-static tcg_target_ulong tci_read_reg(TCGRegister index)
+static tcg_target_ulong tci_read_reg(TCGReg index)
{
assert(index < ARRAY_SIZE(tci_reg));
return tci_reg[index];
}
#if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64
-static int8_t tci_read_reg8s(TCGRegister index)
+static int8_t tci_read_reg8s(TCGReg index)
{
return (int8_t)tci_read_reg(index);
}
#endif
#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64
-static int16_t tci_read_reg16s(TCGRegister index)
+static int16_t tci_read_reg16s(TCGReg index)
{
return (int16_t)tci_read_reg(index);
}
#endif
#if TCG_TARGET_REG_BITS == 64
-static int32_t tci_read_reg32s(TCGRegister index)
+static int32_t tci_read_reg32s(TCGReg index)
{
return (int32_t)tci_read_reg(index);
}
#endif
-static uint8_t tci_read_reg8(TCGRegister index)
+static uint8_t tci_read_reg8(TCGReg index)
{
return (uint8_t)tci_read_reg(index);
}
-static uint16_t tci_read_reg16(TCGRegister index)
+static uint16_t tci_read_reg16(TCGReg index)
{
return (uint16_t)tci_read_reg(index);
}
-static uint32_t tci_read_reg32(TCGRegister index)
+static uint32_t tci_read_reg32(TCGReg index)
{
return (uint32_t)tci_read_reg(index);
}
#if TCG_TARGET_REG_BITS == 64
-static uint64_t tci_read_reg64(TCGRegister index)
+static uint64_t tci_read_reg64(TCGReg index)
{
return tci_read_reg(index);
}
#endif
-static void tci_write_reg(TCGRegister index, tcg_target_ulong value)
+static void tci_write_reg(TCGReg index, tcg_target_ulong value)
{
assert(index < ARRAY_SIZE(tci_reg));
assert(index != TCG_AREG0);
tci_reg[index] = value;
}
-static void tci_write_reg8s(TCGRegister index, int8_t value)
+static void tci_write_reg8s(TCGReg index, int8_t value)
{
tci_write_reg(index, value);
}
-static void tci_write_reg16s(TCGRegister index, int16_t value)
+static void tci_write_reg16s(TCGReg index, int16_t value)
{
tci_write_reg(index, value);
}
#if TCG_TARGET_REG_BITS == 64
-static void tci_write_reg32s(TCGRegister index, int32_t value)
+static void tci_write_reg32s(TCGReg index, int32_t value)
{
tci_write_reg(index, value);
}
#endif
-static void tci_write_reg8(TCGRegister index, uint8_t value)
+static void tci_write_reg8(TCGReg index, uint8_t value)
{
tci_write_reg(index, value);
}
-static void tci_write_reg16(TCGRegister index, uint16_t value)
+static void tci_write_reg16(TCGReg index, uint16_t value)
{
tci_write_reg(index, value);
}
-static void tci_write_reg32(TCGRegister index, uint32_t value)
+static void tci_write_reg32(TCGReg index, uint32_t value)
{
tci_write_reg(index, value);
}
@@ -159,7 +159,7 @@ static void tci_write_reg64(uint32_t high_index, uint32_t low_index,
tci_write_reg(high_index, value >> 32);
}
#elif TCG_TARGET_REG_BITS == 64
-static void tci_write_reg64(TCGRegister index, uint64_t value)
+static void tci_write_reg64(TCGReg index, uint64_t value)
{
tci_write_reg(index, value);
}
@@ -290,7 +290,7 @@ static target_ulong tci_read_ulong(uint8_t **tb_ptr)
static tcg_target_ulong tci_read_ri(uint8_t **tb_ptr)
{
tcg_target_ulong value;
- TCGRegister r = **tb_ptr;
+ TCGReg r = **tb_ptr;
*tb_ptr += 1;
if (r == TCG_CONST) {
value = tci_read_i(tb_ptr);
@@ -304,7 +304,7 @@ static tcg_target_ulong tci_read_ri(uint8_t **tb_ptr)
static uint32_t tci_read_ri32(uint8_t **tb_ptr)
{
uint32_t value;
- TCGRegister r = **tb_ptr;
+ TCGReg r = **tb_ptr;
*tb_ptr += 1;
if (r == TCG_CONST) {
value = tci_read_i32(tb_ptr);
@@ -326,7 +326,7 @@ static uint64_t tci_read_ri64(uint8_t **tb_ptr)
static uint64_t tci_read_ri64(uint8_t **tb_ptr)
{
uint64_t value;
- TCGRegister r = **tb_ptr;
+ TCGReg r = **tb_ptr;
*tb_ptr += 1;
if (r == TCG_CONST) {
value = tci_read_i64(tb_ptr);
--
1.7.6.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 2/3] tcg: Use TCGReg for standard tcg-target entry points.
2011-11-09 18:03 [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Richard Henderson
2011-11-09 18:03 ` [Qemu-devel] [PATCH 1/3] tcg: Standardize on TCGReg as the enum for hard registers Richard Henderson
@ 2011-11-09 18:03 ` Richard Henderson
2011-11-09 18:03 ` [Qemu-devel] [PATCH 3/3] tcg-sparc: Fix set-but-not used warnings Richard Henderson
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Richard Henderson @ 2011-11-09 18:03 UTC (permalink / raw)
To: qemu-devel; +Cc: Stefan Weil, Alexander Graf, Blue Swirl, Aurelien Jarno
Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/arm/tcg-target.c | 13 +++++++------
tcg/hppa/tcg-target.c | 12 ++++++------
tcg/i386/tcg-target.c | 13 +++++++------
tcg/ia64/tcg-target.c | 12 ++++++------
tcg/mips/tcg-target.c | 13 +++++++------
tcg/ppc/tcg-target.c | 8 ++++----
tcg/ppc64/tcg-target.c | 8 ++++----
tcg/sparc/tcg-target.c | 13 +++++++------
tcg/tcg.c | 8 ++++----
tcg/tci/tcg-target.c | 8 ++++----
10 files changed, 56 insertions(+), 52 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index ce4760d..e05a64f 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1808,25 +1808,26 @@ static void tcg_target_init(TCGContext *s)
CPU_TEMP_BUF_NLONGS * sizeof(long));
}
-static inline void tcg_out_ld(TCGContext *s, TCGType type, int arg,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
+ TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ld32u(s, COND_AL, arg, arg1, arg2);
}
-static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
+ TCGReg arg1, tcg_target_long arg2)
{
tcg_out_st32(s, COND_AL, arg, arg1, arg2);
}
-static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type,
+ TCGReg ret, TCGReg arg)
{
tcg_out_dat_reg(s, COND_AL, ARITH_MOV, ret, 0, arg, SHIFT_IMM_LSL(0));
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
- int ret, tcg_target_long arg)
+ TCGReg ret, tcg_target_long arg)
{
tcg_out_movi32(s, COND_AL, ret, arg);
}
diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c
index 71d9677..59d4d12 100644
--- a/tcg/hppa/tcg-target.c
+++ b/tcg/hppa/tcg-target.c
@@ -338,7 +338,7 @@ static int tcg_target_const_match(tcg_target_long val,
/* supplied by libgcc */
extern void *__canonicalize_funcptr_for_compare(void *);
-static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
+static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
{
/* PA1.1 defines COPY as OR r,0,t; PA2.0 defines COPY as LDO 0(r),t
but hppa-dis.c is unaware of this definition */
@@ -349,7 +349,7 @@ static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
}
static void tcg_out_movi(TCGContext *s, TCGType type,
- int ret, tcg_target_long arg)
+ TCGReg ret, tcg_target_long arg)
{
if (check_fit_tl(arg, 14)) {
tcg_out32(s, INSN_LDO | INSN_R1(ret)
@@ -393,15 +393,15 @@ static void tcg_out_ldst(TCGContext *s, int ret, int addr,
}
/* This function is required by tcg.c. */
-static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret,
+ TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ldst(s, ret, arg1, arg2, INSN_LDW);
}
/* This function is required by tcg.c. */
-static inline void tcg_out_st(TCGContext *s, TCGType type, int ret,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg ret,
+ TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ldst(s, ret, arg1, arg2, INSN_STW);
}
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index 3069e53..dc81572 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -518,7 +518,8 @@ static inline void tgen_arithr(TCGContext *s, int subop, int dest, int src)
tcg_out_modrm(s, OPC_ARITH_GvEv + (subop << 3) + ext, dest, src);
}
-static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type,
+ TCGReg ret, TCGReg arg)
{
if (arg != ret) {
int opc = OPC_MOVL_GvEv + (type == TCG_TYPE_I64 ? P_REXW : 0);
@@ -527,7 +528,7 @@ static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
}
static void tcg_out_movi(TCGContext *s, TCGType type,
- int ret, tcg_target_long arg)
+ TCGReg ret, tcg_target_long arg)
{
if (arg == 0) {
tgen_arithr(s, ARITH_XOR, ret, ret);
@@ -568,15 +569,15 @@ static inline void tcg_out_pop(TCGContext *s, int reg)
tcg_out_opc(s, OPC_POP_r32 + LOWREGMASK(reg), 0, reg, 0);
}
-static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret,
+ TCGReg arg1, tcg_target_long arg2)
{
int opc = OPC_MOVL_GvEv + (type == TCG_TYPE_I64 ? P_REXW : 0);
tcg_out_modrm_offset(s, opc, ret, arg1, arg2);
}
-static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
+ TCGReg arg1, tcg_target_long arg2)
{
int opc = OPC_MOVL_EvGv + (type == TCG_TYPE_I64 ? P_REXW : 0);
tcg_out_modrm_offset(s, opc, arg, arg1, arg2);
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index bb22b9a..e3de79f 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -830,7 +830,7 @@ static inline void tcg_out_bundle(TCGContext *s, int template,
}
static inline void tcg_out_mov(TCGContext *s, TCGType type,
- TCGArg ret, TCGArg arg)
+ TCGReg ret, TCGReg arg)
{
tcg_out_bundle(s, mmI,
tcg_opc_m48(TCG_REG_P0, OPC_NOP_M48, 0),
@@ -839,7 +839,7 @@ static inline void tcg_out_mov(TCGContext *s, TCGType type,
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
- TCGArg reg, tcg_target_long arg)
+ TCGReg reg, tcg_target_long arg)
{
tcg_out_bundle(s, mLX,
tcg_opc_m48(TCG_REG_P0, OPC_NOP_M48, 0),
@@ -972,8 +972,8 @@ static inline void tcg_out_st_rel(TCGContext *s, uint64_t opc_m4, TCGArg arg,
}
}
-static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGArg arg,
- TCGArg arg1, tcg_target_long arg2)
+static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
+ TCGReg arg1, tcg_target_long arg2)
{
if (type == TCG_TYPE_I32) {
tcg_out_ld_rel(s, OPC_LD4_M1, arg, arg1, arg2);
@@ -982,8 +982,8 @@ static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGArg arg,
}
}
-static inline void tcg_out_st(TCGContext *s, TCGType type, TCGArg arg,
- TCGArg arg1, tcg_target_long arg2)
+static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
+ TCGReg arg1, tcg_target_long arg2)
{
if (type == TCG_TYPE_I32) {
tcg_out_st_rel(s, OPC_ST4_M4, arg, arg1, arg2);
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index a33d21f..c5c3282 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -379,13 +379,14 @@ static inline void tcg_out_nop(TCGContext *s)
tcg_out32(s, 0);
}
-static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type,
+ TCGReg ret, TCGReg arg)
{
tcg_out_opc_reg(s, OPC_ADDU, ret, arg, TCG_REG_ZERO);
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
- int reg, int32_t arg)
+ TCGReg reg, tcg_target_long arg)
{
if (arg == (int16_t)arg) {
tcg_out_opc_imm(s, OPC_ADDIU, reg, TCG_REG_ZERO, arg);
@@ -480,14 +481,14 @@ static inline void tcg_out_ldst(TCGContext *s, int opc, int arg,
}
}
-static inline void tcg_out_ld(TCGContext *s, TCGType type, int arg,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
+ TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ldst(s, OPC_LW, arg, arg1, arg2);
}
-static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
+ TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ldst(s, OPC_SW, arg, arg1, arg2);
}
diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
index 87cc117..f5d9bf3 100644
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -436,13 +436,13 @@ static const uint32_t tcg_to_bc[10] = {
[TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE,
};
-static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
+static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
{
tcg_out32 (s, OR | SAB (arg, ret, arg));
}
static void tcg_out_movi(TCGContext *s, TCGType type,
- int ret, tcg_target_long arg)
+ TCGReg ret, tcg_target_long arg)
{
if (arg == (int16_t) arg)
tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff));
@@ -961,13 +961,13 @@ static void tcg_target_qemu_prologue (TCGContext *s)
tcg_out32 (s, BCLR | BO_ALWAYS);
}
-static void tcg_out_ld (TCGContext *s, TCGType type, int ret, int arg1,
+static void tcg_out_ld (TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
tcg_target_long arg2)
{
tcg_out_ldst (s, ret, arg1, arg2, LWZ, LWZX);
}
-static void tcg_out_st (TCGContext *s, TCGType type, int arg, int arg1,
+static void tcg_out_st (TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
tcg_target_long arg2)
{
tcg_out_ldst (s, arg, arg1, arg2, STW, STWX);
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 3d24cd4..4800977 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -435,7 +435,7 @@ static const uint32_t tcg_to_bc[10] = {
[TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE,
};
-static void tcg_out_mov (TCGContext *s, TCGType type, int ret, int arg)
+static void tcg_out_mov (TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
{
tcg_out32 (s, OR | SAB (arg, ret, arg));
}
@@ -459,7 +459,7 @@ static void tcg_out_movi32 (TCGContext *s, int ret, int32_t arg)
}
static void tcg_out_movi (TCGContext *s, TCGType type,
- int ret, tcg_target_long arg)
+ TCGReg ret, tcg_target_long arg)
{
int32_t arg32 = arg;
arg = type == TCG_TYPE_I32 ? arg & 0xffffffff : arg;
@@ -930,7 +930,7 @@ static void tcg_target_qemu_prologue (TCGContext *s)
tcg_out32 (s, BCLR | BO_ALWAYS);
}
-static void tcg_out_ld (TCGContext *s, TCGType type, int ret, int arg1,
+static void tcg_out_ld (TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
tcg_target_long arg2)
{
if (type == TCG_TYPE_I32)
@@ -939,7 +939,7 @@ static void tcg_out_ld (TCGContext *s, TCGType type, int ret, int arg1,
tcg_out_ldsta (s, ret, arg1, arg2, LD, LDX);
}
-static void tcg_out_st (TCGContext *s, TCGType type, int arg, int arg1,
+static void tcg_out_st (TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
tcg_target_long arg2)
{
if (type == TCG_TYPE_I32)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index fc3fd7f..b96312b 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -306,7 +306,8 @@ static void tcg_out_arithc(TCGContext *s, int rd, int rs1,
| (val2const ? INSN_IMM13(val2) : INSN_RS2(val2)));
}
-static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type,
+ TCGReg ret, TCGReg arg)
{
tcg_out_arith(s, ret, arg, TCG_REG_G0, ARITH_OR);
}
@@ -333,7 +334,7 @@ static inline void tcg_out_movi_imm32(TCGContext *s, int ret, uint32_t arg)
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
- int ret, tcg_target_long arg)
+ TCGReg ret, tcg_target_long arg)
{
/* All 32-bit constants, as well as 64-bit constants with
no high bits set go through movi_imm32. */
@@ -398,8 +399,8 @@ static inline void tcg_out_ldst_asi(TCGContext *s, int ret, int addr,
INSN_ASI(asi) | INSN_RS2(addr));
}
-static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret,
+ TCGReg arg1, tcg_target_long arg2)
{
if (type == TCG_TYPE_I32)
tcg_out_ldst(s, ret, arg1, arg2, LDUW);
@@ -407,8 +408,8 @@ static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
tcg_out_ldst(s, ret, arg1, arg2, LDX);
}
-static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
- int arg1, tcg_target_long arg2)
+static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
+ TCGReg arg1, tcg_target_long arg2)
{
if (type == TCG_TYPE_I32)
tcg_out_ldst(s, arg, arg1, arg2, STW);
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 6b27d7b..77bd6ef 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -71,14 +71,14 @@ static void patch_reloc(uint8_t *code_ptr, int type,
/* Forward declarations for functions declared and used in tcg-target.c. */
static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str);
-static void tcg_out_ld(TCGContext *s, TCGType type, int ret, int arg1,
+static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
tcg_target_long arg2);
-static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg);
+static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg);
static void tcg_out_movi(TCGContext *s, TCGType type,
- int ret, tcg_target_long arg);
+ TCGReg ret, tcg_target_long arg);
static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
const int *const_args);
-static void tcg_out_st(TCGContext *s, TCGType type, int arg, int arg1,
+static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
tcg_target_long arg2);
static int tcg_target_const_match(tcg_target_long val,
const TCGArgConstraint *arg_ct);
diff --git a/tcg/tci/tcg-target.c b/tcg/tci/tcg-target.c
index e373e2a..942910e 100644
--- a/tcg/tci/tcg-target.c
+++ b/tcg/tci/tcg-target.c
@@ -495,7 +495,7 @@ static void tci_out_label(TCGContext *s, TCGArg arg)
}
}
-static void tcg_out_ld(TCGContext *s, TCGType type, int ret, int arg1,
+static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
tcg_target_long arg2)
{
uint8_t *old_code_ptr = s->code_ptr;
@@ -519,7 +519,7 @@ static void tcg_out_ld(TCGContext *s, TCGType type, int ret, int arg1,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
-static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
+static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
{
uint8_t *old_code_ptr = s->code_ptr;
assert(ret != arg);
@@ -534,7 +534,7 @@ static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
}
static void tcg_out_movi(TCGContext *s, TCGType type,
- int t0, tcg_target_long arg)
+ TCGReg t0, tcg_target_long arg)
{
uint8_t *old_code_ptr = s->code_ptr;
uint32_t arg32 = arg;
@@ -834,7 +834,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
-static void tcg_out_st(TCGContext *s, TCGType type, int arg, int arg1,
+static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
tcg_target_long arg2)
{
uint8_t *old_code_ptr = s->code_ptr;
--
1.7.6.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 3/3] tcg-sparc: Fix set-but-not used warnings.
2011-11-09 18:03 [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Richard Henderson
2011-11-09 18:03 ` [Qemu-devel] [PATCH 1/3] tcg: Standardize on TCGReg as the enum for hard registers Richard Henderson
2011-11-09 18:03 ` [Qemu-devel] [PATCH 2/3] tcg: Use TCGReg for standard tcg-target entry points Richard Henderson
@ 2011-11-09 18:03 ` Richard Henderson
2011-11-19 13:59 ` Blue Swirl
2011-11-09 18:51 ` [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Andreas Färber
` (2 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Richard Henderson @ 2011-11-09 18:03 UTC (permalink / raw)
To: qemu-devel; +Cc: Stefan Weil, Alexander Graf, Blue Swirl, Aurelien Jarno
In both cases, val is computed, but then not used in the
subsequent line, which then re-computes the quantity in
a different type (int32_t vs unsigned long).
Keep the computation type that's been working so far.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/sparc/tcg-target.c | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index b96312b..5cd5a3b 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -473,11 +473,9 @@ static inline void tcg_out_nop(TCGContext *s)
static void tcg_out_branch_i32(TCGContext *s, int opc, int label_index)
{
- int32_t val;
TCGLabel *l = &s->labels[label_index];
if (l->has_value) {
- val = l->u.value - (tcg_target_long)s->code_ptr;
tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x2)
| INSN_OFF22(l->u.value - (unsigned long)s->code_ptr)));
} else {
@@ -489,11 +487,9 @@ static void tcg_out_branch_i32(TCGContext *s, int opc, int label_index)
#if TCG_TARGET_REG_BITS == 64
static void tcg_out_branch_i64(TCGContext *s, int opc, int label_index)
{
- int32_t val;
TCGLabel *l = &s->labels[label_index];
if (l->has_value) {
- val = l->u.value - (tcg_target_long)s->code_ptr;
tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x1) |
(0x5 << 19) |
INSN_OFF19(l->u.value - (unsigned long)s->code_ptr)));
--
1.7.6.4
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points
2011-11-09 18:03 [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Richard Henderson
` (2 preceding siblings ...)
2011-11-09 18:03 ` [Qemu-devel] [PATCH 3/3] tcg-sparc: Fix set-but-not used warnings Richard Henderson
@ 2011-11-09 18:51 ` Andreas Färber
2011-11-09 20:19 ` Stefan Weil
2011-11-10 13:40 ` Alexander Graf
5 siblings, 0 replies; 9+ messages in thread
From: Andreas Färber @ 2011-11-09 18:51 UTC (permalink / raw)
To: Richard Henderson
Cc: Blue Swirl, Stefan Weil, qemu-devel, Aurelien Jarno,
Alexander Graf
Am 09.11.2011 19:03, schrieb Richard Henderson:
> This is the direction in which I believe we should fix the s390
> compilation failure. I've cross-compiled --target-list=i386-softmmu
> for every tcg host to make sure that they all build.
Thanks Richard, I was planning to do the same thing. :)
1 and 2:
Reviewed-by: Andreas Färber <afaerber@suse.de>
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points
2011-11-09 18:03 [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Richard Henderson
` (3 preceding siblings ...)
2011-11-09 18:51 ` [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Andreas Färber
@ 2011-11-09 20:19 ` Stefan Weil
2011-11-09 22:11 ` Richard Henderson
2011-11-10 13:40 ` Alexander Graf
5 siblings, 1 reply; 9+ messages in thread
From: Stefan Weil @ 2011-11-09 20:19 UTC (permalink / raw)
To: Richard Henderson
Cc: Blue Swirl, Anthony Liguori, qemu-devel, Aurelien Jarno,
Alexander Graf
Am 09.11.2011 19:03, schrieb Richard Henderson:
> This is the direction in which I believe we should fix the s390
> compilation failure. I've cross-compiled --target-list=i386-softmmu
> for every tcg host to make sure that they all build.
>
> The second patch cannot be split into per-host patches, lest it
> introduce regressions on the way to fixing them.
>
>
> r~
>
>
> Richard Henderson (3):
> tcg: Standardize on TCGReg as the enum for hard registers
> tcg: Use TCGReg for standard tcg-target entry points.
> tcg-sparc: Fix set-but-not used warnings.
>
> tcg/arm/tcg-target.c | 13 +++++++------
> tcg/arm/tcg-target.h | 4 ++--
> tcg/hppa/tcg-target.c | 12 ++++++------
> tcg/hppa/tcg-target.h | 4 ++--
> tcg/i386/tcg-target.c | 13 +++++++------
> tcg/i386/tcg-target.h | 4 ++--
> tcg/ia64/tcg-target.c | 12 ++++++------
> tcg/ia64/tcg-target.h | 4 ++--
> tcg/mips/tcg-target.c | 13 +++++++------
> tcg/mips/tcg-target.h | 4 ++--
> tcg/ppc/tcg-target.c | 8 ++++----
> tcg/ppc/tcg-target.h | 4 ++--
> tcg/ppc64/tcg-target.c | 8 ++++----
> tcg/ppc64/tcg-target.h | 4 ++--
> tcg/sparc/tcg-target.c | 17 +++++++----------
> tcg/sparc/tcg-target.h | 4 ++--
> tcg/tcg.c | 8 ++++----
> tcg/tci/tcg-target.c | 8 ++++----
> tcg/tci/tcg-target.h | 2 +-
> tci.c | 38 +++++++++++++++++++-------------------
> 20 files changed, 92 insertions(+), 92 deletions(-)
Hi Richard,
cross compiling for all tcg targets must have been a really
hard job, so thank you very much for what you have done!
Did you get all needed cross packages from your host's
distribution? Which one?
There remain small risks caused by the modified argument types:
* TCGReg is an enum, so it might be unsigned while int was signed.
As Blue already wrote, signedness should not matter here, so
the risk seems to be very low.
* Using TCGReg instead of TCGArg (ia64) should also be a very small risk.
* Using tcg_target_long instead of int32 (mips) potentially allows larger
arguments. Only the lower 16 bits are used, so this should pose no
problem.
Therefore for the first two patches, I can add a
Reviewed-by: Stefan Weil <sw@weilnetz.de>
PS. I still think TCGRegister would be nicer, but having a patch with TCGReg
is better than nothing. Anthony, patches 1 and 2 are needed for
QEMU 1.0
because they fix compilation for ia64 and s390.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points
2011-11-09 20:19 ` Stefan Weil
@ 2011-11-09 22:11 ` Richard Henderson
0 siblings, 0 replies; 9+ messages in thread
From: Richard Henderson @ 2011-11-09 22:11 UTC (permalink / raw)
To: Stefan Weil
Cc: Blue Swirl, Anthony Liguori, qemu-devel, Aurelien Jarno,
Alexander Graf
On 11/09/2011 12:19 PM, Stefan Weil wrote:
> Did you get all needed cross packages from your host's
> distribution? Which one?
No. I built the compilers myself, and downloaded the relevant -devel
packages from a selection of fedora and debian to install by hand into
in the compiler sys-root.
r~
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points
2011-11-09 18:03 [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Richard Henderson
` (4 preceding siblings ...)
2011-11-09 20:19 ` Stefan Weil
@ 2011-11-10 13:40 ` Alexander Graf
5 siblings, 0 replies; 9+ messages in thread
From: Alexander Graf @ 2011-11-10 13:40 UTC (permalink / raw)
To: Richard Henderson; +Cc: Stefan Weil, qemu-devel, Blue Swirl, Aurelien Jarno
On 11/09/2011 07:03 PM, Richard Henderson wrote:
> This is the direction in which I believe we should fix the s390
> compilation failure. I've cross-compiled --target-list=i386-softmmu
> for every tcg host to make sure that they all build.
>
> The second patch cannot be split into per-host patches, lest it
> introduce regressions on the way to fixing them.
Works on s390 :)
Tested-by: Alexander Graf <agraf@suse.de>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Qemu-devel] [PATCH 3/3] tcg-sparc: Fix set-but-not used warnings.
2011-11-09 18:03 ` [Qemu-devel] [PATCH 3/3] tcg-sparc: Fix set-but-not used warnings Richard Henderson
@ 2011-11-19 13:59 ` Blue Swirl
0 siblings, 0 replies; 9+ messages in thread
From: Blue Swirl @ 2011-11-19 13:59 UTC (permalink / raw)
To: Richard Henderson; +Cc: Stefan Weil, qemu-devel, Alexander Graf, Aurelien Jarno
Thanks, applied.
On Wed, Nov 9, 2011 at 18:03, Richard Henderson <rth@twiddle.net> wrote:
> In both cases, val is computed, but then not used in the
> subsequent line, which then re-computes the quantity in
> a different type (int32_t vs unsigned long).
>
> Keep the computation type that's been working so far.
>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
> tcg/sparc/tcg-target.c | 4 ----
> 1 files changed, 0 insertions(+), 4 deletions(-)
>
> diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
> index b96312b..5cd5a3b 100644
> --- a/tcg/sparc/tcg-target.c
> +++ b/tcg/sparc/tcg-target.c
> @@ -473,11 +473,9 @@ static inline void tcg_out_nop(TCGContext *s)
>
> static void tcg_out_branch_i32(TCGContext *s, int opc, int label_index)
> {
> - int32_t val;
> TCGLabel *l = &s->labels[label_index];
>
> if (l->has_value) {
> - val = l->u.value - (tcg_target_long)s->code_ptr;
> tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x2)
> | INSN_OFF22(l->u.value - (unsigned long)s->code_ptr)));
> } else {
> @@ -489,11 +487,9 @@ static void tcg_out_branch_i32(TCGContext *s, int opc, int label_index)
> #if TCG_TARGET_REG_BITS == 64
> static void tcg_out_branch_i64(TCGContext *s, int opc, int label_index)
> {
> - int32_t val;
> TCGLabel *l = &s->labels[label_index];
>
> if (l->has_value) {
> - val = l->u.value - (tcg_target_long)s->code_ptr;
> tcg_out32(s, (INSN_OP(0) | INSN_COND(opc, 0) | INSN_OP2(0x1) |
> (0x5 << 19) |
> INSN_OFF19(l->u.value - (unsigned long)s->code_ptr)));
> --
> 1.7.6.4
>
>
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2011-11-19 13:59 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
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2011-11-09 18:03 [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Richard Henderson
2011-11-09 18:03 ` [Qemu-devel] [PATCH 1/3] tcg: Standardize on TCGReg as the enum for hard registers Richard Henderson
2011-11-09 18:03 ` [Qemu-devel] [PATCH 2/3] tcg: Use TCGReg for standard tcg-target entry points Richard Henderson
2011-11-09 18:03 ` [Qemu-devel] [PATCH 3/3] tcg-sparc: Fix set-but-not used warnings Richard Henderson
2011-11-19 13:59 ` Blue Swirl
2011-11-09 18:51 ` [Qemu-devel] [PATCH 0/3] Standardize on TCGReg for entry points Andreas Färber
2011-11-09 20:19 ` Stefan Weil
2011-11-09 22:11 ` Richard Henderson
2011-11-10 13:40 ` Alexander Graf
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