From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:49112) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RR1ML-0003yf-D1 for qemu-devel@nongnu.org; Thu, 17 Nov 2011 07:46:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RR1ME-00060R-OL for qemu-devel@nongnu.org; Thu, 17 Nov 2011 07:46:29 -0500 Received: from mx1.redhat.com ([209.132.183.28]:3505) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RR1ME-000603-HE for qemu-devel@nongnu.org; Thu, 17 Nov 2011 07:46:22 -0500 Message-ID: <4EC50219.603@redhat.com> Date: Thu, 17 Nov 2011 14:46:17 +0200 From: Avi Kivity MIME-Version: 1.0 References: <1321532700-8929-1-git-send-email-benoit.canet@gmail.com> <1321532700-8929-2-git-send-email-benoit.canet@gmail.com> In-Reply-To: <1321532700-8929-2-git-send-email-benoit.canet@gmail.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 1/5] sh7750: convert memory controller/ioport to memory API List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?ISO-8859-1?Q?Beno=EEt_Canet?= Cc: qemu-devel@nongnu.org On 11/17/2011 02:24 PM, Beno=EEt Canet wrote: > Signed-off-by: Benoit Canet > =20 > /* sh775x interrupt controller tables for sh_intc.c > @@ -706,30 +714,40 @@ static CPUWriteMemoryFunc * const sh7750_mmct_wri= te[] =3D { > sh7750_mmct_writel > }; > =20 > -SH7750State *sh7750_init(CPUSH4State * cpu) > +SH7750State *sh7750_init(CPUSH4State * cpu, MemoryRegion *sysmem) > { > SH7750State *s; > - int sh7750_io_memory; > int sh7750_mm_cache_and_tlb; /* memory mapped cache and tlb */ > =20 > s =3D g_malloc0(sizeof(SH7750State)); > s->cpu =3D cpu; > s->periph_freq =3D 60000000; /* 60MHz */ > - sh7750_io_memory =3D cpu_register_io_memory(sh7750_mem_read, > - sh7750_mem_write, s, > - DEVICE_NATIVE_ENDIAN); > - cpu_register_physical_memory_offset(0x1f000000, 0x1000, > - sh7750_io_memory, 0x1f000000); > - cpu_register_physical_memory_offset(0xff000000, 0x1000, > - sh7750_io_memory, 0x1f000000); > - cpu_register_physical_memory_offset(0x1f800000, 0x1000, > - sh7750_io_memory, 0x1f800000); > - cpu_register_physical_memory_offset(0xff800000, 0x1000, > - sh7750_io_memory, 0x1f800000); > - cpu_register_physical_memory_offset(0x1fc00000, 0x1000, > - sh7750_io_memory, 0x1fc00000); > - cpu_register_physical_memory_offset(0xffc00000, 0x1000, > - sh7750_io_memory, 0x1fc00000); > + memory_region_init_io(&s->iomem, &sh7750_mem_ops, s, > + "memory", 0x1fe00000); Any size >=3D 0x1fc01000 will work here, why did you pick px1fe00000?=20 just curious. I see serial starts at that address, but note that even a larger size won't interfere, since we never add anything to sysmem at that address. Anyway, no need to change the patch, since it will work just fine. --=20 error compiling committee.c: too many arguments to function