From: Richard Henderson <rth@twiddle.net>
To: "Andreas Färber" <andreas.faerber@web.de>
Cc: Peter Maydell <peter.maydell@linaro.org>,
Renato Utsch <renatoutsch@gmail.com>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] Status of the SH4 / ARM7 emulators
Date: Wed, 23 Nov 2011 13:59:05 -0800 [thread overview]
Message-ID: <4ECD6CA9.9070601@twiddle.net> (raw)
In-Reply-To: <4EC96838.9000907@web.de>
On 11/20/2011 12:51 PM, Andreas Färber wrote:
> * Part of the problem is that common CPUState fields are not at the
> start of the struct. I have therefore been playing with a
> CPU_COMMON_PREFIX at the start of the struct and using a macro for
> clearing on reset, which preserves part of the common prefix fields.
Most of the RISC hosts have a limited displacement in their load and
store instructions. E.g. 14 bits for Sparc, 12 bits for ARM, 10.
We want to be able to load and store the target cpu registers very
efficiently.
If you move all the common fields to the beginning, that will include
the (rather large) TLB tables, and overflow those small offsets.
This change would almost certainly be a Large Mistake.
r~
next prev parent reply other threads:[~2011-11-23 21:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-19 21:20 [Qemu-devel] Status of the SH4 / ARM7 emulators Renato Utsch
2011-11-19 21:53 ` Peter Maydell
2011-11-20 20:51 ` Andreas Färber
2011-11-20 21:48 ` Peter Maydell
2011-11-23 21:59 ` Richard Henderson [this message]
2011-11-24 10:44 ` Andreas Färber
2011-11-29 9:09 ` Tristan Gingold
2011-11-29 15:47 ` Richard Henderson
2011-11-20 18:08 ` Andreas Färber
2011-11-20 19:56 ` Peter Maydell
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