[Qemu-devel] [PATCH v8 0/2] PC system flash support

[Qemu-devel] [PATCH v8 0/2] PC system flash support

[Jordan Justen]

Enable flash emulation in a PC system using pflash_cfi01.

v8:
* Cleanup two chunks of debug code (printf messages)
* Fix comment in pc.h (pcflash.c => pc_sysfw.c)

v7:
* Do not add system firmware to qemu roms
* If kvm is enabled, copy pflash drive contents into a
  read-only ram region, since kvm cannot currently execute
  code from a pflash device.
* Rename pcflash.c to pc_sysfw.c

v6:
* Rebase for memory API
* pflash_cfi01: Set error in status register when a write to
  erase is attempted in read-only mode.
* Add system firmware to qemu roms

v5:
* Enable pflash read-only mode
* Enable -drive with if=pflash to define system firmware image

v4:
* Rebase

v3:
* Fix code style issues
* Add additional comments

v2:
* Convert debug printf to DPRINTF

Jordan Justen (2):
  pflash: Support read-only mode
  pc: Support system flash memory with pflash

 Makefile.target                    |    1 +
 blockdev.c                         |    3 +-
 default-configs/i386-softmmu.mak   |    1 +
 default-configs/x86_64-softmmu.mak |    1 +
 hw/boards.h                        |    1 +
 hw/pc.c                            |   55 +---------
 hw/pc.h                            |    3 +
 hw/pc_sysfw.c                      |  194 ++++++++++++++++++++++++++++++++++++
 hw/pflash_cfi01.c                  |   44 ++++++---
 hw/pflash_cfi02.c                  |   83 ++++++++-------
 vl.c                               |    2 +-
 11 files changed, 284 insertions(+), 104 deletions(-)
 create mode 100644 hw/pc_sysfw.c

[Qemu-devel] [PATCH v8 1/2] pflash: Support read-only mode

[Jordan Justen]

When read-only mode is enabled, no changes will be made
to the flash image in memory, and no bdrv_write calls will be
made.

For pflash_cfi01 (Intel), if the flash is in read-only mode
then the status register will signal block erase error or
program error when these operations are attempted.

For pflash_cfi02 (AMD), if the flash is in read-only mode
then the pflash will silently ignore all write/erase commands.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
---
 blockdev.c        |    3 +-
 hw/pflash_cfi01.c |   44 +++++++++++++++++++---------
 hw/pflash_cfi02.c |   83 ++++++++++++++++++++++++++++------------------------
 3 files changed, 77 insertions(+), 53 deletions(-)

diff --git a/blockdev.c b/blockdev.c
index 2228186..ff58d5e 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -506,7 +506,8 @@ DriveInfo *drive_init(QemuOpts *opts, int default_to_scsi)
         /* CDROM is fine for any interface, don't check.  */
         ro = 1;
     } else if (ro == 1) {
-        if (type != IF_SCSI && type != IF_VIRTIO && type != IF_FLOPPY && type != IF_NONE) {
+        if (type != IF_SCSI && type != IF_VIRTIO && type != IF_FLOPPY &&
+            type != IF_NONE && type != IF_PFLASH) {
             error_report("readonly not supported by this bus type");
             goto err;
         }
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index 69b8e3d..1e0a053 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -283,8 +283,12 @@ static void pflash_write(pflash_t *pfl, target_phys_addr_t offset,
                     TARGET_FMT_plx "\n",
                     __func__, offset, pfl->sector_len);
 
-            memset(p + offset, 0xff, pfl->sector_len);
-            pflash_update(pfl, offset, pfl->sector_len);
+            if (!pfl->ro) {
+                memset(p + offset, 0xff, pfl->sector_len);
+                pflash_update(pfl, offset, pfl->sector_len);
+            } else {
+                pfl->status |= 0x20; /* Block erase error */
+            }
             pfl->status |= 0x80; /* Ready! */
             break;
         case 0x50: /* Clear status bits */
@@ -323,8 +327,12 @@ static void pflash_write(pflash_t *pfl, target_phys_addr_t offset,
         case 0x10: /* Single Byte Program */
         case 0x40: /* Single Byte Program */
             DPRINTF("%s: Single Byte Program\n", __func__);
-            pflash_data_write(pfl, offset, value, width, be);
-            pflash_update(pfl, offset, width);
+            if (!pfl->ro) {
+                pflash_data_write(pfl, offset, value, width, be);
+                pflash_update(pfl, offset, width);
+            } else {
+                pfl->status |= 0x10; /* Programming error */
+            }
             pfl->status |= 0x80; /* Ready! */
             pfl->wcycle = 0;
         break;
@@ -372,7 +380,11 @@ static void pflash_write(pflash_t *pfl, target_phys_addr_t offset,
     case 2:
         switch (pfl->cmd) {
         case 0xe8: /* Block write */
-            pflash_data_write(pfl, offset, value, width, be);
+            if (!pfl->ro) {
+                pflash_data_write(pfl, offset, value, width, be);
+            } else {
+                pfl->status |= 0x10; /* Programming error */
+            }
 
             pfl->status |= 0x80;
 
@@ -382,8 +394,12 @@ static void pflash_write(pflash_t *pfl, target_phys_addr_t offset,
 
                 DPRINTF("%s: block write finished\n", __func__);
                 pfl->wcycle++;
-                /* Flush the entire write buffer onto backing storage.  */
-                pflash_update(pfl, offset & mask, pfl->writeblock_size);
+                if (!pfl->ro) {
+                    /* Flush the entire write buffer onto backing storage.  */
+                    pflash_update(pfl, offset & mask, pfl->writeblock_size);
+                } else {
+                    pfl->status |= 0x10; /* Programming error */
+                }
             }
 
             pfl->counter--;
@@ -605,13 +621,13 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base,
         }
         bdrv_attach_dev_nofail(pfl->bs, pfl);
     }
-#if 0 /* XXX: there should be a bit to set up read-only,
-       *      the same way the hardware does (with WP pin).
-       */
-    pfl->ro = 1;
-#else
-    pfl->ro = 0;
-#endif
+
+    if (pfl->bs) {
+        pfl->ro = bdrv_is_read_only(pfl->bs);
+    } else {
+        pfl->ro = 0;
+    }
+
     pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl);
     pfl->base = base;
     pfl->sector_len = sector_len;
diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c
index e5a63da..9e91bdd 100644
--- a/hw/pflash_cfi02.c
+++ b/hw/pflash_cfi02.c
@@ -329,35 +329,37 @@ static void pflash_write (pflash_t *pfl, target_phys_addr_t offset,
             DPRINTF("%s: write data offset " TARGET_FMT_plx " %08x %d\n",
                     __func__, offset, value, width);
             p = pfl->storage;
-            switch (width) {
-            case 1:
-                p[offset] &= value;
-                pflash_update(pfl, offset, 1);
-                break;
-            case 2:
-                if (be) {
-                    p[offset] &= value >> 8;
-                    p[offset + 1] &= value;
-                } else {
+            if (!pfl->ro) {
+                switch (width) {
+                case 1:
                     p[offset] &= value;
-                    p[offset + 1] &= value >> 8;
+                    pflash_update(pfl, offset, 1);
+                    break;
+                case 2:
+                    if (be) {
+                        p[offset] &= value >> 8;
+                        p[offset + 1] &= value;
+                    } else {
+                        p[offset] &= value;
+                        p[offset + 1] &= value >> 8;
+                    }
+                    pflash_update(pfl, offset, 2);
+                    break;
+                case 4:
+                    if (be) {
+                        p[offset] &= value >> 24;
+                        p[offset + 1] &= value >> 16;
+                        p[offset + 2] &= value >> 8;
+                        p[offset + 3] &= value;
+                    } else {
+                        p[offset] &= value;
+                        p[offset + 1] &= value >> 8;
+                        p[offset + 2] &= value >> 16;
+                        p[offset + 3] &= value >> 24;
+                    }
+                    pflash_update(pfl, offset, 4);
+                    break;
                 }
-                pflash_update(pfl, offset, 2);
-                break;
-            case 4:
-                if (be) {
-                    p[offset] &= value >> 24;
-                    p[offset + 1] &= value >> 16;
-                    p[offset + 2] &= value >> 8;
-                    p[offset + 3] &= value;
-                } else {
-                    p[offset] &= value;
-                    p[offset + 1] &= value >> 8;
-                    p[offset + 2] &= value >> 16;
-                    p[offset + 3] &= value >> 24;
-                }
-                pflash_update(pfl, offset, 4);
-                break;
             }
             pfl->status = 0x00 | ~(value & 0x80);
             /* Let's pretend write is immediate */
@@ -403,9 +405,11 @@ static void pflash_write (pflash_t *pfl, target_phys_addr_t offset,
             }
             /* Chip erase */
             DPRINTF("%s: start chip erase\n", __func__);
-            memset(pfl->storage, 0xFF, pfl->chip_len);
+            if (!pfl->ro) {
+                memset(pfl->storage, 0xFF, pfl->chip_len);
+                pflash_update(pfl, 0, pfl->chip_len);
+            }
             pfl->status = 0x00;
-            pflash_update(pfl, 0, pfl->chip_len);
             /* Let's wait 5 seconds before chip erase is done */
             qemu_mod_timer(pfl->timer,
                            qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() * 5));
@@ -416,8 +420,10 @@ static void pflash_write (pflash_t *pfl, target_phys_addr_t offset,
             offset &= ~(pfl->sector_len - 1);
             DPRINTF("%s: start sector erase at " TARGET_FMT_plx "\n", __func__,
                     offset);
-            memset(p + offset, 0xFF, pfl->sector_len);
-            pflash_update(pfl, offset, pfl->sector_len);
+            if (!pfl->ro) {
+                memset(p + offset, 0xFF, pfl->sector_len);
+                pflash_update(pfl, offset, pfl->sector_len);
+            }
             pfl->status = 0x00;
             /* Let's wait 1/2 second before sector erase is done */
             qemu_mod_timer(pfl->timer,
@@ -643,16 +649,17 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base,
         }
         bdrv_attach_dev_nofail(pfl->bs, pfl);
     }
+
     pflash_setup_mappings(pfl);
     pfl->rom_mode = 1;
     memory_region_add_subregion(get_system_memory(), pfl->base, &pfl->mem);
-#if 0 /* XXX: there should be a bit to set up read-only,
-       *      the same way the hardware does (with WP pin).
-       */
-    pfl->ro = 1;
-#else
-    pfl->ro = 0;
-#endif
+
+    if (pfl->bs) {
+        pfl->ro = bdrv_is_read_only(pfl->bs);
+    } else {
+        pfl->ro = 0;
+    }
+
     pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl);
     pfl->sector_len = sector_len;
     pfl->width = width;
-- 
1.7.1

[Qemu-devel] [PATCH v8 2/2] pc: Support system flash memory with pflash

[Jordan Justen]

If a pflash image is found, then it is used for the system
firmware image.

If a pflash image is not initially found, then a read-only
pflash device is created using the -bios filename.

KVM cannot execute from a pflash region currently.
Therefore, when KVM is enabled, a (read-only) ram memory
region is created and filled with the contents of the
pflash drive.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Anthony Liguori <aliguori@us.ibm.com>
---
 Makefile.target                    |    1 +
 default-configs/i386-softmmu.mak   |    1 +
 default-configs/x86_64-softmmu.mak |    1 +
 hw/boards.h                        |    1 +
 hw/pc.c                            |   55 +---------
 hw/pc.h                            |    3 +
 hw/pc_sysfw.c                      |  194 ++++++++++++++++++++++++++++++++++++
 vl.c                               |    2 +-
 8 files changed, 207 insertions(+), 51 deletions(-)
 create mode 100644 hw/pc_sysfw.c

diff --git a/Makefile.target b/Makefile.target
index a111521..b1dc882 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -236,6 +236,7 @@ obj-i386-y += vmport.o
 obj-i386-y += device-hotplug.o pci-hotplug.o smbios.o wdt_ib700.o
 obj-i386-y += debugcon.o multiboot.o
 obj-i386-y += pc_piix.o
+obj-i386-y += pc_sysfw.o
 obj-i386-$(CONFIG_KVM) += kvmclock.o
 obj-i386-$(CONFIG_SPICE) += qxl.o qxl-logger.o qxl-render.o
 
diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak
index e67ebb3..cd407a9 100644
--- a/default-configs/i386-softmmu.mak
+++ b/default-configs/i386-softmmu.mak
@@ -22,3 +22,4 @@ CONFIG_SOUND=y
 CONFIG_HPET=y
 CONFIG_APPLESMC=y
 CONFIG_I8259=y
+CONFIG_PFLASH_CFI01=y
diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-softmmu.mak
index b75757e..47734ea 100644
--- a/default-configs/x86_64-softmmu.mak
+++ b/default-configs/x86_64-softmmu.mak
@@ -22,3 +22,4 @@ CONFIG_SOUND=y
 CONFIG_HPET=y
 CONFIG_APPLESMC=y
 CONFIG_I8259=y
+CONFIG_PFLASH_CFI01=y
diff --git a/hw/boards.h b/hw/boards.h
index 716fd7b..45a31a1 100644
--- a/hw/boards.h
+++ b/hw/boards.h
@@ -33,6 +33,7 @@ typedef struct QEMUMachine {
 } QEMUMachine;
 
 int qemu_register_machine(QEMUMachine *m);
+QEMUMachine *find_default_machine(void);
 
 extern QEMUMachine *current_machine;
 
diff --git a/hw/pc.c b/hw/pc.c
index 33778fe..267da44 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -57,10 +57,6 @@
 #define DPRINTF(fmt, ...)
 #endif
 
-#define BIOS_FILENAME "bios.bin"
-
-#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
-
 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
 #define ACPI_DATA_SIZE       0x10000
 #define BIOS_CFG_IOPORT 0x510
@@ -973,11 +969,9 @@ void pc_memory_init(MemoryRegion *system_memory,
                     MemoryRegion *rom_memory,
                     MemoryRegion **ram_memory)
 {
-    char *filename;
-    int ret, linux_boot, i;
-    MemoryRegion *ram, *bios, *isa_bios, *option_rom_mr;
+    int linux_boot, i;
+    MemoryRegion *ram, *option_rom_mr;
     MemoryRegion *ram_below_4g, *ram_above_4g;
-    int bios_size, isa_bios_size;
     void *fw_cfg;
 
     linux_boot = (kernel_filename != NULL);
@@ -1002,43 +996,9 @@ void pc_memory_init(MemoryRegion *system_memory,
                                     ram_above_4g);
     }
 
-    /* BIOS load */
-    if (bios_name == NULL)
-        bios_name = BIOS_FILENAME;
-    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
-    if (filename) {
-        bios_size = get_image_size(filename);
-    } else {
-        bios_size = -1;
-    }
-    if (bios_size <= 0 ||
-        (bios_size % 65536) != 0) {
-        goto bios_error;
-    }
-    bios = g_malloc(sizeof(*bios));
-    memory_region_init_ram(bios, NULL, "pc.bios", bios_size);
-    memory_region_set_readonly(bios, true);
-    ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size), -1);
-    if (ret != 0) {
-    bios_error:
-        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
-        exit(1);
-    }
-    if (filename) {
-        g_free(filename);
-    }
-    /* map the last 128KB of the BIOS in ISA space */
-    isa_bios_size = bios_size;
-    if (isa_bios_size > (128 * 1024))
-        isa_bios_size = 128 * 1024;
-    isa_bios = g_malloc(sizeof(*isa_bios));
-    memory_region_init_alias(isa_bios, "isa-bios", bios,
-                             bios_size - isa_bios_size, isa_bios_size);
-    memory_region_add_subregion_overlap(rom_memory,
-                                        0x100000 - isa_bios_size,
-                                        isa_bios,
-                                        1);
-    memory_region_set_readonly(isa_bios, true);
+
+    /* Initialize ROM or flash ranges for PC firmware */
+    pc_system_firmware_init(rom_memory);
 
     option_rom_mr = g_malloc(sizeof(*option_rom_mr));
     memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE);
@@ -1047,11 +1007,6 @@ void pc_memory_init(MemoryRegion *system_memory,
                                         option_rom_mr,
                                         1);
 
-    /* map all the bios at the top of memory */
-    memory_region_add_subregion(rom_memory,
-                                (uint32_t)(-bios_size),
-                                bios);
-
     fw_cfg = bochs_bios_init();
     rom_set_fw(fw_cfg);
 
diff --git a/hw/pc.h b/hw/pc.h
index 4515006..6a03f00 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -244,6 +244,9 @@ static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
     return true;
 }
 
+/* pc_sysfw.c */
+void pc_system_firmware_init(MemoryRegion *rom_memory);
+
 /* e820 types */
 #define E820_RAM        1
 #define E820_RESERVED   2
diff --git a/hw/pc_sysfw.c b/hw/pc_sysfw.c
new file mode 100644
index 0000000..028fa4d
--- /dev/null
+++ b/hw/pc_sysfw.c
@@ -0,0 +1,194 @@
+/*
+ * QEMU PC System Firmware
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ * Copyright (c) 2011 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "hw.h"
+#include "pc.h"
+#include "hw/boards.h"
+#include "loader.h"
+#include "sysemu.h"
+#include "flash.h"
+#include "kvm.h"
+
+#define BIOS_FILENAME "bios.bin"
+
+static void pc_isa_bios_init(MemoryRegion *rom_memory,
+                             MemoryRegion *flash_mem,
+                             int ram_size)
+{
+    int isa_bios_size;
+    MemoryRegion *isa_bios;
+    uint64_t flash_size;
+    void *flash_ptr, *isa_bios_ptr;
+
+    flash_size = memory_region_size(flash_mem);
+
+    /* map the last 128KB of the BIOS in ISA space */
+    isa_bios_size = flash_size;
+    if (isa_bios_size > (128 * 1024)) {
+        isa_bios_size = 128 * 1024;
+    }
+    isa_bios = g_malloc(sizeof(*isa_bios));
+    memory_region_init_ram(isa_bios, NULL, "isa-bios", isa_bios_size);
+    memory_region_add_subregion_overlap(rom_memory,
+                                        0x100000 - isa_bios_size,
+                                        isa_bios,
+                                        1);
+
+    /* copy ISA rom image from top of flash memory */
+    flash_ptr = memory_region_get_ram_ptr(flash_mem);
+    isa_bios_ptr = memory_region_get_ram_ptr(isa_bios);
+    memcpy(isa_bios_ptr,
+           ((uint8_t*)flash_ptr) + (flash_size - isa_bios_size),
+           isa_bios_size);
+
+    memory_region_set_readonly(isa_bios, true);
+}
+
+static void pc_fw_add_pflash_drv(void)
+{
+    QemuOpts *opts;
+    QEMUMachine *machine;
+    char *filename;
+
+    if (bios_name == NULL) {
+        bios_name = BIOS_FILENAME;
+    }
+    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+
+    opts = drive_add(IF_PFLASH, -1, filename, "readonly=on");
+    if (opts == NULL) {
+      return;
+    }
+
+    machine = find_default_machine();
+    if (machine == NULL) {
+      return;
+    }
+
+    drive_init(opts, machine->use_scsi);
+}
+
+static void pc_system_flash_init(MemoryRegion *rom_memory,
+                                 DriveInfo *pflash_drv)
+{
+    BlockDriverState *bdrv;
+    int64_t size;
+    target_phys_addr_t phys_addr;
+    int sector_bits, sector_size;
+    pflash_t *system_flash;
+    MemoryRegion *flash_mem;
+
+    bdrv = pflash_drv->bdrv;
+    size = bdrv_getlength(pflash_drv->bdrv);
+    sector_bits = 12;
+    sector_size = 1 << sector_bits;
+
+    if ((size % sector_size) != 0) {
+        fprintf(stderr,
+                "qemu: PC system firmware (pflash) must be a multiple of 0x%x\n",
+                sector_size);
+        exit(1);
+    }
+
+    phys_addr = 0x100000000ULL - size;
+    system_flash = pflash_cfi01_register(phys_addr, NULL, "system.flash", size,
+                                         bdrv, sector_size, size >> sector_bits,
+                                         1, 0x0000, 0x0000, 0x0000, 0x0000, 0);
+    flash_mem = pflash_cfi01_get_memory(system_flash);
+
+    pc_isa_bios_init(rom_memory, flash_mem, size);
+}
+
+static void pc_system_rom_init(MemoryRegion *rom_memory,
+                               DriveInfo *pflash_drv)
+{
+    BlockDriverState *bdrv;
+    int64_t size;
+    target_phys_addr_t phys_addr;
+    int sector_bits, sector_size;
+    MemoryRegion *sys_rom;
+    void *buffer;
+    int ret;
+
+    bdrv = pflash_drv->bdrv;
+    size = bdrv_getlength(pflash_drv->bdrv);
+    sector_bits = 9;
+    sector_size = 1 << sector_bits;
+
+    if ((size % sector_size) != 0) {
+        fprintf(stderr,
+                "qemu: PC system rom (pflash) must be a multiple of 0x%x\n",
+                sector_size);
+        exit(1);
+    }
+
+    phys_addr = 0x100000000ULL - size;
+    sys_rom = g_malloc(sizeof(*sys_rom));
+    memory_region_init_ram(sys_rom, NULL, "system.rom", size);
+    buffer = memory_region_get_ram_ptr(sys_rom);
+    memory_region_add_subregion(rom_memory, phys_addr, sys_rom);
+
+    /* read the rom content */
+    ret = bdrv_read(bdrv, 0, buffer, size >> sector_bits);
+    if (ret < 0) {
+        memory_region_destroy(sys_rom);
+        g_free(sys_rom);
+        fprintf(stderr,
+                "qemu: Failed to read rom image from pflash drive\n");
+        exit(1);
+    }
+
+    memory_region_set_readonly(sys_rom, true);
+
+    pc_isa_bios_init(rom_memory, sys_rom, size);
+}
+
+void pc_system_firmware_init(MemoryRegion *rom_memory)
+{
+    int flash_present;
+    DriveInfo *pflash_drv;
+
+    pflash_drv = drive_get(IF_PFLASH, 0, 0);
+    flash_present = (pflash_drv != NULL);
+
+    if (!flash_present) {
+        pc_fw_add_pflash_drv();
+        pflash_drv = drive_get(IF_PFLASH, 0, 0);
+        flash_present = (pflash_drv != NULL);
+    }
+
+    if (!flash_present) {
+        fprintf(stderr, "qemu: PC system firmware (pflash) not available\n");
+        exit(1);
+    }
+
+    if (!kvm_enabled()) {
+        pc_system_flash_init(rom_memory, pflash_drv);
+    } else {
+        pc_system_rom_init(rom_memory, pflash_drv);
+    }
+}
+
+
diff --git a/vl.c b/vl.c
index f5afed4..5cfe5c6 100644
--- a/vl.c
+++ b/vl.c
@@ -1186,7 +1186,7 @@ static QEMUMachine *find_machine(const char *name)
     return NULL;
 }
 
-static QEMUMachine *find_default_machine(void)
+QEMUMachine *find_default_machine(void)
 {
     QEMUMachine *m;
 
-- 
1.7.1

Re: [Qemu-devel] [PATCH v8 0/2] PC system flash support

[Avi Kivity]

On 11/28/2011 04:26 AM, Jordan Justen wrote:
> Enable flash emulation in a PC system using pflash_cfi01.
>
>

The new memory layout should be made conditional on the machine type (-M
pc-1.1 or later) to allow migration from/to pc-1.0 and earlier.

Memory layout in this context are the names of memory ranges given to
memory_region_init_ram(), sizes, and locations.  Also, the flash
interface should not be there for older machines.

-- 
error compiling committee.c: too many arguments to function

Re: [Qemu-devel] [PATCH v8 0/2] PC system flash support

[Jordan Justen]

On Mon, Nov 28, 2011 at 02:28, Avi Kivity <avi@redhat.com> wrote:
> On 11/28/2011 04:26 AM, Jordan Justen wrote:
>> Enable flash emulation in a PC system using pflash_cfi01.
>
> The new memory layout should be made conditional on the machine type (-M
> pc-1.1 or later) to allow migration from/to pc-1.0 and earlier.
>
> Memory layout in this context are the names of memory ranges given to
> memory_region_init_ram(), sizes, and locations.  Also, the flash
> interface should not be there for older machines.

Is this the right way to go about it?
1. Create a new pc-sysfw qdev
2. Use a flash property in pc_piix.c to selectively enable the flash

Or, is there an easier or better way to say pc > pc-1.0?

How do I enable "migration from/to pc-1.0 and earlier"?  It seems like
some code will need to shuttle the data (rom <=> pflash).  Can you
point me an an example?

Thanks,

-Jordan

Re: [Qemu-devel] [PATCH v8 0/2] PC system flash support

[Avi Kivity]

On 11/29/2011 09:03 AM, Jordan Justen wrote:
> On Mon, Nov 28, 2011 at 02:28, Avi Kivity <avi@redhat.com> wrote:
> > On 11/28/2011 04:26 AM, Jordan Justen wrote:
> >> Enable flash emulation in a PC system using pflash_cfi01.
> >
> > The new memory layout should be made conditional on the machine type (-M
> > pc-1.1 or later) to allow migration from/to pc-1.0 and earlier.
> >
> > Memory layout in this context are the names of memory ranges given to
> > memory_region_init_ram(), sizes, and locations.  Also, the flash
> > interface should not be there for older machines.
>
> Is this the right way to go about it?
> 1. Create a new pc-sysfw qdev
> 2. Use a flash property in pc_piix.c to selectively enable the flash
>
> Or, is there an easier or better way to say pc > pc-1.0?

No idea, copying some qdev people.

> How do I enable "migration from/to pc-1.0 and earlier"?  It seems like
> some code will need to shuttle the data (rom <=> pflash).  Can you
> point me an an example?

It should be completely transparent, so long as you instantiate a ROM
for <= pc-1.0 (say based on a property) and flash for >= pc-1.1.

One way to verify is to to 'info qdev' and 'info mtree' with qemu-1.0
and qemu-1.1 -M pc-1.0, and see that you get the same results.

-- 
error compiling committee.c: too many arguments to function

Re: [Qemu-devel] [PATCH v8 0/2] PC system flash support

[Jordan Justen]

On Tue, Nov 29, 2011 at 01:38, Avi Kivity <avi@redhat.com> wrote:
> On 11/29/2011 09:03 AM, Jordan Justen wrote:
>> On Mon, Nov 28, 2011 at 02:28, Avi Kivity <avi@redhat.com> wrote:
>> > On 11/28/2011 04:26 AM, Jordan Justen wrote:
>> >> Enable flash emulation in a PC system using pflash_cfi01.
>> >
>> > The new memory layout should be made conditional on the machine type (-M
>> > pc-1.1 or later) to allow migration from/to pc-1.0 and earlier.
>> >
>> > Memory layout in this context are the names of memory ranges given to
>> > memory_region_init_ram(), sizes, and locations.  Also, the flash
>> > interface should not be there for older machines.
>>
>> Is this the right way to go about it?
>> 1. Create a new pc-sysfw qdev
>> 2. Use a flash property in pc_piix.c to selectively enable the flash
>>
>> Or, is there an easier or better way to say pc > pc-1.0?
>
> No idea, copying some qdev people.
>
>> How do I enable "migration from/to pc-1.0 and earlier"?  It seems like
>> some code will need to shuttle the data (rom <=> pflash).  Can you
>> point me an an example?
>
> It should be completely transparent, so long as you instantiate a ROM
> for <= pc-1.0 (say based on a property) and flash for >= pc-1.1.
>
> One way to verify is to to 'info qdev' and 'info mtree' with qemu-1.0
> and qemu-1.1 -M pc-1.0, and see that you get the same results.

I think this means that I cannot add a pc-sysfw qdev for pc-1.0.
(Even if the rom memory usage matches pc-1.0.)  Is that right?

If so, the plan I mentioned above would not work.  In the plan above,
a property of the pc-sysfw qdev would have determined if the old rom
method would be used, or the newer flash method would be used.

Thanks,

-Jordan

Re: [Qemu-devel] [PATCH v8 0/2] PC system flash support

[Markus Armbruster]

Avi Kivity <avi@redhat.com> writes:

> On 11/29/2011 09:03 AM, Jordan Justen wrote:
>> On Mon, Nov 28, 2011 at 02:28, Avi Kivity <avi@redhat.com> wrote:
>> > On 11/28/2011 04:26 AM, Jordan Justen wrote:
>> >> Enable flash emulation in a PC system using pflash_cfi01.
>> >
>> > The new memory layout should be made conditional on the machine type (-M
>> > pc-1.1 or later) to allow migration from/to pc-1.0 and earlier.
>> >
>> > Memory layout in this context are the names of memory ranges given to
>> > memory_region_init_ram(), sizes, and locations.  Also, the flash
>> > interface should not be there for older machines.
>>
>> Is this the right way to go about it?
>> 1. Create a new pc-sysfw qdev
>> 2. Use a flash property in pc_piix.c to selectively enable the flash
>>
>> Or, is there an easier or better way to say pc > pc-1.0?
>
> No idea, copying some qdev people.
>
>> How do I enable "migration from/to pc-1.0 and earlier"?  It seems like
>> some code will need to shuttle the data (rom <=> pflash).  Can you
>> point me an an example?
>
> It should be completely transparent, so long as you instantiate a ROM
> for <= pc-1.0 (say based on a property) and flash for >= pc-1.1.
>
> One way to verify is to to 'info qdev' and 'info mtree' with qemu-1.0
> and qemu-1.1 -M pc-1.0, and see that you get the same results.

Gerd created the compatibility machinery (commit b6b61144), and I'm not
really familiar with it.  But I can give it a try.

Our tool to configure devices is qdev properties.

The device defines property default values.  The board can override
them, with QEMUMachine member compat_props.

For examples, peruse git-log -Scompat_props.  Random pick with [my
explanations in brackets]:

commit b1aeb92666d2fde413c34578b3b42bbfe5f2a506
Author: Isaku Yamahata <yamahata@valinux.co.jp>
Date:   Fri Nov 26 21:01:41 2010 +0900

    pci: make command SERR bit writable
    
    pcie aer needs SERR bit to be writable, and the PCI spec requires
    this as well.  For compatibility, introduce compat global property
    command_serr_enable and make this bit readonly for a pre 0.14 pc
    machine.
    
    Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
    Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

[Patch hunks reordered to make the patch easier to follow]
diff --git a/hw/pci.c b/hw/pci.c
index 0c15b13..ca878e8 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -57,6 +57,8 @@ struct BusInfo pci_bus_info = {
[Define a property to make the incompatible change configurable.  Store
in PCIDevice member cap_present bit QEMU_PCI_CAP_SERR_BITNR, default is
true.]
         DEFINE_PROP_UINT32("rombar",  PCIDevice, rom_bar, 1),
         DEFINE_PROP_BIT("multifunction", PCIDevice, cap_present,
                         QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false),
+        DEFINE_PROP_BIT("command_serr_enable", PCIDevice, cap_present,
+                        QEMU_PCI_CAP_SERR_BITNR, true),
         DEFINE_PROP_END_OF_LIST()
     }
 };
diff --git a/hw/pci.h b/hw/pci.h
index 89f7b76..099c251 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -118,6 +118,10 @@ enum {
[Since we use a new bit of the existing cap_present, we don't have
to define a new member.  Instead we need to define the new bit:]
     /* multifunction capable device */
 #define QEMU_PCI_CAP_MULTIFUNCTION_BITNR        3
     QEMU_PCI_CAP_MULTIFUNCTION = (1 << QEMU_PCI_CAP_MULTIFUNCTION_BITNR),
+
+    /* command register SERR bit enabled */
+#define QEMU_PCI_CAP_SERR_BITNR 4
+    QEMU_PCI_CAP_SERR = (1 << QEMU_PCI_CAP_SERR_BITNR),
 };
 
 struct PCIDevice {
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index 7d29d43..a2fb554 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
[Change default to off for pc-0.13 and all the older machine types.]
@@ -217,6 +217,14 @@ static QEMUMachine pc_machine = {
     .desc = "Standard PC",
     .init = pc_init_pci,
     .max_cpus = 255,
+    .compat_props = (GlobalProperty[]) {
+        {
+            .driver   = "PCI",
+            .property = "command_serr_enable",
+            .value    = "off",
+        },
+        { /* end of list */ }
+    },
     .is_default = 1,
 };

@@ -265,6 +273,10 @@ static QEMUMachine pc_machine_v0_12 = {
             .driver   = "vmware-svga",
             .property = "rombar",
             .value    = stringify(0),
+        },{
+            .driver   = "PCI",
+            .property = "command_serr_enable",
+            .value    = "off",
         },
         { /* end of list */ }
     }
@@ -300,6 +312,10 @@ static QEMUMachine pc_machine_v0_11 = {
             .driver   = "PCI",
             .property = "rombar",
             .value    = stringify(0),
+        },{
+            .driver   = "PCI",
+            .property = "command_serr_enable",
+            .value    = "off",
         },
         { /* end of list */ }
     }
@@ -347,6 +363,10 @@ static QEMUMachine pc_machine_v0_10 = {
             .driver   = "PCI",
             .property = "rombar",
             .value    = stringify(0),
+        },{
+            .driver   = "PCI",
+            .property = "command_serr_enable",
+            .value    = "off",
         },
         { /* end of list */ }
     },
@@ -568,6 +570,9 @@ static void pci_init_wmask(PCIDevice *dev)
[Compatible behavior when QEMU_PCI_CAP_SERR_BITNR is off:]
     pci_set_word(dev->wmask + PCI_COMMAND,
                  PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
                  PCI_COMMAND_INTX_DISABLE);
+    if (dev->cap_present & QEMU_PCI_CAP_SERR) {
+        pci_word_test_and_set_mask(dev->wmask + PCI_COMMAND, PCI_COMMAND_SERR);
+    }
 
     memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff,
            config_size - PCI_CONFIG_HEADER_SIZE);

Re: [Qemu-devel] [PATCH v8 0/2] PC system flash support

[Markus Armbruster]

Markus Armbruster <armbru@redhat.com> writes:

> Avi Kivity <avi@redhat.com> writes:
>
>> On 11/29/2011 09:03 AM, Jordan Justen wrote:
>>> On Mon, Nov 28, 2011 at 02:28, Avi Kivity <avi@redhat.com> wrote:
>>> > On 11/28/2011 04:26 AM, Jordan Justen wrote:
>>> >> Enable flash emulation in a PC system using pflash_cfi01.
>>> >
>>> > The new memory layout should be made conditional on the machine type (-M
>>> > pc-1.1 or later) to allow migration from/to pc-1.0 and earlier.
>>> >
>>> > Memory layout in this context are the names of memory ranges given to
>>> > memory_region_init_ram(), sizes, and locations.  Also, the flash
>>> > interface should not be there for older machines.
>>>
>>> Is this the right way to go about it?
>>> 1. Create a new pc-sysfw qdev
>>> 2. Use a flash property in pc_piix.c to selectively enable the flash
>>>
>>> Or, is there an easier or better way to say pc > pc-1.0?
>>
>> No idea, copying some qdev people.
>>
>>> How do I enable "migration from/to pc-1.0 and earlier"?  It seems like
>>> some code will need to shuttle the data (rom <=> pflash).  Can you
>>> point me an an example?
>>
>> It should be completely transparent, so long as you instantiate a ROM
>> for <= pc-1.0 (say based on a property) and flash for >= pc-1.1.
>>
>> One way to verify is to to 'info qdev' and 'info mtree' with qemu-1.0
>> and qemu-1.1 -M pc-1.0, and see that you get the same results.
>
> Gerd created the compatibility machinery (commit b6b61144), and I'm not
> really familiar with it.  But I can give it a try.
>
> Our tool to configure devices is qdev properties.
>
> The device defines property default values.  The board can override
> them, with QEMUMachine member compat_props.

If you need more than just configuring a device differently, you
probably need to hack the board init method.  Check out commit 0ec329da
for an example.  Works roughly like this:

* Add suitable parameter to pc_init1()

* Change pc_init_pci() to pass the "new behavior on" argument.

* Define pc_init_pci_no_kvmclock() like pc_init_pci(), except pass the
  "new behavior off" argument.  Change old boards to use it.

[...]

Re: [Qemu-devel] [PATCH v8 0/2] PC system flash support

[Avi Kivity]

On 11/29/2011 10:51 PM, Jordan Justen wrote:
> > One way to verify is to to 'info qdev' and 'info mtree' with qemu-1.0
> > and qemu-1.1 -M pc-1.0, and see that you get the same results.
>
> I think this means that I cannot add a pc-sysfw qdev for pc-1.0.
> (Even if the rom memory usage matches pc-1.0.)  Is that right?

Yes.

> If so, the plan I mentioned above would not work.  In the plan above,
> a property of the pc-sysfw qdev would have determined if the old rom
> method would be used, or the newer flash method would be used.

Okay.  It needs to be a machine/global property then.

-- 
error compiling committee.c: too many arguments to function