From: Mark Langsdorf <mark.langsdorf@calxeda.com>
To: qemu-devel@nongnu.org, peter.maydell@linaro.orgpeter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH 3/9] arm: add missing v7 cp15 registers
Date: Tue, 20 Dec 2011 13:10:45 -0600 [thread overview]
Message-ID: <4EF0DDB5.9040806@calxeda.com> (raw)
From: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Conflicts:
target-arm/cpu.h
target-arm/helper.c
---
target-arm/cpu.h | 1 +
target-arm/helper.c | 7 +++++++
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 129edbb..b89c085 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -152,6 +152,7 @@ typedef struct CPUARMState {
uint32_t c15_i_max; /* Maximum D-cache dirty line index. */
uint32_t c15_i_min; /* Minimum D-cache dirty line index. */
uint32_t c15_threadid; /* TI debugger thread-ID. */
+ uint32_t c15_scubase; /* SCU base address. */
} cp15;
struct {
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 816c4c4..37110bc 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2197,6 +2197,13 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t
insn)
* 0x200 << ($rn & 0xfff), when MMU is off. */
goto bad_reg;
}
+ if (ARM_CPUID(env) == ARM_CPUID_CORTEXA9) {
+ switch (crm) {
+ case 0:
+ return env->cp15.c15_scubase;
+ }
+ goto bad_reg;
+ }
return 0;
}
bad_reg:
--
1.7.5.4
next reply other threads:[~2011-12-20 19:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-20 19:10 Mark Langsdorf [this message]
2011-12-20 19:48 ` [Qemu-devel] [PATCH 3/9] arm: add missing v7 cp15 registers Peter Maydell
2011-12-21 16:37 ` Mark Langsdorf
2011-12-21 21:10 ` Peter Maydell
2011-12-22 10:14 ` Avi Kivity
2011-12-22 12:37 ` Peter Maydell
2011-12-22 12:43 ` Avi Kivity
2011-12-22 14:25 ` Anthony Liguori
2011-12-22 15:26 ` Peter Maydell
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