* [Qemu-devel] [PATCH 5/9] ahci: convert ahci_reset to use AHCIState
@ 2011-12-20 19:12 Mark Langsdorf
0 siblings, 0 replies; 3+ messages in thread
From: Mark Langsdorf @ 2011-12-20 19:12 UTC (permalink / raw)
To: qemu-devel, kwolf
From: Rob Herring <rob.herring@calxeda.com>
Use AHCIState instead of AHCIPCIState so the function can be used for
non-PCI based AHCI controllers.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
---
hw/ide/ahci.c | 14 +++++++-------
hw/ide/ich.c | 4 ++--
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 0af201d..135d0ee 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -336,7 +336,7 @@ static void ahci_mem_write(void *opaque,
target_phys_addr_t addr,
case HOST_CTL: /* R/W */
if (val & HOST_CTL_RESET) {
DPRINTF(-1, "HBA Reset\n");
- ahci_reset(container_of(s, AHCIPCIState, ahci));
+ ahci_reset(s);
} else {
s->control_regs.ghc = (val & 0x3) | HOST_CTL_AHCI_EN;
ahci_check_irq(s);
@@ -1199,18 +1199,18 @@ void ahci_uninit(AHCIState *s)
void ahci_reset(void *opaque)
{
- struct AHCIPCIState *d = opaque;
+ struct AHCIState *s = opaque;
AHCIPortRegs *pr;
int i;
- d->ahci.control_regs.irqstatus = 0;
- d->ahci.control_regs.ghc = 0;
+ s->control_regs.irqstatus = 0;
+ s->control_regs.ghc = 0;
- for (i = 0; i < d->ahci.ports; i++) {
- pr = &d->ahci.dev[i].port_regs;
+ for (i = 0; i < s->ports; i++) {
+ pr = &s->dev[i].port_regs;
pr->irq_stat = 0;
pr->irq_mask = 0;
pr->scr_ctl = 0;
- ahci_reset_port(&d->ahci, i);
+ ahci_reset_port(s, i);
}
}
diff --git a/hw/ide/ich.c b/hw/ide/ich.c
index 3f7510f..44363ec 100644
--- a/hw/ide/ich.c
+++ b/hw/ide/ich.c
@@ -102,7 +102,7 @@ static int pci_ich9_ahci_init(PCIDevice *dev)
/* XXX Software should program this register */
d->card.config[0x90] = 1 << 6; /* Address Map Register - AHCI
mode */
- qemu_register_reset(ahci_reset, d);
+ qemu_register_reset(ahci_reset, &d->ahci);
msi_init(dev, 0x50, 1, true, false);
d->ahci.irq = d->card.irq[0];
@@ -133,7 +133,7 @@ static int pci_ich9_uninit(PCIDevice *dev)
d = DO_UPCAST(struct AHCIPCIState, card, dev);
msi_uninit(dev);
- qemu_unregister_reset(ahci_reset, d);
+ qemu_unregister_reset(ahci_reset, &d->ahci);
ahci_uninit(&d->ahci);
return 0;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [Qemu-devel] [PATCH 5/9] ahci: convert ahci_reset to use AHCIState
2011-12-22 18:20 [Qemu-devel] [PATCH v2 0/9] various ARM fixes Mark Langsdorf
@ 2011-12-22 18:20 ` Mark Langsdorf
2011-12-24 0:35 ` Peter Maydell
0 siblings, 1 reply; 3+ messages in thread
From: Mark Langsdorf @ 2011-12-22 18:20 UTC (permalink / raw)
To: qemu-devel; +Cc: kwolf, peter.maydell, Rob Herring, paul, Mark Langsdorf
From: Rob Herring <rob.herring@calxeda.com>
Use AHCIState instead of AHCIPCIState so the function can be used for
non-PCI based AHCI controllers.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
---
hw/ide/ahci.c | 14 +++++++-------
hw/ide/ich.c | 4 ++--
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 0af201d..135d0ee 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -336,7 +336,7 @@ static void ahci_mem_write(void *opaque, target_phys_addr_t addr,
case HOST_CTL: /* R/W */
if (val & HOST_CTL_RESET) {
DPRINTF(-1, "HBA Reset\n");
- ahci_reset(container_of(s, AHCIPCIState, ahci));
+ ahci_reset(s);
} else {
s->control_regs.ghc = (val & 0x3) | HOST_CTL_AHCI_EN;
ahci_check_irq(s);
@@ -1199,18 +1199,18 @@ void ahci_uninit(AHCIState *s)
void ahci_reset(void *opaque)
{
- struct AHCIPCIState *d = opaque;
+ struct AHCIState *s = opaque;
AHCIPortRegs *pr;
int i;
- d->ahci.control_regs.irqstatus = 0;
- d->ahci.control_regs.ghc = 0;
+ s->control_regs.irqstatus = 0;
+ s->control_regs.ghc = 0;
- for (i = 0; i < d->ahci.ports; i++) {
- pr = &d->ahci.dev[i].port_regs;
+ for (i = 0; i < s->ports; i++) {
+ pr = &s->dev[i].port_regs;
pr->irq_stat = 0;
pr->irq_mask = 0;
pr->scr_ctl = 0;
- ahci_reset_port(&d->ahci, i);
+ ahci_reset_port(s, i);
}
}
diff --git a/hw/ide/ich.c b/hw/ide/ich.c
index 3f7510f..44363ec 100644
--- a/hw/ide/ich.c
+++ b/hw/ide/ich.c
@@ -102,7 +102,7 @@ static int pci_ich9_ahci_init(PCIDevice *dev)
/* XXX Software should program this register */
d->card.config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */
- qemu_register_reset(ahci_reset, d);
+ qemu_register_reset(ahci_reset, &d->ahci);
msi_init(dev, 0x50, 1, true, false);
d->ahci.irq = d->card.irq[0];
@@ -133,7 +133,7 @@ static int pci_ich9_uninit(PCIDevice *dev)
d = DO_UPCAST(struct AHCIPCIState, card, dev);
msi_uninit(dev);
- qemu_unregister_reset(ahci_reset, d);
+ qemu_unregister_reset(ahci_reset, &d->ahci);
ahci_uninit(&d->ahci);
return 0;
--
1.7.5.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH 5/9] ahci: convert ahci_reset to use AHCIState
2011-12-22 18:20 ` [Qemu-devel] [PATCH 5/9] ahci: convert ahci_reset to use AHCIState Mark Langsdorf
@ 2011-12-24 0:35 ` Peter Maydell
0 siblings, 0 replies; 3+ messages in thread
From: Peter Maydell @ 2011-12-24 0:35 UTC (permalink / raw)
To: Mark Langsdorf; +Cc: kwolf, qemu-devel, Rob Herring, paul
On 22 December 2011 18:20, Mark Langsdorf <mark.langsdorf@calxeda.com> wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> Use AHCIState instead of AHCIPCIState so the function can be used for
> non-PCI based AHCI controllers.
Just a note that I'm assuming Kevin will review the IDE
related patches.
-- PMM
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2011-12-24 0:35 UTC | newest]
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