From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:33793) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rd5A8-0002W1-UJ for qemu-devel@nongnu.org; Tue, 20 Dec 2011 14:15:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rd5A3-0007LT-4h for qemu-devel@nongnu.org; Tue, 20 Dec 2011 14:15:44 -0500 Received: from smtp191.dfw.emailsrvr.com ([67.192.241.191]:49389) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rd5A2-0007LN-WE for qemu-devel@nongnu.org; Tue, 20 Dec 2011 14:15:39 -0500 Message-ID: <4EF0DEDC.6060209@calxeda.com> Date: Tue, 20 Dec 2011 13:15:40 -0600 From: Mark Langsdorf MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 9/9] arm: Set frequencies for arm_timer List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org, paul@codesourcery.com Use qdev properties to allow board modelers to set the frequencies for the sp804 timer. Each of the sp804's timers can have an individual frequency or they share the frequency by default. The timers default to 1MHz. Signed-off-by: Mark Langsdorf --- hw/arm_timer.c | 36 +++++++++++++++++++++++++++++++----- 1 files changed, 31 insertions(+), 5 deletions(-) diff --git a/hw/arm_timer.c b/hw/arm_timer.c index 0a5b9d2..4cafa1f 100644 --- a/hw/arm_timer.c +++ b/hw/arm_timer.c @@ -9,6 +9,8 @@ #include "sysbus.h" #include "qemu-timer.h" +#include "qemu-common.h" +#include "qdev.h" /* Common timer implementation. */ @@ -178,6 +180,8 @@ typedef struct { SysBusDevice busdev; MemoryRegion iomem; arm_timer_state *timer[2]; + int freq0, freq1; + int freq; int level[2]; qemu_irq irq; } sp804_state; @@ -269,10 +273,21 @@ static int sp804_init(SysBusDevice *dev) qi = qemu_allocate_irqs(sp804_set_irq, s, 2); sysbus_init_irq(dev, &s->irq); - /* ??? The timers are actually configurable between 32kHz and 1MHz, but - we don't implement that. */ - s->timer[0] = arm_timer_init(1000000); - s->timer[1] = arm_timer_init(1000000); + /* The timers are configurable between 32kHz and 1MHz + * defaulting to 1MHz but overrideable as a property + * They can be configured individually as a property + * but default is shared frequency */ + if (s->freq0) { + s->timer[0] = arm_timer_init(s->freq0); + } else { + s->timer[0] = arm_timer_init(s->freq); + } + if (s->freq1) { + s->timer[1] = arm_timer_init(s->freq1); + } else { + s->timer[1] = arm_timer_init(s->freq); + } + s->timer[0]->irq = qi[0]; s->timer[1]->irq = qi[1]; memory_region_init_io(&s->iomem, &sp804_ops, s, "sp804", 0x1000); @@ -281,6 +296,17 @@ static int sp804_init(SysBusDevice *dev) return 0; } +static SysBusDeviceInfo sp804_info = { + .init = sp804_init, + .qdev.name = "sp804", + .qdev.size = sizeof(sp804_state), + .qdev.props = (Property[]) { + DEFINE_PROP_INT32("freq", sp804_state, freq, 1000000), + DEFINE_PROP_INT32("freq0", sp804_state, freq0, 0), + DEFINE_PROP_INT32("freq1", sp804_state, freq1, 0), + DEFINE_PROP_END_OF_LIST(), + } +}; /* Integrator/CP timer module. */ @@ -349,7 +375,7 @@ static int icp_pit_init(SysBusDevice *dev) static void arm_timer_register_devices(void) { sysbus_register_dev("integrator_pit", sizeof(icp_pit_state), icp_pit_init); - sysbus_register_dev("sp804", sizeof(sp804_state), sp804_init); + sysbus_register_withprop(&sp804_info); } device_init(arm_timer_register_devices) -- 1.7.5.4