[Qemu-devel] DMA active hw_error

[Qemu-devel] DMA active hw_error

[Richard Cole]

I'm new to QEMU so this might be a rather naive question but why is
there a hw_error here:

https://github.com/qemu/QEMU/blob/2ac711791b2e4aabc5e4046b7428727828c705eb/hw/pl080.c#L96

It causes QEMU at least on my machine to abort. It would seem to make
it so the rest of the function will never be executed? That hw_error
(or a cpu_error) line seems have have been there since the file was
imported.

Here's the code fragment in case that link doesn't work.

static void pl080_run(pl080_state *s)
{
    int c;
    int flow;
    pl080_channel *ch;
    int swidth;
    int dwidth;
    int xsize;
    int n;
    int src_id;
    int dest_id;
    int size;
    uint8_t buff[4];
    uint32_t req;

    s->tc_mask = 0;
    for (c = 0; c < s->nchannels; c++) {
        if (s->chan[c].conf & PL080_CCONF_ITC)
            s->tc_mask |= 1 << c;
        if (s->chan[c].conf & PL080_CCONF_IE)
            s->err_mask |= 1 << c;
    }

    if ((s->conf & PL080_CONF_E) == 0)
        return;

hw_error("DMA active\n");
    /* If we are already in the middle of a DMA operation then indicate that
       there may be new DMA requests and return immediately.  */
    if (s->running) {
        s->running++;
        return;
    }

regards,

Richard.

Re: [Qemu-devel] DMA active hw_error

[Richard Cole]

Another thing I don't understand is the code from this function

  https://github.com/qemu/QEMU/blob/master/hw/pl080.c#L289

If I look here http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0218e/ch03s04s15.html
it seems to suggest that the src register is located at:

  0x100 offset from the base of the device

but the function does this this:

  switch(offset >> 2)
    case 0:
      // src address register

but 0x100 >> 2 does not equal 0. Not even close. Maybe it should be

  (offset - 0x100) >> 2?

But that would only work for channel 0. I guess one would then need to
mod by the size of the channel struct.

Am I completely off base or has this code never been run?

regards,

Richard.

On Mon, Dec 26, 2011 at 6:26 PM, Richard Cole <richard.j.cole@gmail.com> wrote:
> I'm new to QEMU so this might be a rather naive question but why is
> there a hw_error here:
>
> https://github.com/qemu/QEMU/blob/2ac711791b2e4aabc5e4046b7428727828c705eb/hw/pl080.c#L96
>
> It causes QEMU at least on my machine to abort. It would seem to make
> it so the rest of the function will never be executed? That hw_error
> (or a cpu_error) line seems have have been there since the file was
> imported.
>
> Here's the code fragment in case that link doesn't work.
>
> static void pl080_run(pl080_state *s)
> {
>    int c;
>    int flow;
>    pl080_channel *ch;
>    int swidth;
>    int dwidth;
>    int xsize;
>    int n;
>    int src_id;
>    int dest_id;
>    int size;
>    uint8_t buff[4];
>    uint32_t req;
>
>    s->tc_mask = 0;
>    for (c = 0; c < s->nchannels; c++) {
>        if (s->chan[c].conf & PL080_CCONF_ITC)
>            s->tc_mask |= 1 << c;
>        if (s->chan[c].conf & PL080_CCONF_IE)
>            s->err_mask |= 1 << c;
>    }
>
>    if ((s->conf & PL080_CONF_E) == 0)
>        return;
>
> hw_error("DMA active\n");
>    /* If we are already in the middle of a DMA operation then indicate that
>       there may be new DMA requests and return immediately.  */
>    if (s->running) {
>        s->running++;
>        return;
>    }
>
> regards,
>
> Richard.

Re: [Qemu-devel] DMA active hw_error

[Andreas Färber]

Am 27.12.2011 03:26, schrieb Richard Cole:
> https://github.com/qemu/QEMU/blob/2ac711791b2e4aabc5e4046b7428727828c705eb/hw/pl080.c#L96

Further down, this also looks odd:

        if (s->conf & (PL080_CONF_M1 | PL080_CONF_M1)) {
            hw_error("pl080_write: Big-endian DMA not implemented\n");
        }

Maybe (..._M1 | ..._M2)?

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] DMA active hw_error

[Peter Maydell]

On 27 December 2011 02:26, Richard Cole <richard.j.cole@gmail.com> wrote:
> I'm new to QEMU so this might be a rather naive question but why is
> there a hw_error [in pl080_run]:

I believe that hw_error() is basically there to say "the code for
handling DMA is untested at best and unimplemented at worst".
Linux doesn't use it, so nobody has had this problem so far.

If you have a use case and some enthusiasm you could implement
any missing functionality and send patches :-)

-- PMM

Re: [Qemu-devel] DMA active hw_error

[Peter Maydell]

On 27 December 2011 14:33, Andreas Färber <afaerber@suse.de> wrote:
> Further down, this also looks odd:
>
>        if (s->conf & (PL080_CONF_M1 | PL080_CONF_M1)) {
>            hw_error("pl080_write: Big-endian DMA not implemented\n");
>        }
>
> Maybe (..._M1 | ..._M2)?

Yes, obvious typo. I've noticed that one before but hadn't got
round to submitting a patch to fix it, since it's only guarding
a "this is broken" assert.

-- PMM

Re: [Qemu-devel] DMA active hw_error

[Peter Maydell]

On 27 December 2011 03:21, Richard Cole <richard.j.cole@gmail.com> wrote:
> Another thing I don't understand is the code from this function

>  switch(offset >> 2)
>    case 0:
>      // src address register
>
> but 0x100 >> 2 does not equal 0. Not even close. Maybe it should be
>
>  (offset - 0x100) >> 2?
>
> But that would only work for channel 0. I guess one would then need to
> mod by the size of the channel struct.

(offset & 0x1f) >> 2
is probably what you want. (you can see we just used 0xe0 to get
the channel number).

> Am I completely off base or has this code never been run?

I expect it hasn't, no. You may be detecting a pattern here :-)

Free extra bug if you're collecting them: the code that chases
linked lists doesn't handle ch->lli bit 0 properly (it's the
AHB master select bit, so it (and bit 1) should be ignored
when using it as a pointer to load from).

-- PMM

Re: [Qemu-devel] DMA active hw_error

[Richard Cole]

I'll have to learn quite a bit more about QEMU and arm before I'll be
able to contribute back any patches. I bought a beagle board today so
that at least is a start, being able to compare QEMU to some real
hardware.

Out of curiosity what is the testing strategy for QEMU. Does one
simply write stand alone test programs that are then executed via qemu
or is there a more unit test kind of approach? I'm quite new to
emulators and such.

Is there an issues list for QEMU. Does anyone use github features like
being able to comment on particular sources lines or create issues
refer to specific lines of code? That would seem a good way to track
bugs discovered in the code.

A more broad question. Does anyone know why linux doesn't use the DMA?
Is the DMA really old school (I grew up with an Amiga that was full of
them), or is it just for portability, i.e that DMA differ from
platform to platform too much?

regards,

Richard.

On Tue, Dec 27, 2011 at 2:39 PM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 27 December 2011 03:21, Richard Cole <richard.j.cole@gmail.com> wrote:
>> Another thing I don't understand is the code from this function
>
>>  switch(offset >> 2)
>>    case 0:
>>      // src address register
>>
>> but 0x100 >> 2 does not equal 0. Not even close. Maybe it should be
>>
>>  (offset - 0x100) >> 2?
>>
>> But that would only work for channel 0. I guess one would then need to
>> mod by the size of the channel struct.
>
> (offset & 0x1f) >> 2
> is probably what you want. (you can see we just used 0xe0 to get
> the channel number).
>
>> Am I completely off base or has this code never been run?
>
> I expect it hasn't, no. You may be detecting a pattern here :-)
>
> Free extra bug if you're collecting them: the code that chases
> linked lists doesn't handle ch->lli bit 0 properly (it's the
> AHB master select bit, so it (and bit 1) should be ignored
> when using it as a pointer to load from).
>
> -- PMM

Re: [Qemu-devel] DMA active hw_error

[Peter Maydell]

On 28 December 2011 06:44, Richard Cole <richard.j.cole@gmail.com> wrote:
> I'll have to learn quite a bit more about QEMU and arm before I'll be
> able to contribute back any patches. I bought a beagle board today so
> that at least is a start, being able to compare QEMU to some real
> hardware.

There's no beagle board model in qemu at the moment (there is one
in qemu-linaro but it's taking me a long time to get the patches
cleaned up to submit upstream).

> Is there an issues list for QEMU.

There's https://bugs.launchpad.net/qemu, although it mostly contains
user-reported bugs rather than "things the developer community
knows are broken" issues.

> Does anyone use github features like
> being able to comment on particular sources lines or create issues
> refer to specific lines of code? That would seem a good way to track
> bugs discovered in the code.

The github mirror is a very recent development. I'm not sure
we want to have two different bug trackers on two different sites...

> A more broad question. Does anyone know why linux doesn't use the DMA?
> Is the DMA really old school (I grew up with an Amiga that was full of
> them), or is it just for portability, i.e that DMA differ from
> platform to platform too much?

The bugs we've been talking about are specific to the PL180 (which
is used on the ARM dev boards like vexpress, realview, etc).
Since these are only dev boards, I think nobody has ever got round
to implementing the DMA support in Linux for them. Other platforms
have different DMA setups and get more attention because there is
more interest in tuning the performance on those platforms. (eg OMAP
has its own DMA infrastructure, which is modelled in QEMU, because
the kernel uses it.)

-- PMM