From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:41822) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rfld6-0004uV-A9 for qemu-devel@nongnu.org; Wed, 28 Dec 2011 00:00:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rfld4-0000OA-No for qemu-devel@nongnu.org; Wed, 28 Dec 2011 00:00:44 -0500 Received: from usrksweb02.endace.com ([174.143.168.194]:47510) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rfld4-0000O5-3h for qemu-devel@nongnu.org; Wed, 28 Dec 2011 00:00:42 -0500 Message-ID: <4EFAA253.2050700@endace.com> Date: Wed, 28 Dec 2011 18:00:03 +1300 From: Alexey Korolev MIME-Version: 1.0 References: <4EFA9DF0.7050902@endace.com> In-Reply-To: <4EFA9DF0.7050902@endace.com> Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 1/3] Add new range above 4GB in _CRS table List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, seabios@seabios.org, mst@redhat.com Cc: sfd@endace.com, yamahata@valinux.co.jp Since Windows is using CRS table for PCI resource allocation, this patch allows Windows guests to work with PCI devices when PCI BAR allocation is above 4GB. This also might be helpful on Linux when use_crs kernel boot option is set. Michael I've added you to signed-off if you don't mind. Signed-off-by: Alexey Korolev Signed-off-by: Michael S. Tsirkin --- src/acpi-dsdt.dsl | 7 +++++ src/acpi-dsdt.hex | 66 +++++++++++++++++++++++++++++++++++++++++++++-------- src/config.h | 2 + 3 files changed, 65 insertions(+), 10 deletions(-) diff --git a/src/acpi-dsdt.dsl b/src/acpi-dsdt.dsl index 7082b65..c17e947 100644 --- a/src/acpi-dsdt.dsl +++ b/src/acpi-dsdt.dsl @@ -175,6 +175,13 @@ DefinitionBlock ( 0x00000000, // Address Translation Offset 0x1EC00000, // Address Length ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x8000000000, // Address Range Minimum + 0xFFFFFFFFFF, // Address Range Maximum + 0x00000000, // Address Translation Offset + 0x8000000000, // Address Length + ,, , AddressRangeMemory, TypeStatic) }) } } diff --git a/src/acpi-dsdt.hex b/src/acpi-dsdt.hex index 5dc7bb4..fe4c17e 100644 --- a/src/acpi-dsdt.hex +++ b/src/acpi-dsdt.hex @@ -3,12 +3,12 @@ static unsigned char AmlCode[] = { 0x53, 0x44, 0x54, -0xd3, -0x10, +0x1, +0x11, 0x0, 0x0, 0x1, -0x2d, +0xe, 0x42, 0x58, 0x50, @@ -110,16 +110,16 @@ static unsigned char AmlCode[] = { 0x47, 0x42, 0x10, -0x44, -0x81, +0x42, +0x84, 0x5f, 0x53, 0x42, 0x5f, 0x5b, 0x82, -0x4c, -0x80, +0x4a, +0x83, 0x50, 0x43, 0x49, @@ -2064,10 +2064,10 @@ static unsigned char AmlCode[] = { 0x52, 0x53, 0x11, -0x42, -0x7, +0x40, +0xa, 0xa, -0x6e, +0x9c, 0x88, 0xd, 0x0, @@ -2176,6 +2176,52 @@ static unsigned char AmlCode[] = { 0x0, 0xc0, 0x1e, +0x8a, +0x2b, +0x0, +0x0, +0xc, +0x3, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x80, +0x0, +0x0, +0x0, +0xff, +0xff, +0xff, +0xff, +0xff, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x0, +0x80, +0x0, +0x0, +0x0, 0x79, 0x0, 0x10, diff --git a/src/config.h b/src/config.h index b0187a4..236f2e9 100644 --- a/src/config.h +++ b/src/config.h @@ -47,6 +47,8 @@ #define BUILD_PCIMEM_START 0xe0000000 #define BUILD_PCIMEM_END 0xfec00000 /* IOAPIC is mapped at */ +#define BUILD_PCIMEM_64_START 0x8000000000LL +#define BUILD_PCIMEM_64_END 0x10000000000LL #define BUILD_IOAPIC_ADDR 0xfec00000 #define BUILD_HPET_ADDRESS 0xfed00000 -- 1.7.5.4