From: "Andreas Färber" <afaerber@suse.de>
To: Mark Langsdorf <mark.langsdorf@calxeda.com>
Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org,
rob.herring@calxeda.com, paul@codesourcery.com
Subject: Re: [Qemu-devel] [PATCH v4 2/7] arm: Set frequencies for arm_timer
Date: Wed, 28 Dec 2011 12:46:47 +0100 [thread overview]
Message-ID: <4EFB01A7.4060203@suse.de> (raw)
In-Reply-To: <1325035480-20409-3-git-send-email-mark.langsdorf@calxeda.com>
Am 28.12.2011 02:24, schrieb Mark Langsdorf:
> Use qdev properties to allow board modelers to set the frequencies
> for the sp804 timer. Each of the sp804's timers can have an
> individual frequency. The timers default to 1MHz.
>
> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Thanks,
Andreas
> ---
> Changes from v3
> None
> Changes from v2
> Comment correctly describes behavior of properties
> freqX variables are defined as uint32_t, not int
> Changes from v1
> Simplified multiple timer frequency handling
> Removed the shared default
>
> hw/arm_timer.c | 24 +++++++++++++++++++-----
> 1 files changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/hw/arm_timer.c b/hw/arm_timer.c
> index 0a5b9d2..60e1c63 100644
> --- a/hw/arm_timer.c
> +++ b/hw/arm_timer.c
> @@ -9,6 +9,8 @@
>
> #include "sysbus.h"
> #include "qemu-timer.h"
> +#include "qemu-common.h"
> +#include "qdev.h"
>
> /* Common timer implementation. */
>
> @@ -178,6 +180,7 @@ typedef struct {
> SysBusDevice busdev;
> MemoryRegion iomem;
> arm_timer_state *timer[2];
> + uint32_t freq0, freq1;
> int level[2];
> qemu_irq irq;
> } sp804_state;
> @@ -269,10 +272,11 @@ static int sp804_init(SysBusDevice *dev)
>
> qi = qemu_allocate_irqs(sp804_set_irq, s, 2);
> sysbus_init_irq(dev, &s->irq);
> - /* ??? The timers are actually configurable between 32kHz and 1MHz, but
> - we don't implement that. */
> - s->timer[0] = arm_timer_init(1000000);
> - s->timer[1] = arm_timer_init(1000000);
> + /* The timers are configurable between 32kHz and 1MHz
> + * defaulting to 1MHz but overrideable as individual properties */
> + s->timer[0] = arm_timer_init(s->freq0);
> + s->timer[1] = arm_timer_init(s->freq1);
> +
> s->timer[0]->irq = qi[0];
> s->timer[1]->irq = qi[1];
> memory_region_init_io(&s->iomem, &sp804_ops, s, "sp804", 0x1000);
> @@ -281,6 +285,16 @@ static int sp804_init(SysBusDevice *dev)
> return 0;
> }
>
> +static SysBusDeviceInfo sp804_info = {
> + .init = sp804_init,
> + .qdev.name = "sp804",
> + .qdev.size = sizeof(sp804_state),
> + .qdev.props = (Property[]) {
> + DEFINE_PROP_UINT32("freq0", sp804_state, freq0, 1000000),
> + DEFINE_PROP_UINT32("freq1", sp804_state, freq1, 1000000),
> + DEFINE_PROP_END_OF_LIST(),
> + }
> +};
>
> /* Integrator/CP timer module. */
>
> @@ -349,7 +363,7 @@ static int icp_pit_init(SysBusDevice *dev)
> static void arm_timer_register_devices(void)
> {
> sysbus_register_dev("integrator_pit", sizeof(icp_pit_state), icp_pit_init);
> - sysbus_register_dev("sp804", sizeof(sp804_state), sp804_init);
> + sysbus_register_withprop(&sp804_info);
> }
>
> device_init(arm_timer_register_devices)
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
next prev parent reply other threads:[~2011-12-28 11:48 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-28 1:24 [Qemu-devel] [PATCH v4 0/7] various ARM fixes Mark Langsdorf
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 1/7] arm: add missing scu registers Mark Langsdorf
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 2/7] arm: Set frequencies for arm_timer Mark Langsdorf
2011-12-28 11:46 ` Andreas Färber [this message]
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 3/7] arm: add dummy v7 cp15 config_base_register Mark Langsdorf
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 4/7] arm: add dummy gic security registers Mark Langsdorf
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 5/7] add L2x0/PL310 cache controller device Mark Langsdorf
2011-12-28 1:32 ` Peter Maydell
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 6/7] Add xgmac ethernet model Mark Langsdorf
2011-12-28 1:24 ` [Qemu-devel] [PATCH v4 7/7] arm: make the number of GIC interrupts configurable Mark Langsdorf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4EFB01A7.4060203@suse.de \
--to=afaerber@suse.de \
--cc=mark.langsdorf@calxeda.com \
--cc=paul@codesourcery.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=rob.herring@calxeda.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).