From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:38219) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RjNlD-0007rE-Li for qemu-devel@nongnu.org; Fri, 06 Jan 2012 23:20:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RjNlB-0003zz-Uf for qemu-devel@nongnu.org; Fri, 06 Jan 2012 23:20:03 -0500 Received: from cantor2.suse.de ([195.135.220.15]:50627 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RjNlB-0003zo-Px for qemu-devel@nongnu.org; Fri, 06 Jan 2012 23:20:01 -0500 Message-ID: <4F07C796.6070107@suse.de> Date: Sat, 07 Jan 2012 05:18:30 +0100 From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= MIME-Version: 1.0 References: <1325793761-10249-1-git-send-email-mark.langsdorf@calxeda.com> <1325793761-10249-6-git-send-email-mark.langsdorf@calxeda.com> <4F073F5E.6090507@gmail.com> <4F074721.8050403@gmail.com> <4F075565.3040408@suse.de> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 5/5] arm: SoC model for Calxeda Highbank List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Igor Mitsyanko , Mark Langsdorf , qemu-devel@nongnu.org, Rob Herring Am 07.01.2012 04:14, schrieb Peter Maydell: > On 6 January 2012 20:11, Andreas F=C3=A4rber wrote: >> Not sure how hardcoding the cpu_model would work with CPU features, >> would they be still included or stripped out before. Peter? >=20 > Interesting question. It's certainly more likely to work to have > a board where the only tweak you made to the CPU was to disable > Neon, say, but I'm not sure "likely to work" is a very firm criterion. What I meant was, if sometime we allow, e.g., '-cpu cortex-m4,+FPU', will cpu_model technically contain "cortex-m4" or "cortex-m4,+FPU"? If the latter, then we should not hardcode cpu_model anywhere. I'm sure we can always find a scenario that doesn't work, but the emulated instructions are rather unlikely to conflict with a machine-specific memory layout and device instantiation, given that the guest matches the emulated CPU features. Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC= rnberg