From: Igor Mitsyanko <i.mitsyanko@gmail.com>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Rob Herring" <rob.herring@calxeda.com>,
"Andreas Färber" <afaerber@suse.de>,
"Mark Langsdorf" <mark.langsdorf@calxeda.com>
Subject: Re: [Qemu-devel] [PATCH 5/5] arm: SoC model for Calxeda Highbank
Date: Sat, 07 Jan 2012 12:55:43 +0300 [thread overview]
Message-ID: <4F08169F.6000402@gmail.com> (raw)
In-Reply-To: <4F075565.3040408@suse.de>
On 06.01.2012 11:11 PM, Andreas Färber wrote:
> Am 06.01.2012 20:10, schrieb Igor Mitsyanko:
>> On 01/06/2012 10:45 PM, Peter Maydell wrote:
>>> On 6 January 2012 18:37, Igor Mitsyanko<i.mitsyanko@gmail.com> wrote:
>>>> On 01/06/2012 12:02 AM, Mark Langsdorf wrote:
>>>>> + if (!cpu_model) {
>>>>> + cpu_model = "cortex-a9";
>>>>> + }
>>>>
>>>>
>>>> Google said there is only cortexA9-based Highbank SoC version, maybe you
>>>> should just hardcode cpu model?
>>>
>>> This is just boilerplate code for any random ARM board at the moment:
>>> it defaults the CPU but lets the user override. We should either make
>>> a decision to do something else for all boards, or follow the usual
>>> convention here; I'm happy to do the latter.
>>>
>>
>> Are you saying that it's a mistake that we hardcoded cpu model and
>> memory size for Exynos boards in our patches?
>
> No machine should silently change the user's -cpu to something else.
> Either error out or warn the user, or let them face the consequences of
> their parameters themselves.
Machines do not instantiate cpus, they instantiate SoC models, which are
solid (not modular) devices with explicitly specified (in datasheet or
elsewhere) cpu core and peripheral devices, and if someone creates
Highbank SoC instance with Cortex-M4 CPU core then it's no longer a
Highbank SoC. What I mean, peripheral devices on SoC are not
configurable, you cannot add additional UART or I2C interface, why allow
cpu model change?
> Not sure how hardcoding the cpu_model would work with CPU features,
> would they be still included or stripped out before. Peter?
>
What do you mean? All features are currently set during
cpu_reset_model_id() as far as I know, it doesn't matter whether
cpu_model was specified on command line or hardcoded into initialization
code.
next prev parent reply other threads:[~2012-01-07 8:55 UTC|newest]
Thread overview: 148+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-05 20:02 [Qemu-devel] [PATCH 0/5] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH v5 1/5] Add xgmac ethernet model Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH v5 2/5] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-06 15:37 ` Peter Maydell
2012-01-05 20:02 ` [Qemu-devel] [PATCH 3/5] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH 4/5] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-05 20:02 ` [Qemu-devel] [PATCH 5/5] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-06 16:29 ` Peter Maydell
2012-01-06 16:58 ` Mark Langsdorf
2012-01-06 17:04 ` Peter Maydell
2012-01-06 17:34 ` Mark Langsdorf
2012-01-06 17:46 ` Peter Maydell
2012-01-06 21:16 ` Mark Langsdorf
2012-01-07 3:20 ` Peter Maydell
2012-01-06 18:09 ` Andreas Färber
2012-01-06 18:37 ` Igor Mitsyanko
2012-01-06 18:45 ` Peter Maydell
2012-01-06 19:10 ` Igor Mitsyanko
2012-01-06 20:11 ` Andreas Färber
2012-01-07 3:14 ` Peter Maydell
2012-01-07 4:18 ` Andreas Färber
2012-01-07 9:55 ` Igor Mitsyanko [this message]
2012-01-07 9:40 ` Andreas Färber
2012-01-06 18:48 ` Rob Herring
2012-01-09 16:59 ` [Qemu-devel] [PATCH v2 0/6] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH v5 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-10 17:52 ` Edgar E. Iglesias
2012-01-09 16:59 ` [Qemu-devel] [PATCH v6 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH v4 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-10 11:22 ` Andreas Färber
2012-01-09 16:59 ` [Qemu-devel] [PATCH 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH v2 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-09 16:59 ` [Qemu-devel] [PATCH 6/6] arm: Remove incorrect and misleading comment in arm_timer Mark Langsdorf
2012-01-10 12:45 ` Andreas Färber
2012-01-10 15:35 ` Peter Maydell
2012-01-10 18:00 ` Andreas Färber
2012-01-10 16:45 ` [Qemu-devel] [PATCH v3 0/5] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-10 16:45 ` [Qemu-devel] [PATCH v5 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-10 17:34 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v6 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-10 17:47 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v5 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-10 17:44 ` Andreas Färber
2012-01-10 16:45 ` [Qemu-devel] [PATCH 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-10 17:55 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v2 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-10 18:04 ` Peter Maydell
2012-01-10 16:45 ` [Qemu-devel] [PATCH v2 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-10 17:52 ` Peter Maydell
2012-01-10 18:03 ` Andreas Färber
2012-01-10 18:18 ` [Qemu-devel] [PATCH v3 0/5] arm: add support for Calxeda Highbank SoC Peter Maydell
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 0/6] " Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-11 4:12 ` Andreas Färber
2012-01-11 10:56 ` Peter Maydell
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-10 20:33 ` [Qemu-devel] [PATCH v7 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 0/6] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-11 15:50 ` Peter Maydell
2012-01-13 23:27 ` Peter Maydell
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-11 15:40 ` Andreas Färber
2012-01-11 15:54 ` Peter Maydell
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-11 15:56 ` Peter Maydell
2012-01-11 15:26 ` [Qemu-devel] [PATCH v8 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-11 22:47 ` Peter Maydell
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 4/6] arm: Add dummy support for co-processor 15's secure config register Mark Langsdorf
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-12 12:47 ` Mitsyanko Igor
2012-01-12 13:09 ` Andreas Färber
2012-01-12 13:42 ` Mitsyanko Igor
2012-01-12 13:46 ` Peter Maydell
2012-01-12 13:58 ` Mitsyanko Igor
2012-01-12 17:51 ` Peter Maydell
2012-01-11 16:31 ` [Qemu-devel] [PATCH v9 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-11 22:41 ` [Qemu-devel] [PATCH v9 0/6] arm: add support for Calxeda Highbank SoC Peter Maydell
2012-01-13 12:14 ` Peter Maydell
2012-01-13 14:15 ` Andreas Färber
2012-01-13 14:18 ` Alexander Graf
2012-01-13 14:31 ` Andreas Färber
2012-01-13 14:35 ` Alexander Graf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 0/5] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 1/5] Add xgmac ethernet model Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 2/5] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 3/5] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-17 15:13 ` Peter Maydell
2012-01-18 14:35 ` Mark Langsdorf
2012-01-18 14:53 ` Peter Maydell
2012-01-18 15:04 ` Mark Langsdorf
2012-01-18 15:11 ` Peter Maydell
2012-01-18 15:50 ` [Qemu-devel] [PATCH][RFC] arm: add secondary cpu book callbacks to arm_boot.c Mark Langsdorf
2012-01-18 16:23 ` Peter Maydell
2012-01-18 19:06 ` [Qemu-devel] [PATCH v10 4/5] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-18 19:26 ` Peter Maydell
2012-01-18 19:33 ` Peter Maydell
2012-01-18 21:32 ` Mark Langsdorf
2012-01-17 13:50 ` [Qemu-devel] [PATCH v10 5/5] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 0/5] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 1/6] Add xgmac ethernet model Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 2/6] arm: make the number of GIC interrupts configurable Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 3/6] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 4/6] arm: add secondary cpu book callbacks to arm_boot.c Mark Langsdorf
2012-01-19 17:19 ` Peter Maydell
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-19 19:15 ` Peter Maydell
2012-01-19 19:25 ` Mark Langsdorf
2012-01-19 19:32 ` Peter Maydell
2012-01-19 19:35 ` Mark Langsdorf
2012-01-19 19:44 ` Peter Maydell
2012-01-19 19:58 ` Mark Langsdorf
2012-01-19 19:59 ` Peter Maydell
2012-01-19 20:48 ` Mark Langsdorf
2012-01-19 20:00 ` Peter Maydell
2012-01-19 15:43 ` [Qemu-devel] [PATCH v11 6/6] arm: Remove incorrect comment in arm_timer Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 0/5] arm: add support for Calxeda Highbank Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 1/4] Add xgmac ethernet model Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 2/4] ahci: add support for non-PCI based controllers Mark Langsdorf
2012-01-19 21:30 ` [Qemu-devel] [PATCH v12 3/4] arm: add secondary cpu boot callbacks to arm_boot.c Mark Langsdorf
2012-01-19 21:31 ` [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-19 21:44 ` Peter Maydell
2012-01-19 23:17 ` Rob Herring
2012-01-19 23:41 ` John Williams
2012-01-20 8:47 ` Peter Maydell
2012-01-20 13:48 ` Rob Herring
2012-01-20 13:57 ` Peter Maydell
2012-01-20 18:27 ` Grant Likely
2012-01-21 2:39 ` Peter Maydell
2012-01-23 16:32 ` [Qemu-devel] Adding -dtb option to qemu Grant Likely
2012-01-20 16:25 ` [Qemu-devel] [PATCH v12 4/4] arm: SoC model for Calxeda Highbank Mark Langsdorf
2012-01-20 16:27 ` Peter Maydell
2012-01-20 16:57 ` Mark Langsdorf
2012-01-20 16:58 ` Peter Maydell
2012-01-20 19:25 ` Mark Langsdorf
2012-01-21 2:35 ` Peter Maydell
2012-01-20 18:25 ` Grant Likely
-- strict thread matches above, loose matches on Subject: below --
2012-01-26 14:02 [Qemu-devel] [PULL 0/5] arm-devs queue (to go after target-arm queue) Peter Maydell
2012-01-26 14:02 ` [Qemu-devel] [PATCH 5/5] arm: SoC model for Calxeda Highbank Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4F08169F.6000402@gmail.com \
--to=i.mitsyanko@gmail.com \
--cc=afaerber@suse.de \
--cc=mark.langsdorf@calxeda.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=rob.herring@calxeda.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).