From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:34338) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RoKJ1-0002la-DH for qemu-devel@nongnu.org; Fri, 20 Jan 2012 14:39:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RoKJ0-00077T-Kw for qemu-devel@nongnu.org; Fri, 20 Jan 2012 14:39:23 -0500 Message-ID: <4F19C2DC.7020906@freescale.com> Date: Fri, 20 Jan 2012 13:39:08 -0600 From: Scott Wood MIME-Version: 1.0 References: <1327029449-13220-1-git-send-email-agraf@suse.de> <1327029449-13220-4-git-send-email-agraf@suse.de> In-Reply-To: <1327029449-13220-4-git-send-email-agraf@suse.de> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 3/6] PPC: e500: msync is 440 only, e500 has real sync List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: qemu-ppc@nongnu.org, qemu-devel Developers On 01/19/2012 09:17 PM, Alexander Graf wrote: > The e500 CPUs don't use 440's msync which falls on the same opcode IDs, > but instead use the real powerpc sync instruction. This is important, > since the invalid mask differs between the two. Could you rename 4xx msync to explicitly be 4xx msync, instead of pretending that e500 doesn't have something called msync? -Scott