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From: "Andreas Färber" <afaerber@suse.de>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH 1/2] Add dummy implementation of generic timer cp15 registers
Date: Wed, 25 Jan 2012 15:01:27 +0100	[thread overview]
Message-ID: <4F200B37.9090501@suse.de> (raw)
In-Reply-To: <1327498343-5830-2-git-send-email-peter.maydell@linaro.org>

Am 25.01.2012 14:32, schrieb Peter Maydell:
> Add a dummy implementation of the cp15 registers for the generic
> timer (found in the Cortex-A15), just sufficient for Linux to
> decide that it can't use it. This requires at least CNTP_CTL and
> CNTFRQ to be implemented as RAZ/WI; we RAZ/WI all of c14.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Andreas Färber <afaerber@suse.de>

Took me a bit to figure out RAZ/WI. ;)

Andreas

> ---
>  target-arm/cpu.h    |    1 +
>  target-arm/helper.c |   12 ++++++++++--
>  2 files changed, 11 insertions(+), 2 deletions(-)
> 
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 42c53a7..7442c99 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -382,6 +382,7 @@ enum arm_features {
>      ARM_FEATURE_VAPA, /* cp15 VA to PA lookups */
>      ARM_FEATURE_ARM_DIV, /* divide supported in ARM encoding */
>      ARM_FEATURE_VFP4, /* VFPv4 (implies that NEON is v2) */
> +    ARM_FEATURE_GENERIC_TIMER,
>  };
>  
>  static inline int arm_feature(CPUARMState *env, int feature)
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 22e40fc..5e7205a 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -1764,7 +1764,11 @@ void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val)
>              goto bad_reg;
>          }
>          break;
> -    case 14: /* Reserved.  */
> +    case 14: /* Generic timer */
> +        if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
> +            /* Dummy implementation: RAZ/WI for all */
> +            break;
> +        }
>          goto bad_reg;
>      case 15: /* Implementation specific.  */
>          if (arm_feature(env, ARM_FEATURE_XSCALE)) {
> @@ -2134,7 +2138,11 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn)
>          default:
>              goto bad_reg;
>          }
> -    case 14: /* Reserved.  */
> +    case 14: /* Generic timer */
> +        if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
> +            /* Dummy implementation: RAZ/WI for all */
> +            return 0;
> +        }
>          goto bad_reg;
>      case 15: /* Implementation specific.  */
>          if (arm_feature(env, ARM_FEATURE_XSCALE)) {

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

  reply	other threads:[~2012-01-25 14:03 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-01-25 13:32 [Qemu-devel] [PATCH 0/2] Cortex-A15 support: target-arm patches Peter Maydell
2012-01-25 13:32 ` [Qemu-devel] [PATCH 1/2] Add dummy implementation of generic timer cp15 registers Peter Maydell
2012-01-25 14:01   ` Andreas Färber [this message]
2012-01-25 14:22     ` Peter Maydell
2012-01-25 13:32 ` [Qemu-devel] [PATCH 2/2] Add Cortex-A15 CPU definition Peter Maydell

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