From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:50979) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rq5QY-0003Bh-So for qemu-devel@nongnu.org; Wed, 25 Jan 2012 11:10:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rq5QT-0004RS-8c for qemu-devel@nongnu.org; Wed, 25 Jan 2012 11:10:26 -0500 Received: from cantor2.suse.de ([195.135.220.15]:44273 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rq5QT-0004RA-3c for qemu-devel@nongnu.org; Wed, 25 Jan 2012 11:10:21 -0500 Message-ID: <4F2028EC.8020703@suse.de> Date: Wed, 25 Jan 2012 17:08:12 +0100 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1327408760-3666-1-git-send-email-peter.maydell@linaro.org> <1327408760-3666-4-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1327408760-3666-4-git-send-email-peter.maydell@linaro.org> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2 3/9] hw/a15mpcore.c: Add Cortex-A15 private peripheral model List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org, patches@linaro.org Am 24.01.2012 13:39, schrieb Peter Maydell: > Add a model of the Cortex-A15 memory mapped private peripheral > space. This is fairly simple because the only memory mapped > bit of the A15 is the GIC. >=20 > Note that we don't currently model a VGIC and therefore don't > map the VGIC related bits of the GIC. >=20 > Signed-off-by: Peter Maydell Reviewed-by: Andreas F=E4rber Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg