From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:38504) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ry0vi-0004wK-Np for qemu-devel@nongnu.org; Thu, 16 Feb 2012 07:59:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ry0ve-0007fD-9t for qemu-devel@nongnu.org; Thu, 16 Feb 2012 07:59:22 -0500 Received: from mail-pw0-f45.google.com ([209.85.160.45]:63535) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ry0ve-0007bu-3o for qemu-devel@nongnu.org; Thu, 16 Feb 2012 07:59:18 -0500 Received: by pbbro12 with SMTP id ro12so3024178pbb.4 for ; Thu, 16 Feb 2012 04:59:17 -0800 (PST) Message-ID: <4F3CFDA1.9070906@codemonkey.ws> Date: Thu, 16 Feb 2012 06:59:13 -0600 From: Anthony Liguori MIME-Version: 1.0 References: <1329347774-23262-1-git-send-email-imammedo@redhat.com> <1329347774-23262-2-git-send-email-imammedo@redhat.com> <4F3CE7A5.30600@siemens.com> <4F3CF9AE.5020701@codemonkey.ws> <4F3CFB96.1000505@siemens.com> In-Reply-To: <4F3CFB96.1000505@siemens.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 1/7] Introduce a new bus "ICC" to connect APIC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: Igor Mammedov , "qemu-devel@nongnu.org" , "gleb@redhat.com" On 02/16/2012 06:50 AM, Jan Kiszka wrote: > On 2012-02-16 13:42, Anthony Liguori wrote: >> On 02/16/2012 05:25 AM, Jan Kiszka wrote: >>> On 2012-02-16 00:16, Igor Mammedov wrote: >>>> Introduce a new structure CPUS as the controller of ICC (INTERRUPT >>>> CONTROLLER COMMUNICATIONS), and new bus "ICC" to hold APIC,instead >>>> of sysbus. So we can support APIC hot-plug feature. >>>> >>>> This is repost of original patch for qemu-kvm rebased on current qemu: >>>> http://lists.nongnu.org/archive/html/qemu-devel/2011-11/msg01478.html >>>> All credits to Liu Ping Fan for writing it. >>>> >>>> V2 changes: >>>> - cpusockets_init: cpu_sockets is not yet initialized, use cpus that >>>> we got as input param instead for qbus_create, this makes cpus >>>> apics visible in "info qtree" monitor command >>>> - fix format error spotted by Jan and missed by checkpatch >>>> - cpu_has_apic_feature: return bool instead of int >>>> >>> >>> This patch surely no longer applies. And the ICC requires QOM conversion. >> >> Also, post-QOM, I don't think having an ICC bus makes a whole lot of sense. >> >> The LAPIC can be made a child of the CPU device with a bidirectional link. > > We do have a bus here, the IO-APICs are attached to it as well. Isn't that a bus protocol that's specific to the LAPICs/IO-APICs? I don't think that you would logically model the CPU as part of it. I wonder if modeling inter-lapic communication via a bus is a bit overkill compared to what we do today (just a for() loop when needed). Regards, Anthony Liguori But we > can surely save that dummy cpusockets device. > > Jan >