* Re: [Qemu-devel] [PATCH] i8259: Do not clear level-triggered lines in IRR on init
2012-01-24 15:29 [Qemu-devel] [PATCH] i8259: Do not clear level-triggered lines in IRR on init Jan Kiszka
@ 2012-01-24 16:11 ` Gleb Natapov
2012-02-13 11:37 ` Jan Kiszka
2012-02-17 18:17 ` Anthony Liguori
2 siblings, 0 replies; 4+ messages in thread
From: Gleb Natapov @ 2012-01-24 16:11 UTC (permalink / raw)
To: Jan Kiszka; +Cc: Anthony Liguori, qemu-devel
On Tue, Jan 24, 2012 at 04:29:29PM +0100, Jan Kiszka wrote:
> When an input line is handled as level-triggered, it will immediately
> raise an IRQ on the output of a PIC again that goes through an init
> reset. So only clear the edge-triggered inputs from IRR in that
> scenario.
>
Looks good to me.
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
> hw/i8259.c | 2 +-
> hw/i8259_common.c | 2 +-
> hw/kvm/i8259.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/hw/i8259.c b/hw/i8259.c
> index 3005ce2..264bfc6 100644
> --- a/hw/i8259.c
> +++ b/hw/i8259.c
> @@ -231,8 +231,8 @@ static void pic_reset(DeviceState *dev)
> {
> PICCommonState *s = DO_UPCAST(PICCommonState, dev.qdev, dev);
>
> - pic_init_reset(s);
> s->elcr = 0;
> + pic_init_reset(s);
> }
>
> static void pic_ioport_write(void *opaque, target_phys_addr_t addr64,
> diff --git a/hw/i8259_common.c b/hw/i8259_common.c
> index e515876..37aeee2 100644
> --- a/hw/i8259_common.c
> +++ b/hw/i8259_common.c
> @@ -28,7 +28,7 @@
> void pic_reset_common(PICCommonState *s)
> {
> s->last_irr = 0;
> - s->irr = 0;
> + s->irr &= s->elcr;
> s->imr = 0;
> s->isr = 0;
> s->priority_add = 0;
> diff --git a/hw/kvm/i8259.c b/hw/kvm/i8259.c
> index 64bb5c2..298d9ca 100644
> --- a/hw/kvm/i8259.c
> +++ b/hw/kvm/i8259.c
> @@ -84,8 +84,8 @@ static void kvm_pic_reset(DeviceState *dev)
> {
> PICCommonState *s = DO_UPCAST(PICCommonState, dev.qdev, dev);
>
> - pic_reset_common(s);
> s->elcr = 0;
> + pic_reset_common(s);
>
> kvm_pic_put(s);
> }
> --
> 1.7.3.4
--
Gleb.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] i8259: Do not clear level-triggered lines in IRR on init
2012-01-24 15:29 [Qemu-devel] [PATCH] i8259: Do not clear level-triggered lines in IRR on init Jan Kiszka
2012-01-24 16:11 ` Gleb Natapov
@ 2012-02-13 11:37 ` Jan Kiszka
2012-02-17 18:17 ` Anthony Liguori
2 siblings, 0 replies; 4+ messages in thread
From: Jan Kiszka @ 2012-02-13 11:37 UTC (permalink / raw)
To: qemu-devel, Anthony Liguori; +Cc: Gleb Natapov
On 2012-01-24 16:29, Jan Kiszka wrote:
> When an input line is handled as level-triggered, it will immediately
> raise an IRQ on the output of a PIC again that goes through an init
> reset. So only clear the edge-triggered inputs from IRR in that
> scenario.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
> hw/i8259.c | 2 +-
> hw/i8259_common.c | 2 +-
> hw/kvm/i8259.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/hw/i8259.c b/hw/i8259.c
> index 3005ce2..264bfc6 100644
> --- a/hw/i8259.c
> +++ b/hw/i8259.c
> @@ -231,8 +231,8 @@ static void pic_reset(DeviceState *dev)
> {
> PICCommonState *s = DO_UPCAST(PICCommonState, dev.qdev, dev);
>
> - pic_init_reset(s);
> s->elcr = 0;
> + pic_init_reset(s);
> }
>
> static void pic_ioport_write(void *opaque, target_phys_addr_t addr64,
> diff --git a/hw/i8259_common.c b/hw/i8259_common.c
> index e515876..37aeee2 100644
> --- a/hw/i8259_common.c
> +++ b/hw/i8259_common.c
> @@ -28,7 +28,7 @@
> void pic_reset_common(PICCommonState *s)
> {
> s->last_irr = 0;
> - s->irr = 0;
> + s->irr &= s->elcr;
> s->imr = 0;
> s->isr = 0;
> s->priority_add = 0;
> diff --git a/hw/kvm/i8259.c b/hw/kvm/i8259.c
> index 64bb5c2..298d9ca 100644
> --- a/hw/kvm/i8259.c
> +++ b/hw/kvm/i8259.c
> @@ -84,8 +84,8 @@ static void kvm_pic_reset(DeviceState *dev)
> {
> PICCommonState *s = DO_UPCAST(PICCommonState, dev.qdev, dev);
>
> - pic_reset_common(s);
> s->elcr = 0;
> + pic_reset_common(s);
>
> kvm_pic_put(s);
> }
Ping.
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] i8259: Do not clear level-triggered lines in IRR on init
2012-01-24 15:29 [Qemu-devel] [PATCH] i8259: Do not clear level-triggered lines in IRR on init Jan Kiszka
2012-01-24 16:11 ` Gleb Natapov
2012-02-13 11:37 ` Jan Kiszka
@ 2012-02-17 18:17 ` Anthony Liguori
2 siblings, 0 replies; 4+ messages in thread
From: Anthony Liguori @ 2012-02-17 18:17 UTC (permalink / raw)
To: Jan Kiszka; +Cc: qemu-devel, Gleb Natapov
On 01/24/2012 09:29 AM, Jan Kiszka wrote:
> When an input line is handled as level-triggered, it will immediately
> raise an IRQ on the output of a PIC again that goes through an init
> reset. So only clear the edge-triggered inputs from IRR in that
> scenario.
>
> Signed-off-by: Jan Kiszka<jan.kiszka@siemens.com>
Applied. Thanks.
Regards,
Anthony Liguori
> ---
> hw/i8259.c | 2 +-
> hw/i8259_common.c | 2 +-
> hw/kvm/i8259.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/hw/i8259.c b/hw/i8259.c
> index 3005ce2..264bfc6 100644
> --- a/hw/i8259.c
> +++ b/hw/i8259.c
> @@ -231,8 +231,8 @@ static void pic_reset(DeviceState *dev)
> {
> PICCommonState *s = DO_UPCAST(PICCommonState, dev.qdev, dev);
>
> - pic_init_reset(s);
> s->elcr = 0;
> + pic_init_reset(s);
> }
>
> static void pic_ioport_write(void *opaque, target_phys_addr_t addr64,
> diff --git a/hw/i8259_common.c b/hw/i8259_common.c
> index e515876..37aeee2 100644
> --- a/hw/i8259_common.c
> +++ b/hw/i8259_common.c
> @@ -28,7 +28,7 @@
> void pic_reset_common(PICCommonState *s)
> {
> s->last_irr = 0;
> - s->irr = 0;
> + s->irr&= s->elcr;
> s->imr = 0;
> s->isr = 0;
> s->priority_add = 0;
> diff --git a/hw/kvm/i8259.c b/hw/kvm/i8259.c
> index 64bb5c2..298d9ca 100644
> --- a/hw/kvm/i8259.c
> +++ b/hw/kvm/i8259.c
> @@ -84,8 +84,8 @@ static void kvm_pic_reset(DeviceState *dev)
> {
> PICCommonState *s = DO_UPCAST(PICCommonState, dev.qdev, dev);
>
> - pic_reset_common(s);
> s->elcr = 0;
> + pic_reset_common(s);
>
> kvm_pic_put(s);
> }
^ permalink raw reply [flat|nested] 4+ messages in thread