From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:49498) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S4eUc-0006Oc-Kj for qemu-devel@nongnu.org; Mon, 05 Mar 2012 15:26:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S4eUW-00080D-Bf for qemu-devel@nongnu.org; Mon, 05 Mar 2012 15:26:50 -0500 Message-ID: <4F552165.1060701@codesourcery.com> Date: Mon, 5 Mar 2012 14:26:13 -0600 From: Meador Inge MIME-Version: 1.0 References: <1330004654-428-1-git-send-email-meadori@codesourcery.com> <4F54F283.6020207@codesourcery.com> <4F5519B8.9050903@suse.de> In-Reply-To: <4F5519B8.9050903@suse.de> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v1 1/1] ppc: Correctly define POWERPC_INSNS2_DEFAULT List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?ISO-8859-1?Q?Andreas_F=E4rber?= Cc: "qemu-ppc@nongnu.org" , qemu-devel@nongnu.org, agraf@suse.de On 03/05/2012 01:53 PM, Andreas Färber wrote: > Am 05.03.2012 18:06, schrieb Meador Inge: >> On 02/23/2012 07:44 AM, Meador Inge wrote: >> >>> 'POWERPC_INSNS2_DEFAULT' was defined incorrectly which was causing the >>> opcode table creation code to erroneously register 'eieio' and 'mbar' >>> for the "default" processor: >>> >>> ** ERROR: opcode 1a already assigned in opcode table 16 >>> *** ERROR: unable to insert opcode [1f-16-1a] >>> *** ERROR initializing PowerPC instruction 0x1f 0x16 0x1a >>> >>> Signed-off-by: Meador Inge >> >> Ping. > > Cc'ing qemu-ppc. > > What's the test case (command line) that breaks? Don't all machines use > different default CPUs? I would rather drop these ..._DEFAULT defines in > favor of using a real CPU model - but maybe I'm misunderstanding something? I meant quite literally the "default" CPU: $ ./install/bin/qemu-system-ppc -cpu default *** ERROR: opcode 1a already assigned in opcode table 16 *** ERROR: unable to insert opcode [1f-16-1a] *** ERROR initializing PowerPC instruction 0x1f 0x16 0x1a Segmentation fault (core dumped) > >> >>> --- >>> target-ppc/translate_init.c | 4 ++-- >>> 1 files changed, 2 insertions(+), 2 deletions(-) >>> >>> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c >>> index 6253076..6cb5fad 100644 >>> --- a/target-ppc/translate_init.c >>> +++ b/target-ppc/translate_init.c >>> @@ -6713,7 +6713,7 @@ static void init_proc_620 (CPUPPCState *env) >>> #if defined (TARGET_PPC64) && 0 // XXX: TODO >>> #define CPU_POWERPC_DEFAULT CPU_POWERPC_PPC64 >>> #define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC64 >>> -#define POWERPC_INSNS2_DEFAULT POWERPC_INSNS_PPC64 >>> +#define POWERPC_INSNS2_DEFAULT POWERPC_INSNS2_PPC64 >>> #define POWERPC_MSRM_DEFAULT POWERPC_MSRM_PPC64 >>> #define POWERPC_MMU_DEFAULT POWERPC_MMU_PPC64 >>> #define POWERPC_EXCP_DEFAULT POWERPC_EXCP_PPC64 >>> @@ -6725,7 +6725,7 @@ static void init_proc_620 (CPUPPCState *env) >>> #else >>> #define CPU_POWERPC_DEFAULT CPU_POWERPC_PPC32 >>> #define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC32 >>> -#define POWERPC_INSNS2_DEFAULT POWERPC_INSNS_PPC32 >>> +#define POWERPC_INSNS2_DEFAULT POWERPC_INSNS2_PPC32 >>> #define POWERPC_MSRM_DEFAULT POWERPC_MSRM_PPC32 >>> #define POWERPC_MMU_DEFAULT POWERPC_MMU_PPC32 >>> #define POWERPC_EXCP_DEFAULT POWERPC_EXCP_PPC32 > -- Meador Inge CodeSourcery / Mentor Embedded http://www.mentor.com/embedded-software