qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Alexey Korolev <alexey.korolev@endace.com>
To: Gerd Hoffmann <kraxel@redhat.com>
Cc: sfd@endace.com, avi@redhat.com, seabios@seabios.org,
	qemu-devel@nongnu.org, mst@redhat.com
Subject: Re: [Qemu-devel] [SeaBIOS] [Seabios] [PATCH 0/6] 64bit PCI BARs allocations (take 2)
Date: Tue, 6 Mar 2012 17:28:34 +1300	[thread overview]
Message-ID: <4F559272.4050105@endace.com> (raw)
In-Reply-To: <4F549176.6070404@redhat.com>

On 05/03/12 23:12, Gerd Hoffmann wrote:
>   Hi,
>
>> I can either send a patch over existing patches, or send new series or both.
> For testing a incremental patch is fine, for merge a new series with the
> fixes squashed into the buggy patches is needed.
>
> cheers,
>   Gerd
Sure. Here are the hot fixes for the "bridge" test, please apply the patch over this series:

diff --git a/src/pciinit.c b/src/pciinit.c
index 9c41e3c..384209d 100644
--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -326,10 +326,14 @@ pci_bios_init_bus(void)
 
 static u64 pci_size_roundup(u64 size)
 {
-    int index = __fls((u32)((size - 1) >> 32));
-    if (!index)
-       index = __fls((u32)(size - 1));
-    return 0x1 << (index + 1);
+    int rest = !!(size & (size - 1));
+    int index;
+    if (size >> 32) {
+       index = __fls((u32)(size >> 32));
+       return 0x1ULL << (index + rest + 32);
+    }
+    index = __fls((u32)(size));
+    return 0x1ULL << (index + rest);
 }
 
 static u64
@@ -372,6 +376,18 @@ pci_get_bar_size(struct pci_device *pci, int bar,
     return (u32)((~(sz & mask)) + 1);
 }
 
+static int pci_bridge_is64bit(struct pci_device *pci)
+{
+    u32 pmem = pci_config_readl(pci->bdf, PCI_PREF_MEMORY_BASE);
+    if (!pmem) {
+        pci_config_writel(pci->bdf, PCI_PREF_MEMORY_BASE, 0xfff0fff0);
+        pmem = pci_config_readl(pci->bdf, PCI_PREF_MEMORY_BASE);
+        pci_config_writel(pci->bdf, PCI_PREF_MEMORY_BASE, 0x0);
+    }
+    if ((pmem & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64)
+       return 1;
+    return 0;
+}
 static u64 pci_region_max_size(struct pci_region *r)
 {
     u64 max = 0;
@@ -446,7 +462,9 @@ static int pci_bios_fill_regions(struct pci_region *regions)
             for (type = 0; type < PCI_REGION_TYPE_COUNT;
                            type++, this_region++, parent++) {
                 /* Only prefetchable bridge regions can be 64bit */
-                is64bit = (type == PCI_REGION_TYPE_PREFMEM);
+                is64bit = 0;
+                if (type == PCI_REGION_TYPE_PREFMEM)
+                    is64bit = pci_bridge_is64bit(pci);
                 entry = pci_region_create_entry(parent, pci, 0, type, is64bit);
                 if (!entry)
                     return -1;
@@ -475,7 +493,7 @@ static int pci_bios_fill_regions(struct pci_region *regions)
         }
     }
 
-    for (i = (MaxPCIBus + 1) * PCI_REGION_TYPE_COUNT ; i < 0; i--) {
+    for (i = (MaxPCIBus + 1) * PCI_REGION_TYPE_COUNT; i > 0; i--) {
         struct pci_region_entry *this_entry = regions[i-1].this_entry;
         if(!this_entry)
             continue;
@@ -491,7 +509,7 @@ static int pci_bios_fill_regions(struct pci_region *regions)
         size = (size > min_size) ? size : min_size;
         this_entry->is64bit = is64bit;
         this_entry->size = pci_size_roundup(size);
-        dump_entry(entry);
+        dump_entry(this_entry);
     }
     return 0;
 }

  reply	other threads:[~2012-03-06  4:28 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-03-01  5:50 [Qemu-devel] [Seabios] [PATCH 0/6] 64bit PCI BARs allocations (take 2) Alexey Korolev
2012-03-01  6:05 ` [Qemu-devel] [Seabios] [PATCH 1/6] Adding new structures Alexey Korolev
2012-03-01  6:15 ` [Qemu-devel] [PATCH 2/6] New service functions and ported old functions to 64bit Alexey Korolev
2012-03-01  6:40 ` [Qemu-devel] [PATCH 3/6] Fill PCI regions with etnries Alexey Korolev
2012-03-01  6:57 ` [Qemu-devel] [PATCH 4/6] Mapping of BARs and Bridge regions Alexey Korolev
2012-03-01  9:22   ` [Qemu-devel] [SeaBIOS] " Gerd Hoffmann
2012-03-01 22:01     ` Alexey Korolev
2012-03-02  7:21       ` Gerd Hoffmann
2012-03-05  5:31         ` Alexey Korolev
2012-03-01  7:02 ` [Qemu-devel] [PATCH 5/6] Delete old code Alexey Korolev
2012-03-01  7:11 ` [Qemu-devel] [PATCH 6/6] 64bit PCI range in _CRS table Alexey Korolev
2012-03-01  9:05 ` [Qemu-devel] [SeaBIOS] [Seabios] [PATCH 0/6] 64bit PCI BARs allocations (take 2) Gerd Hoffmann
2012-03-01 21:48   ` Alexey Korolev
2012-03-02  7:08     ` Gerd Hoffmann
2012-03-05  5:34       ` Alexey Korolev
2012-03-05 10:12         ` Gerd Hoffmann
2012-03-06  4:28           ` Alexey Korolev [this message]
2012-03-04 19:40 ` [Qemu-devel] " Kevin O'Connor
2012-03-05  6:03   ` Alexey Korolev
2012-03-05 13:16     ` Kevin O'Connor
2012-03-05  9:53   ` [Qemu-devel] [SeaBIOS] " Gerd Hoffmann
2012-03-05 13:49     ` Kevin O'Connor
2012-03-06  4:44       ` Alexey Korolev

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4F559272.4050105@endace.com \
    --to=alexey.korolev@endace.com \
    --cc=avi@redhat.com \
    --cc=kraxel@redhat.com \
    --cc=mst@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=seabios@seabios.org \
    --cc=sfd@endace.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).