From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:45748) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6Rl4-0002hp-Ev for qemu-devel@nongnu.org; Sat, 10 Mar 2012 14:15:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S6Rl2-0000yl-3F for qemu-devel@nongnu.org; Sat, 10 Mar 2012 14:15:14 -0500 Message-ID: <4F5BA83B.1010403@weilnetz.de> Date: Sat, 10 Mar 2012 20:15:07 +0100 From: Stefan Weil MIME-Version: 1.0 References: <1328473147-22124-1-git-send-email-sw@weilnetz.de> In-Reply-To: <1328473147-22124-1-git-send-email-sw@weilnetz.de> Content-Type: text/plain; charset=ISO-8859-15; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] Add missing const attributes for MemoryRegionOps List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: qemu-trivial , qemu-devel@nongnu.org Am 05.02.2012 21:19, schrieb Stefan Weil: > Most MemoryRegionOps already had the const attribute. > This patch adds it to the remaining ones. > > Signed-off-by: Stefan Weil > --- > hw/cuda.c | 2 +- > hw/ide/ahci.c | 4 ++-- > hw/ide/cmd646.c | 6 +++--- > hw/ide/macio.c | 2 +- > hw/ide/piix.c | 2 +- > hw/ide/via.c | 2 +- > hw/mipsnet.c | 2 +- > hw/opencores_eth.c | 4 ++-- > hw/spapr_pci.c | 2 +- > 9 files changed, 13 insertions(+), 13 deletions(-) > > diff --git a/hw/cuda.c b/hw/cuda.c > index 4077436..233ab66 100644 > --- a/hw/cuda.c > +++ b/hw/cuda.c > @@ -634,7 +634,7 @@ static uint32_t cuda_readl (void *opaque, target_phys_addr_t addr) > return 0; > } > > -static MemoryRegionOps cuda_ops = { > +static const MemoryRegionOps cuda_ops = { > .old_mmio = { > .write = { > cuda_writeb, > diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c > index 630d572..cc54590 100644 > --- a/hw/ide/ahci.c > +++ b/hw/ide/ahci.c > @@ -365,7 +365,7 @@ static void ahci_mem_write(void *opaque, target_phys_addr_t addr, > > } > > -static MemoryRegionOps ahci_mem_ops = { > +static const MemoryRegionOps ahci_mem_ops = { > .read = ahci_mem_read, > .write = ahci_mem_write, > .endianness = DEVICE_LITTLE_ENDIAN, > @@ -401,7 +401,7 @@ static void ahci_idp_write(void *opaque, target_phys_addr_t addr, > } > } > > -static MemoryRegionOps ahci_idp_ops = { > +static const MemoryRegionOps ahci_idp_ops = { > .read = ahci_idp_read, > .write = ahci_idp_write, > .endianness = DEVICE_LITTLE_ENDIAN, > diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c > index d78ed69..0aac94a 100644 > --- a/hw/ide/cmd646.c > +++ b/hw/ide/cmd646.c > @@ -65,7 +65,7 @@ static void cmd646_cmd_write(void *opaque, target_phys_addr_t addr, > ide_cmd_write(cmd646bar->bus, addr + 2, data); > } > > -static MemoryRegionOps cmd646_cmd_ops = { > +static const MemoryRegionOps cmd646_cmd_ops = { > .read = cmd646_cmd_read, > .write = cmd646_cmd_write, > .endianness = DEVICE_LITTLE_ENDIAN, > @@ -104,7 +104,7 @@ static void cmd646_data_write(void *opaque, target_phys_addr_t addr, > } > } > > -static MemoryRegionOps cmd646_data_ops = { > +static const MemoryRegionOps cmd646_data_ops = { > .read = cmd646_data_read, > .write = cmd646_data_write, > .endianness = DEVICE_LITTLE_ENDIAN, > @@ -193,7 +193,7 @@ static void bmdma_write(void *opaque, target_phys_addr_t addr, > } > } > > -static MemoryRegionOps cmd646_bmdma_ops = { > +static const MemoryRegionOps cmd646_bmdma_ops = { > .read = bmdma_read, > .write = bmdma_write, > }; > diff --git a/hw/ide/macio.c b/hw/ide/macio.c > index a827d81..2c4027d 100644 > --- a/hw/ide/macio.c > +++ b/hw/ide/macio.c > @@ -291,7 +291,7 @@ static uint32_t pmac_ide_readl (void *opaque,target_phys_addr_t addr) > return retval; > } > > -static MemoryRegionOps pmac_ide_ops = { > +static const MemoryRegionOps pmac_ide_ops = { > .old_mmio = { > .write = { > pmac_ide_writeb, > diff --git a/hw/ide/piix.c b/hw/ide/piix.c > index a472bff..c524f55 100644 > --- a/hw/ide/piix.c > +++ b/hw/ide/piix.c > @@ -79,7 +79,7 @@ static void bmdma_write(void *opaque, target_phys_addr_t addr, > } > } > > -static MemoryRegionOps piix_bmdma_ops = { > +static const MemoryRegionOps piix_bmdma_ops = { > .read = bmdma_read, > .write = bmdma_write, > }; > diff --git a/hw/ide/via.c b/hw/ide/via.c > index 2771f0c..ad6f302 100644 > --- a/hw/ide/via.c > +++ b/hw/ide/via.c > @@ -82,7 +82,7 @@ static void bmdma_write(void *opaque, target_phys_addr_t addr, > } > } > > -static MemoryRegionOps via_bmdma_ops = { > +static const MemoryRegionOps via_bmdma_ops = { > .read = bmdma_read, > .write = bmdma_write, > }; > diff --git a/hw/mipsnet.c b/hw/mipsnet.c > index a0e6c9f..1b49a79 100644 > --- a/hw/mipsnet.c > +++ b/hw/mipsnet.c > @@ -224,7 +224,7 @@ static NetClientInfo net_mipsnet_info = { > .cleanup = mipsnet_cleanup, > }; > > -static MemoryRegionOps mipsnet_ioport_ops = { > +static const MemoryRegionOps mipsnet_ioport_ops = { > .read = mipsnet_ioport_read, > .write = mipsnet_ioport_write, > .impl.min_access_size = 1, > diff --git a/hw/opencores_eth.c b/hw/opencores_eth.c > index 09f2757..6f3f5fc 100644 > --- a/hw/opencores_eth.c > +++ b/hw/opencores_eth.c > @@ -692,12 +692,12 @@ static void open_eth_desc_write(void *opaque, > } > > > -static MemoryRegionOps open_eth_reg_ops = { > +static const MemoryRegionOps open_eth_reg_ops = { > .read = open_eth_reg_read, > .write = open_eth_reg_write, > }; > > -static MemoryRegionOps open_eth_desc_ops = { > +static const MemoryRegionOps open_eth_desc_ops = { > .read = open_eth_desc_read, > .write = open_eth_desc_write, > }; > diff --git a/hw/spapr_pci.c b/hw/spapr_pci.c > index ed2e4b3..3c08d57 100644 > --- a/hw/spapr_pci.c > +++ b/hw/spapr_pci.c > @@ -281,7 +281,7 @@ static void spapr_io_write(void *opaque, target_phys_addr_t addr, > assert(0); > } > > -static MemoryRegionOps spapr_io_ops = { > +static const MemoryRegionOps spapr_io_ops = { > .endianness = DEVICE_LITTLE_ENDIAN, > .read = spapr_io_read, > .write = spapr_io_write > Ping. Could someone please commit this patch to QEMU master? More than one month should be enough time for a review. Thanks, Stefan Weil