[Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Zhi Yong Wu]

HI,

Can anyone explain their relationship and difference among them?  It
is very appreciated if you can make some comments. thanks.

-- 
Regards,

Zhi Yong Wu

Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[陳韋任]

> Can anyone explain their relationship and difference among them?  It
> is very appreciated if you can make some comments. thanks.

  I think IRQ number, interrupt number are quite similar things. You can
check PIC [1] first, especially 8259A [2]. When a device raise an interrupt,
the interrupt is delivered to CPU through PIC. Each device attaches itself
to one of PIC's pins. Thus, when we say the IRQ number of device X is Y,
it means device X attaches itself to PIC's pin Y. PIC will deliver the highest
priority interrupt to the CPU. The term "interrupt line" might appear in PCI
context [3]. BIOS usually uses interrupt line to represent what PIC pin the
device attatches to. Note that PIC (Programmable Interrupt Controller) and
PCI (Peripheral Component Interconnect) are different things.

  GPIO mostly is used on SoC. It depends on the vendor how to use GPIO. One
of GPIO capabilities is similar to PIC, I guess. But I leave this to SoC
experts. I strongly recommend the book [5] if you want to learn how things
work.

HTH, 
chenwj

[1] http://en.wikipedia.org/wiki/Programmable_Interrupt_Controller
[2] http://en.wikipedia.org/wiki/Intel_8259
[3] http://en.wikipedia.org/wiki/Conventional_PCI
[4] http://en.wikipedia.org/wiki/General_Purpose_Input/Output
[5] 系统虚拟化:原理与实现

-- 
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj

Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Zhi Yong Wu]

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On Fri, Mar 2, 2012 at 11:12 PM, êífÈÎ <chenwj@iis.sinica.edu.tw> wrote:
>> Can anyone explain their relationship and difference among them?  It
>> is very appreciated if you can make some comments. thanks.
>
>  I think IRQ number, interrupt number are quite similar things. You can
> check PIC [1] first, especially 8259A [2]. When a device raise an interrupt,
> the interrupt is delivered to CPU through PIC. Each device attaches itself
> to one of PIC's pins. Thus, when we say the IRQ number of device X is Y,
> it means device X attaches itself to PIC's pin Y. PIC will deliver the highest
> priority interrupt to the CPU. The term "interrupt line" might appear in PCI
> context [3]. BIOS usually uses interrupt line to represent what PIC pin the
> device attatches to. Note that PIC (Programmable Interrupt Controller) and
> PCI (Peripheral Component Interconnect) are different things.
>
>  GPIO mostly is used on SoC. It depends on the vendor how to use GPIO. One
> of GPIO capabilities is similar to PIC, I guess. But I leave this to SoC
> experts. I strongly recommend the book [5] if you want to learn how things
> work.
thanks a lot for your help, they are very in theory.:). actually these
concepts all exist in QEMU. I would like to know how they work
together.
>
> HTH,
> chenwj
>
> [1] http://en.wikipedia.org/wiki/Programmable_Interrupt_Controller
> [2] http://en.wikipedia.org/wiki/Intel_8259
> [3] http://en.wikipedia.org/wiki/Conventional_PCI
> [4] http://en.wikipedia.org/wiki/General_Purpose_Input/Output
> [5] ϵͳÐéÄ⻯:Ô­ÀíÓëʵÏÖ
>
> --
> Wei-Ren Chen (êífÈÎ)
> Computer Systems Lab, Institute of Information Science,
> Academia Sinica, Taiwan (R.O.C.)
> Tel:886-2-2788-3799 #1667
> Homepage: http://people.cs.nctu.edu.tw/~chenwj



-- 
Regards,

Zhi Yong Wu

Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Peter Maydell]

2012/3/3 Zhi Yong Wu <zwu.kernel@gmail.com>:
> thanks a lot for your help, they are very in theory.:). actually these
> concepts all exist in QEMU. I would like to know how they work
> together.

It's a mess. qemu_irq is the most fundamental data type we
use to model a general 'pin' or 'signal' line; despite the name
it can be used for other things besides interrupt lines, like
general purpose I/O. This is used by basically all devices.

The base class Device for all devices implemented using the
QEMU Object Model provides a number of qdev_* functions for
registering and manipulating input and output I/O lines,
eg qdev_get_gpio_in and qdev_connect_gpio_out. These are
written in terms of the basic qemu_irq type. Despite the
'gpio' name, you can use these for interrupt lines if you want.

The SysBus class (used for a lot of devices which are really
just trying to provide memory-mapped I/O and some interrupt
or signal lines) also provides an abstraction of qemu_irq
(functions sysbus_connect_irq(), sysbus_init_irq(), etc).
Again, there's no reason you can't use these for other
purposes than interrupts, although since every SysBus device
is also a Device, mostly by convention the sysbus abstraction
is used for the real outbound interrupt lines and the Device
gpio abstraction for everything else.

My opinion is that we should clean this up as part of properly
converting to the new object model. In particular SysBus should
just disappear and all Devices should be able to export named
input and output signals, which can be used for interrupts
or general I/O or whatever. Unfortunately we're probably
stuck with the incredibly badly named 'qemu_irq' type for the
rest of eternity...

-- PMM

Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Zhi Yong Wu]

On Sun, Mar 4, 2012 at 1:12 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> 2012/3/3 Zhi Yong Wu <zwu.kernel@gmail.com>:
>> thanks a lot for your help, they are very in theory.:). actually these
>> concepts all exist in QEMU. I would like to know how they work
>> together.
>
> It's a mess. qemu_irq is the most fundamental data type we
> use to model a general 'pin' or 'signal' line; despite the name
> it can be used for other things besides interrupt lines, like
> general purpose I/O. This is used by basically all devices.
>
> The base class Device for all devices implemented using the
> QEMU Object Model provides a number of qdev_* functions for
> registering and manipulating input and output I/O lines,
> eg qdev_get_gpio_in and qdev_connect_gpio_out. These are
> written in terms of the basic qemu_irq type. Despite the
> 'gpio' name, you can use these for interrupt lines if you want.
>
> The SysBus class (used for a lot of devices which are really
> just trying to provide memory-mapped I/O and some interrupt
> or signal lines) also provides an abstraction of qemu_irq
> (functions sysbus_connect_irq(), sysbus_init_irq(), etc).
> Again, there's no reason you can't use these for other
> purposes than interrupts, although since every SysBus device
> is also a Device, mostly by convention the sysbus abstraction
> is used for the real outbound interrupt lines and the Device
> gpio abstraction for everything else.
>
> My opinion is that we should clean this up as part of properly
> converting to the new object model. In particular SysBus should
> just disappear and all Devices should be able to export named
> input and output signals, which can be used for interrupts
> or general I/O or whatever. Unfortunately we're probably
> stuck with the incredibly badly named 'qemu_irq' type for the
> rest of eternity...
thanks
>
> -- PMM



-- 
Regards,

Zhi Yong Wu

Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Anthony Liguori]

Hi Zhi Yong,

On 03/02/2012 06:38 AM, Zhi Yong Wu wrote:
> HI,
>
> Can anyone explain their relationship and difference among them?  It
> is very appreciated if you can make some comments. thanks.

IRQ == interrupt.

GPIO is just another name for an input or output pin on a chip which could be a 
IRQ line.

Interrupt controllers can receive interrupts from one or more devices.  Usually, 
the input pins on an interrupt controller can be numbered sequentially.  When we 
say that the first UART is on IRQ number 3, what that really means is that the 
IRQ output pin on the UART chip is connected to pin number 3 on the interrupt 
controller with a wire.

But there never is a single interrupt controller in a real system.  For 
instance, a PCI bus has it's own interrupt controller that has four input pins 
(called LNKs) that are oddly labeled A, B, C, D.

For the I440FX PCI bus, those four input pins are mapped to two IRQs which are 
then connected to the I/O APIC.

Regards,

Anthony Liguori

Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Peter Maydell]

On 2 March 2012 16:01, Anthony Liguori <anthony@codemonkey.ws> wrote:
> On 03/02/2012 06:38 AM, Zhi Yong Wu wrote:
>> Can anyone explain their relationship and difference among them?  It
>> is very appreciated if you can make some comments. thanks.
>
>
> IRQ == interrupt.
>
> GPIO is just another name for an input or output pin on a chip which could
> be a IRQ line.

The other point to note here is that there are two different sets
of terminology:
(1) real world terminology, which is roughly what Anthony is describing
(2) QEMU qdev and sysbus terms, which don't necessarily always map
quite cleanly to (1)

In particular the QEMU type 'qemu_irq' is really just an arbitrary signal
(and would be better named GPIO) -- it is not always used for an
actual interrupt line.

-- PMM

Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Zhi Yong Wu]

On Sat, Mar 3, 2012 at 12:41 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 2 March 2012 16:01, Anthony Liguori <anthony@codemonkey.ws> wrote:
>> On 03/02/2012 06:38 AM, Zhi Yong Wu wrote:
>>> Can anyone explain their relationship and difference among them?  It
>>> is very appreciated if you can make some comments. thanks.
>>
>>
>> IRQ == interrupt.
>>
>> GPIO is just another name for an input or output pin on a chip which could
>> be a IRQ line.
>
> The other point to note here is that there are two different sets
> of terminology:
> (1) real world terminology, which is roughly what Anthony is describing
> (2) QEMU qdev and sysbus terms, which don't necessarily always map
> quite cleanly to (1)
Yeah, i also found that they don't cleanly map to real world
teminology. so many interrupt concepts make me get confused.

By the way, i have one question about MSI[-X].
How does Root Complex know if one write transaction is used for
MSI[-X]. When it recieves this transaction request, how it convert it
to one interrupt which CPU can identify?

>
> In particular the QEMU type 'qemu_irq' is really just an arbitrary signal
> (and would be better named GPIO) -- it is not always used for an
> actual interrupt line.
Can you elaborate this?
>
> -- PMM



-- 
Regards,

Zhi Yong Wu

Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Zhi Yong Wu]

HI, anthony.

On Sat, Mar 3, 2012 at 12:01 AM, Anthony Liguori <anthony@codemonkey.ws> wrote:
> Hi Zhi Yong,
>
>
> On 03/02/2012 06:38 AM, Zhi Yong Wu wrote:
>>
>> HI,
>>
>> Can anyone explain their relationship and difference among them?  It
>> is very appreciated if you can make some comments. thanks.
>
>
> IRQ == interrupt.
>
> GPIO is just another name for an input or output pin on a chip which could
> be a IRQ line.
>
> Interrupt controllers can receive interrupts from one or more devices.
>  Usually, the input pins on an interrupt controller can be numbered
> sequentially.  When we say that the first UART is on IRQ number 3, what that
> really means is that the IRQ output pin on the UART chip is connected to pin
> number 3 on the interrupt controller with a wire.
>
> But there never is a single interrupt controller in a real system.  For
> instance, a PCI bus has it's own interrupt controller that has four input
> pins (called LNKs) that are oddly labeled A, B, C, D.
thanks, i got what they mean.
>
> For the I440FX PCI bus, those four input pins are mapped to two IRQs which
> are then connected to the I/O APIC.
What do two IRQs mean here? how will those four input pins be mapped
to two IRQs? For example, 8259 interrupt controller is connected to
I/O APIC.
How will these two IRQs be connected to I/O APIC? i think that those
four input pins are connected to I/O APIC with wire, right?
Can you elaborate them if you are available?
>
> Regards,
>
> Anthony Liguori



-- 
Regards,

Zhi Yong Wu

Re: [Qemu-devel] IRQ number, interrupt number, interrupt line & GPIO[in/out]

[Shu Ming]

IRQ number  is actually a word coming from ancient time.  When 8259 was 
popular at that time, we only have 0 ~ 15 interrupts when two 8259 are 
cascaded.  The IRQ number mattered in that time, because 8259 put their 
vector number in the bus for CPU after the interrupt was delivered.  The 
number did have special meaning to the CPU used as a vector to interrupt 
table.  However, in modern time, especially after we have APIC and MSI, 
the number don't have much meaning to CPU because the interrupt is  
targeting some special PCI address to notify the CPU.  So APIC don't 
need put a vector number in the bus. In modern os,  it is usually called 
auto vector for OS to walk the interrupt routine table.  Interrupt line 
is similar to IRQ numbers, interrupt numbers.


On 2012-3-2 20:38, Zhi Yong Wu wrote:
> HI,
>
> Can anyone explain their relationship and difference among them?  It
> is very appreciated if you can make some comments. thanks.
>


-- 
Shu Ming<shuming@linux.vnet.ibm.com>
IBM China Systems and Technology Laboratory