From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:47015) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7yvE-0007Fc-2w for qemu-devel@nongnu.org; Wed, 14 Mar 2012 20:52:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S7yvB-0003HZ-V5 for qemu-devel@nongnu.org; Wed, 14 Mar 2012 20:52:03 -0400 Received: from mail-pz0-f47.google.com ([209.85.210.47]:65306) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S7yvB-0003HU-Ot for qemu-devel@nongnu.org; Wed, 14 Mar 2012 20:52:01 -0400 Received: by dado14 with SMTP id o14so4023409dad.34 for ; Wed, 14 Mar 2012 17:51:59 -0700 (PDT) Message-ID: <4F613D2C.6070001@codemonkey.ws> Date: Wed, 14 Mar 2012 19:51:56 -0500 From: Anthony Liguori MIME-Version: 1.0 References: <1331770782-20105-1-git-send-email-afaerber@suse.de> In-Reply-To: <1331770782-20105-1-git-send-email-afaerber@suse.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH urgent] target-lm32/microblaze: Drop second CPU{LM32, MB}State typedef List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Cc: "Edgar E. Iglesias" , Michael Walle , qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com On 03/14/2012 07:19 PM, Andreas Färber wrote: > Commit 9b9a970a23625de4ae6b7461906a9a0d98d3ca95 > (target-lm32/microblaze: Typedef struct CPU{MB,LM32}State) > introduced necessary typedefs for cpu_mmu_index() and mmu.h > respectively. > > On some GCC versions this leads to "error: redefinition of typedef". > > Drop the original typedef to hopefully fix the build. > > Signed-off-by: Andreas Färber Applied. Thanks. Regards, Anthony Liguori > --- > target-lm32/cpu.h | 4 ++-- > target-microblaze/cpu.h | 4 ++-- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h > index 0902a24..a7d9546 100644 > --- a/target-lm32/cpu.h > +++ b/target-lm32/cpu.h > @@ -149,7 +149,7 @@ enum { > LM32_FLAG_IGNORE_MSB = 1, > }; > > -typedef struct CPULM32State { > +struct CPULM32State { > /* general registers */ > uint32_t regs[32]; > > @@ -182,7 +182,7 @@ typedef struct CPULM32State { > uint8_t num_bps; > uint8_t num_wps; > > -} CPULM32State; > +}; > > > CPULM32State *cpu_lm32_init(const char *cpu_model); > diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h > index 3b52421..33b23c2 100644 > --- a/target-microblaze/cpu.h > +++ b/target-microblaze/cpu.h > @@ -230,7 +230,7 @@ typedef struct CPUMBState CPUMBState; > #define STREAM_CONTROL (1<< 3) > #define STREAM_NONBLOCK (1<< 4) > > -typedef struct CPUMBState { > +struct CPUMBState { > uint32_t debug; > uint32_t btaken; > uint32_t btarget; > @@ -264,7 +264,7 @@ typedef struct CPUMBState { > #endif > > CPU_COMMON > -} CPUMBState; > +}; > > CPUMBState *cpu_mb_init(const char *cpu_model); > int cpu_mb_exec(CPUMBState *s);