From: Paolo Bonzini <pbonzini@redhat.com>
To: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Cc: "Zhang, Yang Z" <yang.z.zhang@intel.com>,
"aliguori@us.ibm.com" <aliguori@us.ibm.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Subject: Re: [Qemu-devel] [PATCH v4 4/7] RTC: Set internal millisecond register to 500ms when reset divider
Date: Tue, 20 Mar 2012 18:41:19 +0100 [thread overview]
Message-ID: <4F68C13F.4090203@redhat.com> (raw)
In-Reply-To: <alpine.DEB.2.00.1203201713500.15151@kaball-desktop>
Il 20/03/2012 18:39, Stefano Stabellini ha scritto:
> This code is new: does it mean we were not handling divider reset
> correctly before?
> Also if we are trying to handle the DV registers, shouldn't we emulated
> the other RTC frequencies as well? If so, we need a scale factor, in
> addition to an offset to QEMU rtc_clock.
The other frequencies are never used in practice. But divider reset's
500ms delay can be used in tests.
Paolo
next prev parent reply other threads:[~2012-03-20 17:41 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-19 6:14 [Qemu-devel] [PATCH v4 4/7] RTC: Set internal millisecond register to 500ms when reset divider Zhang, Yang Z
2012-03-20 17:39 ` Stefano Stabellini
2012-03-20 17:41 ` Paolo Bonzini [this message]
2012-03-21 7:42 ` Zhang, Yang Z
2012-03-21 16:39 ` Stefano Stabellini
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