From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:54625) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDZ9O-0008Tx-Mb for qemu-devel@nongnu.org; Fri, 30 Mar 2012 06:33:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SDZ9I-0005fa-Hz for qemu-devel@nongnu.org; Fri, 30 Mar 2012 06:33:46 -0400 Received: from mail-gx0-f173.google.com ([209.85.161.173]:47424) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SDZ9I-0005fJ-BT for qemu-devel@nongnu.org; Fri, 30 Mar 2012 06:33:40 -0400 Received: by ggnp2 with SMTP id p2so257520ggn.4 for ; Fri, 30 Mar 2012 03:33:38 -0700 (PDT) Sender: Richard Henderson Message-ID: <4F758BFC.7080804@twiddle.net> Date: Fri, 30 Mar 2012 06:33:32 -0400 From: Richard Henderson MIME-Version: 1.0 References: <1333077432-22228-1-git-send-email-proljc@gmail.com> <1333077432-22228-5-git-send-email-proljc@gmail.com> In-Reply-To: <1333077432-22228-5-git-send-email-proljc@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH V4 04/11] Add MIPS DSP Load instructions Support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jia Liu Cc: qemu-devel@nongnu.org, aurelien@aurel32.net On 03/29/2012 11:17 PM, Jia Liu wrote: > + save_cpu_state(ctx, 1); > + gen_op_addr_add(ctx, addr, cpu_gpr[rs], cpu_gpr[rt]); > + op_ld_lh(cpu_gpr[rd], addr, ctx); You should't need to save pc state in these; this should be comparable to > case OPC_LB: > save_cpu_state(ctx, 0); > op_ld_lb(t0, t0, ctx); > gen_store_gpr(t0, rt); r~