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Date: Thu, 05 Apr 2012 01:56:49 +0200
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Subject: Re: [Qemu-devel] PL353 Device model
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To: John Williams <john.williams@petalogix.com>
Cc: Peter Maydell <peter.maydell@linaro.org>, Anthony Liguori <aliguori@us.ibm.com>, qemu-devel@nongnu.org, Peter Crosthwaite <peter.crosthwaite@petalogix.com>, Paul Brook <paul@codesourcery.com>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>

Hello John,

Am 05.04.2012 01:35, schrieb John Williams:
> On Fri, Mar 30, 2012 at 5:13 PM, Peter Crosthwaite
> <peter.crosthwaite@petalogix.com> wrote:
>=20
>> We currently have a somewhat hacky PL353 device model in our tree that
>> we wish to refactor and ultimately push to mainline. Before I go about
>> reworking it, I wish to discuss the architecture of this device model
>> because its non-trivial.
>=20
> Ping..
>=20
> We'd really appreciate some feedback on this to avoid the duplicated
> effort we are seeing in other areas such as SPI.

Generally speaking, the qdev busses (i.e., tree-style) are scheduled to
die out in favor of DAG-style QOM. However that's not going to happen
for 1.1 yet, so if there's a need for a new SPI bus it needs to be qdev.

As for the desired cascading here, my idea would be to make both flash
interfaces child<>s of the controller, arranging their MemoryRegions so
that (if applicable) they become subregions and can be toggled by the
controller.

My .02 AUD,

Andreas

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