From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:41294) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SQJ5C-0003nb-9r for qemu-devel@nongnu.org; Fri, 04 May 2012 10:02:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SQJ57-00028c-Jw for qemu-devel@nongnu.org; Fri, 04 May 2012 10:02:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:19471) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SQJ57-00028U-CW for qemu-devel@nongnu.org; Fri, 04 May 2012 10:02:01 -0400 Message-ID: <4FA3E154.7010306@redhat.com> Date: Fri, 04 May 2012 16:01:56 +0200 From: Gerd Hoffmann MIME-Version: 1.0 References: <1336119687-6295-1-git-send-email-kraxel@redhat.com> <20120504131833.GC668@morn.localdomain> In-Reply-To: <20120504131833.GC668@morn.localdomain> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [SeaBIOS] [seabios patch 0/5] dynamic pci i/o windows List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Kevin O'Connor Cc: seabios@seabios.org, qemu-devel@nongnu.org On 05/04/12 15:18, Kevin O'Connor wrote: > On Fri, May 04, 2012 at 10:21:22AM +0200, Gerd Hoffmann wrote: >> Hi, >> >> This patch series makes the PCI I/O windows runtime-configurable via >> qemu firmware config interface. Main advantage is that we can size and >> shuffle around the PCI i/O windows according to the amount of memory the >> virtual machine has. We don't need a hole for 64bit PCI bars, we can >> just map them above the main memory. The hole for 32bit PCI bars can be >> enlarged for guests with less than 3.5 GB of memory. > > Why pass in a PCI IO range through fw_cfg if SeaBIOS can figure out an > acceptable range from the amount of memory in the machine? Suggestions on how to update the pci host bridge windows in the dsdt then? cheers, Gerd