From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([208.118.235.92]:36422)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <afaerber@suse.de>) id 1STBai-00028u-3C
	for qemu-devel@nongnu.org; Sat, 12 May 2012 08:38:33 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <afaerber@suse.de>) id 1STBag-0003AQ-D8
	for qemu-devel@nongnu.org; Sat, 12 May 2012 08:38:31 -0400
Received: from cantor2.suse.de ([195.135.220.15]:35148 helo=mx2.suse.de)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <afaerber@suse.de>) id 1STBag-0003AM-6f
	for qemu-devel@nongnu.org; Sat, 12 May 2012 08:38:30 -0400
Message-ID: <4FAE59BF.4020908@suse.de>
Date: Sat, 12 May 2012 14:38:23 +0200
From: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= <afaerber@suse.de>
MIME-Version: 1.0
References: <cover.1336811825.git.atar4qemu@gmail.com>
	<d874d7a29c7cb99cebf0bfc3a14615630f51e5e6.1336811825.git.atar4qemu@gmail.com>
	<4FAE4FE7.1040905@suse.de>
	<CAAu8pHvqknn0_7vzbGP2V4J6O52KO=Mtecq-K4vassZ0EF6MYg@mail.gmail.com>
In-Reply-To: <CAAu8pHvqknn0_7vzbGP2V4J6O52KO=Mtecq-K4vassZ0EF6MYg@mail.gmail.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: quoted-printable
Subject: Re: [Qemu-devel] [PATCH 4/4,
 master+QEMU 1.1] sun4u: implement interrupt clearing registers
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Blue Swirl <blauwirbel@gmail.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>, qemu-devel@nongnu.org, Artyom Tarasenko <atar4qemu@gmail.com>

Am 12.05.2012 14:32, schrieb Blue Swirl:
> On Sat, May 12, 2012 at 11:56 AM, Andreas F=C3=A4rber <afaerber@suse.de=
> wrote:
>> Am 12.05.2012 11:15, schrieb Artyom Tarasenko:
>>> Implement registers for clearing OBIO and PCI interrupts
>>>
>>> Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
>>
>> Implementing new registers is a feature, not a 1.1 bugfix...
>> Many of us would like to get patches committed and have to wait.
>=20
> Those 12 trivial lines in Sparc64 specific code won't destabilize
> anything. Two wrongs do not make one right, but several non-bug fix
> patches have been committed since start of hard freeze. Including
> yours.

Which do you mean? You have not applied nor reviewed my pending sparc
patches (and I don't expect you to apply them). I've only supplied
bugfix and cleanup patches for 1.1 that I'm aware of.

Andreas

--=20
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=C3=BCrnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imend=C3=B6rffer; HRB 16746 AG N=C3=BC=
rnberg