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Date: Tue, 15 May 2012 18:50:58 +0200
From: Fabien Chouteau <chouteau@adacore.com>
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Subject: Re: [Qemu-devel] [PATCH 3/4] ppc: booke206: use MAV=2.0 TSIZE
 definition, fix 4G pages
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To: Scott Wood <scottwood@freescale.com>
Cc: Alexander Graf <agraf@suse.de>, qemu-devel@nongnu.org

On 05/15/2012 05:28 PM, Scott Wood wrote:
> On 05/09/2012 05:54 AM, Fabien Chouteau wrote:
>> On 05/07/2012 06:28 PM, Alexander Graf wrote:
>>> Hi Fabien,
>>>
>>> Could you please elaborate a bit on the case that broke for you with these? The patches shouldn't change any guest facing behavior :o.
>>>
>>>
>>
>> My bad,
>>
>> The problem comes from my initialization of tlb entries at board reset.
>> I use MAS1_TSIZE_SHIFT:
>>
>>     size = 0x1 << MAS1_TSIZE_SHIFT; /* 4 KBytes */
>>
>> but since the definition as changed, the value is incorrect. It should
>> be:
>>
>>     size = 0x10 << MAS1_TSIZE_SHIFT; /* 4 KBytes */
> 
> You should be using booke206_bytes_to_tsize(), or perhaps create some
> #defines for the various tsizes.
> 

Do you mean booke206_page_size_to_tlb()?

BTW, this function is defined locally twice and with different
implementations.

hw/ppce500_mpc8544ds.c:176:static inline target_phys_addr_t booke206_page_size_to_tlb(uint64_t size)
hw/ppce500_mpc8544ds.c-177-{
hw/ppce500_mpc8544ds.c-178-    return ffs(size >> 10) - 1;
hw/ppce500_mpc8544ds.c-179-}
--
hw/ppce500_spin.c:71:static inline target_phys_addr_t booke206_page_size_to_tlb(uint64_t size)
hw/ppce500_spin.c-72-{
hw/ppce500_spin.c-73-    return (ffs(size >> 10) - 1) >> 1;
hw/ppce500_spin.c-74-}

-- 
Fabien Chouteau