[Qemu-devel] [PATCH qom-next 00/22] ARM: QOM cpu_reset() followups

[Qemu-devel] [PATCH qom-next 00/22] ARM: QOM cpu_reset() followups

[Andreas Färber]

Hello Peter,

Following up on your remark about ugly naming as a consequence of my CPU reset
patches and my OMAP field rename, here's a few more patches.

Patch 1 is spelling fixes in a comment and could be pulled into 1.1.

Patches 2-7 fix some more naming ugliness that I missed when running
 because they were just "cpu->cpu". Again, fix by
using "mpu" rather than "cpu".

Patches 8-19 are what I had in mind with my choice of variable placement in
the reset series. They clean up expressions in some targets, at the same time
incur changes to other targets which would be needed for wiring up the CPU
later anyway.

Patches 20-22 are preparations cherry-picked from QOM CPUState part 4, which
I'm including here since you indicated there might be a conflict with cp15 or
qemu-linaro work.

Please ack and indicate which merge order you would prefer.

Regards,
Andreas

Cc: Peter Maydell <peter.maydell@linaro.org>

Andreas Färber (22):
  arm_boot: Fix typos in comment
  omap_sx1: Rename omap_mpu_state_s variable
  palm: Rename omap_mpu_state_s variable
  mainstone: Rename PXA2xxState variable
  spitz: Rename PXA2xxState variable
  tosa: Rename PXA2xxState variable
  z2: Rename PXA2xxState variable
  strongarm: Use cpu_arm_init() to store ARMCPU in StrongARMState
  integratorcp: Use cpu_arm_init() to obtain ARMCPU
  musicpal: Use cpu_arm_init() to obtain ARMCPU
  versatilepb: Use cpu_arm_init() to obtain ARMCPU
  xilinx_zynq: Use cpu_arm_init() to obtain ARMCPU
  arm_boot: Pass ARMCPU to arm_boot_info::write_secondary_boot()
  arm_boot: Pass ARMCPU to arm_boot_info::secondary_cpu_reset_hook()
  arm_boot: Pass ARMCPU to arm_load_kernel()
  realview: Use cpu_arm_init() to obtain ARMCPU
  vexpress: Use cpu_arm_init() to obtain ARMCPU
  exynos4210: Use cpu_arm_init() to store ARMCPU
  arm_pic: Pass ARMCPU to arm_pic_init_cpu()
  pxa2xx: Pass ARMCPU to pxa2xx_pic_init()
  pxa2xx_pic: Store ARMCPU in PXA2xxPICState
  pxa2xx_gpio: Store ARMCPU in PXA2xxGPIOInfo

 hw/arm-misc.h       |   12 ++++++------
 hw/arm_boot.c       |   14 ++++++++------
 hw/arm_pic.c        |    8 +++++---
 hw/armv7m.c         |    2 +-
 hw/collie.c         |    2 +-
 hw/exynos4210.c     |    9 +++++----
 hw/exynos4210.h     |    4 ++--
 hw/exynos4_boards.c |    4 ++--
 hw/highbank.c       |   13 +++++++------
 hw/integratorcp.c   |   14 ++++++++------
 hw/mainstone.c      |   16 ++++++++--------
 hw/musicpal.c       |   10 +++++-----
 hw/nseries.c        |    2 +-
 hw/omap1.c          |    2 +-
 hw/omap2.c          |    2 +-
 hw/omap_sx1.c       |    6 +++---
 hw/palm.c           |   12 ++++++------
 hw/pxa.h            |    2 +-
 hw/pxa2xx.c         |    4 ++--
 hw/pxa2xx_gpio.c    |    9 +++++----
 hw/pxa2xx_pic.c     |   32 ++++++++++++++++++--------------
 hw/realview.c       |   12 +++++++-----
 hw/spitz.c          |   24 ++++++++++++------------
 hw/strongarm.c      |    6 +++---
 hw/strongarm.h      |    2 +-
 hw/tosa.c           |   14 +++++++-------
 hw/versatilepb.c    |   13 +++++++------
 hw/vexpress.c       |   18 +++++++++---------
 hw/xilinx_zynq.c    |   10 +++++-----
 hw/z2.c             |   26 +++++++++++++-------------
 30 files changed, 160 insertions(+), 144 deletions(-)

-- 
1.7.7

[Qemu-devel] [PATCH for-1.1 01/22] arm_boot: Fix typos in comment

[Andreas Färber]

mimicing -> mimicking
thei -> the

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/arm-misc.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 2f46e21..5302ee8 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -45,9 +45,9 @@ struct arm_boot_info {
     /* multicore boards that use the default secondary core boot functions
      * can ignore these two function calls. If the default functions won't
      * work, then write_secondary_boot() should write a suitable blob of
-     * code mimicing the secondary CPU startup process used by the board's
+     * code mimicking the secondary CPU startup process used by the board's
      * boot loader/boot ROM code, and secondary_cpu_reset_hook() should
-     * perform any necessary CPU reset handling and set the PC for thei
+     * perform any necessary CPU reset handling and set the PC for the
      * secondary CPUs to point at this boot blob.
      */
     void (*write_secondary_boot)(CPUARMState *env,
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 02/22] omap_sx1: Rename omap_mpu_state_s variable

[Andreas Färber]

Avoid cpu->cpu by using "mpu" as variable name.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/omap_sx1.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c
index c7618c6..b64e1eb 100644
--- a/hw/omap_sx1.c
+++ b/hw/omap_sx1.c
@@ -103,7 +103,7 @@ static void sx1_init(ram_addr_t ram_size,
                 const char *initrd_filename, const char *cpu_model,
                 const int version)
 {
-    struct omap_mpu_state_s *cpu;
+    struct omap_mpu_state_s *mpu;
     MemoryRegion *address_space = get_system_memory();
     MemoryRegion *flash = g_new(MemoryRegion, 1);
     MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
@@ -121,7 +121,7 @@ static void sx1_init(ram_addr_t ram_size,
         flash_size = flash2_size;
     }
 
-    cpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, cpu_model);
+    mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, cpu_model);
 
     /* External Flash (EMIFS) */
     memory_region_init_ram(flash, "omap_sx1.flash0-0", flash_size);
@@ -202,7 +202,7 @@ static void sx1_init(ram_addr_t ram_size,
         sx1_binfo.kernel_filename = kernel_filename;
         sx1_binfo.kernel_cmdline = kernel_cmdline;
         sx1_binfo.initrd_filename = initrd_filename;
-        arm_load_kernel(&cpu->cpu->env, &sx1_binfo);
+        arm_load_kernel(&mpu->cpu->env, &sx1_binfo);
     }
 
     /* TODO: fix next line */
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 03/22] palm: Rename omap_mpu_state_s variable

[Andreas Färber]

Avoid cpu->cpu by using "mpu" as variable name.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/palm.c |   12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/palm.c b/hw/palm.c
index 6d81829..1375b19 100644
--- a/hw/palm.c
+++ b/hw/palm.c
@@ -196,7 +196,7 @@ static void palmte_init(ram_addr_t ram_size,
                 const char *initrd_filename, const char *cpu_model)
 {
     MemoryRegion *address_space_mem = get_system_memory();
-    struct omap_mpu_state_s *cpu;
+    struct omap_mpu_state_s *mpu;
     int flash_size = 0x00800000;
     int sdram_size = palmte_binfo.ram_size;
     static uint32_t cs0val = 0xffffffff;
@@ -208,7 +208,7 @@ static void palmte_init(ram_addr_t ram_size,
     MemoryRegion *flash = g_new(MemoryRegion, 1);
     MemoryRegion *cs = g_new(MemoryRegion, 4);
 
-    cpu = omap310_mpu_init(address_space_mem, sdram_size, cpu_model);
+    mpu = omap310_mpu_init(address_space_mem, sdram_size, cpu_model);
 
     /* External Flash (EMIFS) */
     memory_region_init_ram(flash, "palmte.flash", flash_size);
@@ -230,11 +230,11 @@ static void palmte_init(ram_addr_t ram_size,
                           OMAP_CS3_SIZE);
     memory_region_add_subregion(address_space_mem, OMAP_CS3_BASE, &cs[3]);
 
-    palmte_microwire_setup(cpu);
+    palmte_microwire_setup(mpu);
 
-    qemu_add_kbd_event_handler(palmte_button_event, cpu);
+    qemu_add_kbd_event_handler(palmte_button_event, mpu);
 
-    palmte_gpio_setup(cpu);
+    palmte_gpio_setup(mpu);
 
     /* Setup initial (reset) machine state */
     if (nb_option_roms) {
@@ -265,7 +265,7 @@ static void palmte_init(ram_addr_t ram_size,
         palmte_binfo.kernel_filename = kernel_filename;
         palmte_binfo.kernel_cmdline = kernel_cmdline;
         palmte_binfo.initrd_filename = initrd_filename;
-        arm_load_kernel(&cpu->cpu->env, &palmte_binfo);
+        arm_load_kernel(&mpu->cpu->env, &palmte_binfo);
     }
 
     /* FIXME: We shouldn't really be doing this here.  The LCD controller
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 04/22] mainstone: Rename PXA2xxState variable

[Andreas Färber]

Avoid cpu->cpu by using "mpu" as variable name.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/mainstone.c |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/hw/mainstone.c b/hw/mainstone.c
index 00a8adc..17c68f6 100644
--- a/hw/mainstone.c
+++ b/hw/mainstone.c
@@ -102,7 +102,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
 {
     uint32_t sector_len = 256 * 1024;
     target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
-    PXA2xxState *cpu;
+    PXA2xxState *mpu;
     DeviceState *mst_irq;
     DriveInfo *dinfo;
     int i;
@@ -113,7 +113,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
         cpu_model = "pxa270-c5";
 
     /* Setup CPU & memory */
-    cpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
+    mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
     memory_region_init_ram(rom, "mainstone.rom", MAINSTONE_ROM);
     vmstate_register_ram_global(rom);
     memory_region_set_readonly(rom, true);
@@ -145,19 +145,19 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
     }
 
     mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS,
-                    qdev_get_gpio_in(cpu->gpio, 0));
+                    qdev_get_gpio_in(mpu->gpio, 0));
 
     /* setup keypad */
     printf("map addr %p\n", &map);
-    pxa27x_register_keypad(cpu->kp, map, 0xe0);
+    pxa27x_register_keypad(mpu->kp, map, 0xe0);
 
     /* MMC/SD host */
-    pxa2xx_mmci_handlers(cpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ));
+    pxa2xx_mmci_handlers(mpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ));
 
-    pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
+    pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[0],
             qdev_get_gpio_in(mst_irq, S0_IRQ),
             qdev_get_gpio_in(mst_irq, S0_CD_IRQ));
-    pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
+    pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[1],
             qdev_get_gpio_in(mst_irq, S1_IRQ),
             qdev_get_gpio_in(mst_irq, S1_CD_IRQ));
 
@@ -168,7 +168,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
     mainstone_binfo.kernel_cmdline = kernel_cmdline;
     mainstone_binfo.initrd_filename = initrd_filename;
     mainstone_binfo.board_id = arm_id;
-    arm_load_kernel(&cpu->cpu->env, &mainstone_binfo);
+    arm_load_kernel(&mpu->cpu->env, &mainstone_binfo);
 }
 
 static void mainstone_init(ram_addr_t ram_size,
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 05/22] spitz: Rename PXA2xxState variable

[Andreas Färber]

Avoid cpu->cpu by using "mpu" as variable name.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/spitz.c |   24 ++++++++++++------------
 1 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/hw/spitz.c b/hw/spitz.c
index 9042d44..d320633 100644
--- a/hw/spitz.c
+++ b/hw/spitz.c
@@ -884,7 +884,7 @@ static void spitz_common_init(ram_addr_t ram_size,
                 const char *kernel_cmdline, const char *initrd_filename,
                 const char *cpu_model, enum spitz_model_e model, int arm_id)
 {
-    PXA2xxState *cpu;
+    PXA2xxState *mpu;
     DeviceState *scp0, *scp1 = NULL;
     MemoryRegion *address_space_mem = get_system_memory();
     MemoryRegion *rom = g_new(MemoryRegion, 1);
@@ -893,9 +893,9 @@ static void spitz_common_init(ram_addr_t ram_size,
         cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
 
     /* Setup CPU & memory */
-    cpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
+    mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
 
-    sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
+    sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 
     memory_region_init_ram(rom, "spitz.rom", SPITZ_ROM);
     vmstate_register_ram_global(rom);
@@ -903,36 +903,36 @@ static void spitz_common_init(ram_addr_t ram_size,
     memory_region_add_subregion(address_space_mem, 0, rom);
 
     /* Setup peripherals */
-    spitz_keyboard_register(cpu);
+    spitz_keyboard_register(mpu);
 
-    spitz_ssp_attach(cpu);
+    spitz_ssp_attach(mpu);
 
     scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
     if (model != akita) {
         scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
     }
 
-    spitz_scoop_gpio_setup(cpu, scp0, scp1);
+    spitz_scoop_gpio_setup(mpu, scp0, scp1);
 
-    spitz_gpio_setup(cpu, (model == akita) ? 1 : 2);
+    spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
 
-    spitz_i2c_setup(cpu);
+    spitz_i2c_setup(mpu);
 
     if (model == akita)
-        spitz_akita_i2c_setup(cpu);
+        spitz_akita_i2c_setup(mpu);
 
     if (model == terrier)
         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
-        spitz_microdrive_attach(cpu, 1);
+        spitz_microdrive_attach(mpu, 1);
     else if (model != akita)
         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
-        spitz_microdrive_attach(cpu, 0);
+        spitz_microdrive_attach(mpu, 0);
 
     spitz_binfo.kernel_filename = kernel_filename;
     spitz_binfo.kernel_cmdline = kernel_cmdline;
     spitz_binfo.initrd_filename = initrd_filename;
     spitz_binfo.board_id = arm_id;
-    arm_load_kernel(&cpu->cpu->env, &spitz_binfo);
+    arm_load_kernel(&mpu->cpu->env, &spitz_binfo);
     sl_bootparam_write(SL_PXA_PARAM_BASE);
 }
 
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 06/22] tosa: Rename PXA2xxState variable

[Andreas Färber]

Avoid cpu->cpu by using "mpu" as variable name.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/tosa.c |   14 +++++++-------
 1 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/hw/tosa.c b/hw/tosa.c
index d1ede8d..8bae80d 100644
--- a/hw/tosa.c
+++ b/hw/tosa.c
@@ -212,14 +212,14 @@ static void tosa_init(ram_addr_t ram_size,
 {
     MemoryRegion *address_space_mem = get_system_memory();
     MemoryRegion *rom = g_new(MemoryRegion, 1);
-    PXA2xxState *cpu;
+    PXA2xxState *mpu;
     TC6393xbState *tmio;
     DeviceState *scp0, *scp1;
 
     if (!cpu_model)
         cpu_model = "pxa255";
 
-    cpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
+    mpu = pxa255_init(address_space_mem, tosa_binfo.ram_size);
 
     memory_region_init_ram(rom, "tosa.rom", TOSA_ROM);
     vmstate_register_ram_global(rom);
@@ -227,22 +227,22 @@ static void tosa_init(ram_addr_t ram_size,
     memory_region_add_subregion(address_space_mem, 0, rom);
 
     tmio = tc6393xb_init(address_space_mem, 0x10000000,
-            qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_TC6393XB_INT));
+            qdev_get_gpio_in(mpu->gpio, TOSA_GPIO_TC6393XB_INT));
 
     scp0 = sysbus_create_simple("scoop", 0x08800000, NULL);
     scp1 = sysbus_create_simple("scoop", 0x14800040, NULL);
 
-    tosa_gpio_setup(cpu, scp0, scp1, tmio);
+    tosa_gpio_setup(mpu, scp0, scp1, tmio);
 
-    tosa_microdrive_attach(cpu);
+    tosa_microdrive_attach(mpu);
 
-    tosa_tg_init(cpu);
+    tosa_tg_init(mpu);
 
     tosa_binfo.kernel_filename = kernel_filename;
     tosa_binfo.kernel_cmdline = kernel_cmdline;
     tosa_binfo.initrd_filename = initrd_filename;
     tosa_binfo.board_id = 0x208;
-    arm_load_kernel(&cpu->cpu->env, &tosa_binfo);
+    arm_load_kernel(&mpu->cpu->env, &tosa_binfo);
     sl_bootparam_write(SL_PXA_PARAM_BASE);
 }
 
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 07/22] z2: Rename PXA2xxState variable

[Andreas Färber]

Avoid cpu->cpu by using "mpu" as variable name.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/z2.c |   26 +++++++++++++-------------
 1 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/hw/z2.c b/hw/z2.c
index 9dd83ff..db25cdc 100644
--- a/hw/z2.c
+++ b/hw/z2.c
@@ -301,7 +301,7 @@ static void z2_init(ram_addr_t ram_size,
 {
     MemoryRegion *address_space_mem = get_system_memory();
     uint32_t sector_len = 0x10000;
-    PXA2xxState *cpu;
+    PXA2xxState *mpu;
     DriveInfo *dinfo;
     int be;
     void *z2_lcd;
@@ -313,7 +313,7 @@ static void z2_init(ram_addr_t ram_size,
     }
 
     /* Setup CPU & memory */
-    cpu = pxa270_init(address_space_mem, z2_binfo.ram_size, cpu_model);
+    mpu = pxa270_init(address_space_mem, z2_binfo.ram_size, cpu_model);
 
 #ifdef TARGET_WORDS_BIGENDIAN
     be = 1;
@@ -337,25 +337,25 @@ static void z2_init(ram_addr_t ram_size,
     }
 
     /* setup keypad */
-    pxa27x_register_keypad(cpu->kp, map, 0x100);
+    pxa27x_register_keypad(mpu->kp, map, 0x100);
 
     /* MMC/SD host */
-    pxa2xx_mmci_handlers(cpu->mmc,
+    pxa2xx_mmci_handlers(mpu->mmc,
         NULL,
-        qdev_get_gpio_in(cpu->gpio, Z2_GPIO_SD_DETECT));
+        qdev_get_gpio_in(mpu->gpio, Z2_GPIO_SD_DETECT));
 
     type_register_static(&zipit_lcd_info);
     type_register_static(&aer915_info);
-    z2_lcd = ssi_create_slave(cpu->ssp[1], "zipit-lcd");
-    bus = pxa2xx_i2c_bus(cpu->i2c[0]);
+    z2_lcd = ssi_create_slave(mpu->ssp[1], "zipit-lcd");
+    bus = pxa2xx_i2c_bus(mpu->i2c[0]);
     i2c_create_slave(bus, "aer915", 0x55);
     wm = i2c_create_slave(bus, "wm8750", 0x1b);
-    cpu->i2s->opaque = wm;
-    cpu->i2s->codec_out = wm8750_dac_dat;
-    cpu->i2s->codec_in = wm8750_adc_dat;
-    wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
+    mpu->i2s->opaque = wm;
+    mpu->i2s->codec_out = wm8750_dac_dat;
+    mpu->i2s->codec_in = wm8750_adc_dat;
+    wm8750_data_req_set(wm, mpu->i2s->data_req, mpu->i2s);
 
-    qdev_connect_gpio_out(cpu->gpio, Z2_GPIO_LCD_CS,
+    qdev_connect_gpio_out(mpu->gpio, Z2_GPIO_LCD_CS,
         qemu_allocate_irqs(z2_lcd_cs, z2_lcd, 1)[0]);
 
     if (kernel_filename) {
@@ -363,7 +363,7 @@ static void z2_init(ram_addr_t ram_size,
         z2_binfo.kernel_cmdline = kernel_cmdline;
         z2_binfo.initrd_filename = initrd_filename;
         z2_binfo.board_id = 0x6dd;
-        arm_load_kernel(&cpu->cpu->env, &z2_binfo);
+        arm_load_kernel(&mpu->cpu->env, &z2_binfo);
     }
 }
 
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 08/22] strongarm: Use cpu_arm_init() to store ARMCPU in StrongARMState

[Andreas Färber]

Adapt collie accordingly.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/collie.c    |    2 +-
 hw/strongarm.c |    6 +++---
 hw/strongarm.h |    2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/collie.c b/hw/collie.c
index 42f4310..e6f8dbf 100644
--- a/hw/collie.c
+++ b/hw/collie.c
@@ -54,7 +54,7 @@ static void collie_init(ram_addr_t ram_size,
     collie_binfo.kernel_cmdline = kernel_cmdline;
     collie_binfo.initrd_filename = initrd_filename;
     collie_binfo.board_id = 0x208;
-    arm_load_kernel(s->env, &collie_binfo);
+    arm_load_kernel(&s->cpu->env, &collie_binfo);
 }
 
 static QEMUMachine collie_machine = {
diff --git a/hw/strongarm.c b/hw/strongarm.c
index 1b15f39..38b1d0c 100644
--- a/hw/strongarm.c
+++ b/hw/strongarm.c
@@ -1563,9 +1563,9 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
         exit(1);
     }
 
-    s->env = cpu_init(rev);
+    s->cpu = cpu_arm_init(rev);
 
-    if (!s->env) {
+    if (!s->cpu) {
         error_report("Unable to find CPU definition");
         exit(1);
     }
@@ -1574,7 +1574,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
     vmstate_register_ram_global(&s->sdram);
     memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);
 
-    pic = arm_pic_init_cpu(s->env);
+    pic = arm_pic_init_cpu(&s->cpu->env);
     s->pic = sysbus_create_varargs("strongarm_pic", 0x90050000,
                     pic[ARM_PIC_CPU_IRQ], pic[ARM_PIC_CPU_FIQ], NULL);
 
diff --git a/hw/strongarm.h b/hw/strongarm.h
index 02acac3..d30dd6a 100644
--- a/hw/strongarm.h
+++ b/hw/strongarm.h
@@ -53,7 +53,7 @@ enum {
 };
 
 typedef struct {
-    CPUARMState *env;
+    ARMCPU *cpu;
     MemoryRegion sdram;
     DeviceState *pic;
     DeviceState *gpio;
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 09/22] integratorcp: Use cpu_arm_init() to obtain ARMCPU

[Andreas Färber]

Needed for arm_load_kernel().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/integratorcp.c |   14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/hw/integratorcp.c b/hw/integratorcp.c
index 9bdb9e6..46fd09d 100644
--- a/hw/integratorcp.c
+++ b/hw/integratorcp.c
@@ -443,7 +443,7 @@ static void integratorcp_init(ram_addr_t ram_size,
                      const char *kernel_filename, const char *kernel_cmdline,
                      const char *initrd_filename, const char *cpu_model)
 {
-    CPUARMState *env;
+    ARMCPU *cpu;
     MemoryRegion *address_space_mem = get_system_memory();
     MemoryRegion *ram = g_new(MemoryRegion, 1);
     MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
@@ -452,13 +452,15 @@ static void integratorcp_init(ram_addr_t ram_size,
     DeviceState *dev;
     int i;
 
-    if (!cpu_model)
+    if (!cpu_model) {
         cpu_model = "arm926";
-    env = cpu_init(cpu_model);
-    if (!env) {
+    }
+    cpu = cpu_arm_init(cpu_model);
+    if (!cpu) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
+
     memory_region_init_ram(ram, "integrator.ram", ram_size);
     vmstate_register_ram_global(ram);
     /* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash.  */
@@ -474,7 +476,7 @@ static void integratorcp_init(ram_addr_t ram_size,
     qdev_init_nofail(dev);
     sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000);
 
-    cpu_pic = arm_pic_init_cpu(env);
+    cpu_pic = arm_pic_init_cpu(&cpu->env);
     dev = sysbus_create_varargs("integrator_pic", 0x14000000,
                                 cpu_pic[ARM_PIC_CPU_IRQ],
                                 cpu_pic[ARM_PIC_CPU_FIQ], NULL);
@@ -500,7 +502,7 @@ static void integratorcp_init(ram_addr_t ram_size,
     integrator_binfo.kernel_filename = kernel_filename;
     integrator_binfo.kernel_cmdline = kernel_cmdline;
     integrator_binfo.initrd_filename = initrd_filename;
-    arm_load_kernel(env, &integrator_binfo);
+    arm_load_kernel(&cpu->env, &integrator_binfo);
 }
 
 static QEMUMachine integratorcp_machine = {
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 10/22] musicpal: Use cpu_arm_init() to obtain ARMCPU

[Andreas Färber]

Needed for arm_load_kernel().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/musicpal.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/musicpal.c b/hw/musicpal.c
index c9f845a..b7fed39 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1513,7 +1513,7 @@ static void musicpal_init(ram_addr_t ram_size,
                const char *kernel_filename, const char *kernel_cmdline,
                const char *initrd_filename, const char *cpu_model)
 {
-    CPUARMState *env;
+    ARMCPU *cpu;
     qemu_irq *cpu_pic;
     qemu_irq pic[32];
     DeviceState *dev;
@@ -1533,12 +1533,12 @@ static void musicpal_init(ram_addr_t ram_size,
     if (!cpu_model) {
         cpu_model = "arm926";
     }
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_arm_init(cpu_model);
+    if (!cpu) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
-    cpu_pic = arm_pic_init_cpu(env);
+    cpu_pic = arm_pic_init_cpu(&cpu->env);
 
     /* For now we use a fixed - the original - RAM size */
     memory_region_init_ram(ram, "musicpal.ram", MP_RAM_DEFAULT_SIZE);
@@ -1651,7 +1651,7 @@ static void musicpal_init(ram_addr_t ram_size,
     musicpal_binfo.kernel_filename = kernel_filename;
     musicpal_binfo.kernel_cmdline = kernel_cmdline;
     musicpal_binfo.initrd_filename = initrd_filename;
-    arm_load_kernel(env, &musicpal_binfo);
+    arm_load_kernel(&cpu->env, &musicpal_binfo);
 }
 
 static QEMUMachine musicpal_machine = {
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 11/22] versatilepb: Use cpu_arm_init() to obtain ARMCPU

[Andreas Färber]

Needed for arm_load_kernel().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/versatilepb.c |   13 +++++++------
 1 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/hw/versatilepb.c b/hw/versatilepb.c
index 7c79c54..d567af9 100644
--- a/hw/versatilepb.c
+++ b/hw/versatilepb.c
@@ -173,7 +173,7 @@ static void versatile_init(ram_addr_t ram_size,
                      const char *initrd_filename, const char *cpu_model,
                      int board_id)
 {
-    CPUARMState *env;
+    ARMCPU *cpu;
     MemoryRegion *sysmem = get_system_memory();
     MemoryRegion *ram = g_new(MemoryRegion, 1);
     qemu_irq *cpu_pic;
@@ -189,10 +189,11 @@ static void versatile_init(ram_addr_t ram_size,
     int done_smc = 0;
     DriveInfo *dinfo;
 
-    if (!cpu_model)
+    if (!cpu_model) {
         cpu_model = "arm926";
-    env = cpu_init(cpu_model);
-    if (!env) {
+    }
+    cpu = cpu_arm_init(cpu_model);
+    if (!cpu) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
@@ -208,7 +209,7 @@ static void versatile_init(ram_addr_t ram_size,
     qdev_init_nofail(sysctl);
     sysbus_mmio_map(sysbus_from_qdev(sysctl), 0, 0x10000000);
 
-    cpu_pic = arm_pic_init_cpu(env);
+    cpu_pic = arm_pic_init_cpu(&cpu->env);
     dev = sysbus_create_varargs("pl190", 0x10140000,
                                 cpu_pic[0], cpu_pic[1], NULL);
     for (n = 0; n < 32; n++) {
@@ -338,7 +339,7 @@ static void versatile_init(ram_addr_t ram_size,
     versatile_binfo.kernel_cmdline = kernel_cmdline;
     versatile_binfo.initrd_filename = initrd_filename;
     versatile_binfo.board_id = board_id;
-    arm_load_kernel(env, &versatile_binfo);
+    arm_load_kernel(&cpu->env, &versatile_binfo);
 }
 
 static void vpb_init(ram_addr_t ram_size,
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 12/22] xilinx_zynq: Use cpu_arm_init() to obtain ARMCPU

[Andreas Färber]

The board initializes only one CPU, so replace first_cpu with that CPU's
state to facilitate review of arm_load_kernel() signature change and to
avoid double casts then.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/xilinx_zynq.c |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 7290c64..007b4a6 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -50,7 +50,7 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
                         const char *kernel_filename, const char *kernel_cmdline,
                         const char *initrd_filename, const char *cpu_model)
 {
-    CPUARMState *env = NULL;
+    ARMCPU *cpu;
     MemoryRegion *address_space_mem = get_system_memory();
     MemoryRegion *ext_ram = g_new(MemoryRegion, 1);
     MemoryRegion *ocm_ram = g_new(MemoryRegion, 1);
@@ -66,12 +66,12 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
         cpu_model = "cortex-a9";
     }
 
-    env = cpu_init(cpu_model);
-    if (!env) {
+    cpu = cpu_arm_init(cpu_model);
+    if (!cpu) {
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
-    irqp = arm_pic_init_cpu(env);
+    irqp = arm_pic_init_cpu(&cpu->env);
     cpu_irq = irqp[ARM_PIC_CPU_IRQ];
 
     /* max 2GB ram */
@@ -137,7 +137,7 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
     zynq_binfo.nb_cpus = 1;
     zynq_binfo.board_id = 0xd32;
     zynq_binfo.loader_start = 0;
-    arm_load_kernel(first_cpu, &zynq_binfo);
+    arm_load_kernel(&cpu->env, &zynq_binfo);
 }
 
 static QEMUMachine zynq_machine = {
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 13/22] arm_boot: Pass ARMCPU to arm_boot_info::write_secondary_boot()

[Andreas Färber]

Adapt exynos4210 and highbank accordingly.
The parameter itself is unused.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/arm-misc.h   |    2 +-
 hw/arm_boot.c   |    6 +++---
 hw/exynos4210.c |    2 +-
 hw/exynos4210.h |    2 +-
 hw/highbank.c   |    2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 5302ee8..d877f80 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -50,7 +50,7 @@ struct arm_boot_info {
      * perform any necessary CPU reset handling and set the PC for the
      * secondary CPUs to point at this boot blob.
      */
-    void (*write_secondary_boot)(CPUARMState *env,
+    void (*write_secondary_boot)(ARMCPU *cpu,
                                  const struct arm_boot_info *info);
     void (*secondary_cpu_reset_hook)(CPUARMState *env,
                                      const struct arm_boot_info *info);
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index eb2d176..4955f01 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -59,7 +59,7 @@ static uint32_t smpboot[] = {
   0           /* bootreg: Boot register address is held here */
 };
 
-static void default_write_secondary(CPUARMState *env,
+static void default_write_secondary(ARMCPU *cpu,
                                     const struct arm_boot_info *info)
 {
     int n;
@@ -303,7 +303,7 @@ static void do_cpu_reset(void *opaque)
 
 void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
 {
-    ARMCPU *cpu;
+    ARMCPU *cpu = arm_env_get_cpu(env);
     int kernel_size;
     int initrd_size;
     int n;
@@ -402,7 +402,7 @@ void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
         rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
                            info->loader_start);
         if (info->nb_cpus > 1) {
-            info->write_secondary_boot(env, info);
+            info->write_secondary_boot(cpu, info);
         }
     }
     info->is_linux = is_linux;
diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index afc4bdc..ae53837 100644
--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@@ -65,7 +65,7 @@
 static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
                                     0x09, 0x00, 0x00, 0x00 };
 
-void exynos4210_write_secondary(CPUARMState *env,
+void exynos4210_write_secondary(ARMCPU *cpu,
         const struct arm_boot_info *info)
 {
     int n;
diff --git a/hw/exynos4210.h b/hw/exynos4210.h
index f7c7027..b520676 100644
--- a/hw/exynos4210.h
+++ b/hw/exynos4210.h
@@ -97,7 +97,7 @@ typedef struct Exynos4210State {
     MemoryRegion bootreg_mem;
 } Exynos4210State;
 
-void exynos4210_write_secondary(CPUARMState *env,
+void exynos4210_write_secondary(ARMCPU *cpu,
         const struct arm_boot_info *info);
 
 Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
diff --git a/hw/highbank.c b/hw/highbank.c
index 4d6d728..45ca1ad 100644
--- a/hw/highbank.c
+++ b/hw/highbank.c
@@ -36,7 +36,7 @@
 
 /* Board init.  */
 
-static void hb_write_secondary(CPUARMState *env, const struct arm_boot_info *info)
+static void hb_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
 {
     int n;
     uint32_t smpboot[] = {
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 14/22] arm_boot: Pass ARMCPU to arm_boot_info::secondary_cpu_reset_hook()

[Andreas Färber]

Adapt highbank accordingly.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/arm-misc.h |    2 +-
 hw/arm_boot.c |    6 ++++--
 hw/highbank.c |    4 +++-
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index d877f80..fb1e23b 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -52,7 +52,7 @@ struct arm_boot_info {
      */
     void (*write_secondary_boot)(ARMCPU *cpu,
                                  const struct arm_boot_info *info);
-    void (*secondary_cpu_reset_hook)(CPUARMState *env,
+    void (*secondary_cpu_reset_hook)(ARMCPU *cpu,
                                      const struct arm_boot_info *info);
     /* Used internally by arm_boot.c */
     int is_linux;
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index 4955f01..8eabfb2 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -72,9 +72,11 @@ static void default_write_secondary(ARMCPU *cpu,
                        info->smp_loader_start);
 }
 
-static void default_reset_secondary(CPUARMState *env,
+static void default_reset_secondary(ARMCPU *cpu,
                                     const struct arm_boot_info *info)
 {
+    CPUARMState *env = &cpu->env;
+
     stl_phys_notdirty(info->smp_bootreg_addr, 0);
     env->regs[15] = info->smp_loader_start;
 }
@@ -295,7 +297,7 @@ static void do_cpu_reset(void *opaque)
                     }
                 }
             } else {
-                info->secondary_cpu_reset_hook(env, info);
+                info->secondary_cpu_reset_hook(cpu, info);
             }
         }
     }
diff --git a/hw/highbank.c b/hw/highbank.c
index 45ca1ad..66ff042 100644
--- a/hw/highbank.c
+++ b/hw/highbank.c
@@ -60,8 +60,10 @@ static void hb_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
     rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot), SMP_BOOT_ADDR);
 }
 
-static void hb_reset_secondary(CPUARMState *env, const struct arm_boot_info *info)
+static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
 {
+    CPUARMState *env = &cpu->env;
+
     switch (info->nb_cpus) {
     case 4:
         stl_phys_notdirty(SMP_BOOT_REG + 0x30, 0);
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 15/22] arm_boot: Pass ARMCPU to arm_load_kernel()

[Andreas Färber]

In particular this simplifies the &s->mpu->cpu->env expression again.

first_cpu and ->next_cpu are expected to be QOM'ified later.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/arm-misc.h       |    2 +-
 hw/arm_boot.c       |    4 ++--
 hw/collie.c         |    2 +-
 hw/exynos4_boards.c |    4 ++--
 hw/highbank.c       |    2 +-
 hw/integratorcp.c   |    2 +-
 hw/mainstone.c      |    2 +-
 hw/musicpal.c       |    2 +-
 hw/nseries.c        |    2 +-
 hw/omap_sx1.c       |    2 +-
 hw/palm.c           |    2 +-
 hw/realview.c       |    2 +-
 hw/spitz.c          |    2 +-
 hw/tosa.c           |    2 +-
 hw/versatilepb.c    |    2 +-
 hw/vexpress.c       |    2 +-
 hw/xilinx_zynq.c    |    2 +-
 hw/z2.c             |    2 +-
 18 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index fb1e23b..85fd0e6 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -59,7 +59,7 @@ struct arm_boot_info {
     target_phys_addr_t initrd_size;
     target_phys_addr_t entry;
 };
-void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info);
+void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info);
 
 /* Multiplication factor to convert from system clock ticks to qemu timer
    ticks.  */
diff --git a/hw/arm_boot.c b/hw/arm_boot.c
index 8eabfb2..d0e643b 100644
--- a/hw/arm_boot.c
+++ b/hw/arm_boot.c
@@ -303,9 +303,9 @@ static void do_cpu_reset(void *opaque)
     }
 }
 
-void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info)
+void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
 {
-    ARMCPU *cpu = arm_env_get_cpu(env);
+    CPUARMState *env = &cpu->env;
     int kernel_size;
     int initrd_size;
     int n;
diff --git a/hw/collie.c b/hw/collie.c
index e6f8dbf..56f89a9 100644
--- a/hw/collie.c
+++ b/hw/collie.c
@@ -54,7 +54,7 @@ static void collie_init(ram_addr_t ram_size,
     collie_binfo.kernel_cmdline = kernel_cmdline;
     collie_binfo.initrd_filename = initrd_filename;
     collie_binfo.board_id = 0x208;
-    arm_load_kernel(&s->cpu->env, &collie_binfo);
+    arm_load_kernel(s->cpu, &collie_binfo);
 }
 
 static QEMUMachine collie_machine = {
diff --git a/hw/exynos4_boards.c b/hw/exynos4_boards.c
index ea32c51..e5c2a5f 100644
--- a/hw/exynos4_boards.c
+++ b/hw/exynos4_boards.c
@@ -138,7 +138,7 @@ static void nuri_init(ram_addr_t ram_size,
     exynos4_boards_init_common(kernel_filename, kernel_cmdline,
                 initrd_filename, EXYNOS4_BOARD_NURI);
 
-    arm_load_kernel(first_cpu, &exynos4_board_binfo);
+    arm_load_kernel(arm_env_get_cpu(first_cpu), &exynos4_board_binfo);
 }
 
 static void smdkc210_init(ram_addr_t ram_size,
@@ -151,7 +151,7 @@ static void smdkc210_init(ram_addr_t ram_size,
 
     lan9215_init(SMDK_LAN9118_BASE_ADDR,
             qemu_irq_invert(s->irq_table[exynos4210_get_irq(37, 1)]));
-    arm_load_kernel(first_cpu, &exynos4_board_binfo);
+    arm_load_kernel(arm_env_get_cpu(first_cpu), &exynos4_board_binfo);
 }
 
 static QEMUMachine exynos4_machines[EXYNOS4_NUM_OF_BOARDS] = {
diff --git a/hw/highbank.c b/hw/highbank.c
index 66ff042..a3901b0 100644
--- a/hw/highbank.c
+++ b/hw/highbank.c
@@ -318,7 +318,7 @@ static void highbank_init(ram_addr_t ram_size,
     highbank_binfo.loader_start = 0;
     highbank_binfo.write_secondary_boot = hb_write_secondary;
     highbank_binfo.secondary_cpu_reset_hook = hb_reset_secondary;
-    arm_load_kernel(first_cpu, &highbank_binfo);
+    arm_load_kernel(arm_env_get_cpu(first_cpu), &highbank_binfo);
 }
 
 static QEMUMachine highbank_machine = {
diff --git a/hw/integratorcp.c b/hw/integratorcp.c
index 46fd09d..e927012 100644
--- a/hw/integratorcp.c
+++ b/hw/integratorcp.c
@@ -502,7 +502,7 @@ static void integratorcp_init(ram_addr_t ram_size,
     integrator_binfo.kernel_filename = kernel_filename;
     integrator_binfo.kernel_cmdline = kernel_cmdline;
     integrator_binfo.initrd_filename = initrd_filename;
-    arm_load_kernel(&cpu->env, &integrator_binfo);
+    arm_load_kernel(cpu, &integrator_binfo);
 }
 
 static QEMUMachine integratorcp_machine = {
diff --git a/hw/mainstone.c b/hw/mainstone.c
index 17c68f6..97687b6 100644
--- a/hw/mainstone.c
+++ b/hw/mainstone.c
@@ -168,7 +168,7 @@ static void mainstone_common_init(MemoryRegion *address_space_mem,
     mainstone_binfo.kernel_cmdline = kernel_cmdline;
     mainstone_binfo.initrd_filename = initrd_filename;
     mainstone_binfo.board_id = arm_id;
-    arm_load_kernel(&mpu->cpu->env, &mainstone_binfo);
+    arm_load_kernel(mpu->cpu, &mainstone_binfo);
 }
 
 static void mainstone_init(ram_addr_t ram_size,
diff --git a/hw/musicpal.c b/hw/musicpal.c
index b7fed39..cef847e 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1651,7 +1651,7 @@ static void musicpal_init(ram_addr_t ram_size,
     musicpal_binfo.kernel_filename = kernel_filename;
     musicpal_binfo.kernel_cmdline = kernel_cmdline;
     musicpal_binfo.initrd_filename = initrd_filename;
-    arm_load_kernel(&cpu->env, &musicpal_binfo);
+    arm_load_kernel(cpu, &musicpal_binfo);
 }
 
 static QEMUMachine musicpal_machine = {
diff --git a/hw/nseries.c b/hw/nseries.c
index b199cb9..fcc8546 100644
--- a/hw/nseries.c
+++ b/hw/nseries.c
@@ -1329,7 +1329,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
         binfo->kernel_filename = kernel_filename;
         binfo->kernel_cmdline = kernel_cmdline;
         binfo->initrd_filename = initrd_filename;
-        arm_load_kernel(&s->mpu->cpu->env, binfo);
+        arm_load_kernel(s->mpu->cpu, binfo);
 
         qemu_register_reset(n8x0_boot_init, s);
     }
diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c
index b64e1eb..abca341 100644
--- a/hw/omap_sx1.c
+++ b/hw/omap_sx1.c
@@ -202,7 +202,7 @@ static void sx1_init(ram_addr_t ram_size,
         sx1_binfo.kernel_filename = kernel_filename;
         sx1_binfo.kernel_cmdline = kernel_cmdline;
         sx1_binfo.initrd_filename = initrd_filename;
-        arm_load_kernel(&mpu->cpu->env, &sx1_binfo);
+        arm_load_kernel(mpu->cpu, &sx1_binfo);
     }
 
     /* TODO: fix next line */
diff --git a/hw/palm.c b/hw/palm.c
index 1375b19..bacdc90 100644
--- a/hw/palm.c
+++ b/hw/palm.c
@@ -265,7 +265,7 @@ static void palmte_init(ram_addr_t ram_size,
         palmte_binfo.kernel_filename = kernel_filename;
         palmte_binfo.kernel_cmdline = kernel_cmdline;
         palmte_binfo.initrd_filename = initrd_filename;
-        arm_load_kernel(&mpu->cpu->env, &palmte_binfo);
+        arm_load_kernel(mpu->cpu, &palmte_binfo);
     }
 
     /* FIXME: We shouldn't really be doing this here.  The LCD controller
diff --git a/hw/realview.c b/hw/realview.c
index ecf4701..d60435f 100644
--- a/hw/realview.c
+++ b/hw/realview.c
@@ -325,7 +325,7 @@ static void realview_init(ram_addr_t ram_size,
     realview_binfo.nb_cpus = smp_cpus;
     realview_binfo.board_id = realview_board_id[board_type];
     realview_binfo.loader_start = (board_type == BOARD_PB_A8 ? 0x70000000 : 0);
-    arm_load_kernel(first_cpu, &realview_binfo);
+    arm_load_kernel(arm_env_get_cpu(first_cpu), &realview_binfo);
 }
 
 static void realview_eb_init(ram_addr_t ram_size,
diff --git a/hw/spitz.c b/hw/spitz.c
index d320633..20e7835 100644
--- a/hw/spitz.c
+++ b/hw/spitz.c
@@ -932,7 +932,7 @@ static void spitz_common_init(ram_addr_t ram_size,
     spitz_binfo.kernel_cmdline = kernel_cmdline;
     spitz_binfo.initrd_filename = initrd_filename;
     spitz_binfo.board_id = arm_id;
-    arm_load_kernel(&mpu->cpu->env, &spitz_binfo);
+    arm_load_kernel(mpu->cpu, &spitz_binfo);
     sl_bootparam_write(SL_PXA_PARAM_BASE);
 }
 
diff --git a/hw/tosa.c b/hw/tosa.c
index 8bae80d..297a8c2 100644
--- a/hw/tosa.c
+++ b/hw/tosa.c
@@ -242,7 +242,7 @@ static void tosa_init(ram_addr_t ram_size,
     tosa_binfo.kernel_cmdline = kernel_cmdline;
     tosa_binfo.initrd_filename = initrd_filename;
     tosa_binfo.board_id = 0x208;
-    arm_load_kernel(&mpu->cpu->env, &tosa_binfo);
+    arm_load_kernel(mpu->cpu, &tosa_binfo);
     sl_bootparam_write(SL_PXA_PARAM_BASE);
 }
 
diff --git a/hw/versatilepb.c b/hw/versatilepb.c
index d567af9..ed54fdd 100644
--- a/hw/versatilepb.c
+++ b/hw/versatilepb.c
@@ -339,7 +339,7 @@ static void versatile_init(ram_addr_t ram_size,
     versatile_binfo.kernel_cmdline = kernel_cmdline;
     versatile_binfo.initrd_filename = initrd_filename;
     versatile_binfo.board_id = board_id;
-    arm_load_kernel(&cpu->env, &versatile_binfo);
+    arm_load_kernel(cpu, &versatile_binfo);
 }
 
 static void vpb_init(ram_addr_t ram_size,
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 18d87ac..8b0ca42 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -438,7 +438,7 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard,
     vexpress_binfo.smp_loader_start = map[VE_SRAM];
     vexpress_binfo.smp_bootreg_addr = map[VE_SYSREGS] + 0x30;
     vexpress_binfo.gic_cpu_if_addr = daughterboard->gic_cpu_if_addr;
-    arm_load_kernel(first_cpu, &vexpress_binfo);
+    arm_load_kernel(arm_env_get_cpu(first_cpu), &vexpress_binfo);
 }
 
 static void vexpress_a9_init(ram_addr_t ram_size,
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 007b4a6..010e18c 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -137,7 +137,7 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
     zynq_binfo.nb_cpus = 1;
     zynq_binfo.board_id = 0xd32;
     zynq_binfo.loader_start = 0;
-    arm_load_kernel(&cpu->env, &zynq_binfo);
+    arm_load_kernel(cpu, &zynq_binfo);
 }
 
 static QEMUMachine zynq_machine = {
diff --git a/hw/z2.c b/hw/z2.c
index db25cdc..289cee9 100644
--- a/hw/z2.c
+++ b/hw/z2.c
@@ -363,7 +363,7 @@ static void z2_init(ram_addr_t ram_size,
         z2_binfo.kernel_cmdline = kernel_cmdline;
         z2_binfo.initrd_filename = initrd_filename;
         z2_binfo.board_id = 0x6dd;
-        arm_load_kernel(&mpu->cpu->env, &z2_binfo);
+        arm_load_kernel(mpu->cpu, &z2_binfo);
     }
 }
 
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 16/22] realview: Use cpu_arm_init() to obtain ARMCPU

[Andreas Färber]

Needed for arm_pic_init_cpu().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/realview.c |   10 ++++++----
 1 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/hw/realview.c b/hw/realview.c
index d60435f..38085f1 100644
--- a/hw/realview.c
+++ b/hw/realview.c
@@ -50,7 +50,8 @@ static void realview_init(ram_addr_t ram_size,
                      const char *initrd_filename, const char *cpu_model,
                      enum realview_board_type board_type)
 {
-    CPUARMState *env = NULL;
+    ARMCPU *cpu = NULL;
+    CPUARMState *env;
     MemoryRegion *sysmem = get_system_memory();
     MemoryRegion *ram_lo = g_new(MemoryRegion, 1);
     MemoryRegion *ram_hi = g_new(MemoryRegion, 1);
@@ -88,14 +89,15 @@ static void realview_init(ram_addr_t ram_size,
         break;
     }
     for (n = 0; n < smp_cpus; n++) {
-        env = cpu_init(cpu_model);
-        if (!env) {
+        cpu = cpu_arm_init(cpu_model);
+        if (!cpu) {
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
-        irqp = arm_pic_init_cpu(env);
+        irqp = arm_pic_init_cpu(&cpu->env);
         cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
     }
+    env = &cpu->env;
     if (arm_feature(env, ARM_FEATURE_V7)) {
         if (is_mpcore) {
             proc_id = 0x0c000000;
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 17/22] vexpress: Use cpu_arm_init() to obtain ARMCPU

[Andreas Färber]

Needed for arm_pic_init_cpu().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/vexpress.c |   16 ++++++++--------
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/hw/vexpress.c b/hw/vexpress.c
index 8b0ca42..4797c6a 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -159,7 +159,6 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
                                   const char *cpu_model,
                                   qemu_irq *pic, uint32_t *proc_id)
 {
-    CPUARMState *env = NULL;
     MemoryRegion *sysmem = get_system_memory();
     MemoryRegion *ram = g_new(MemoryRegion, 1);
     MemoryRegion *lowram = g_new(MemoryRegion, 1);
@@ -177,12 +176,12 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
     *proc_id = 0x0c000191;
 
     for (n = 0; n < smp_cpus; n++) {
-        env = cpu_init(cpu_model);
-        if (!env) {
+        ARMCPU *cpu = cpu_arm_init(cpu_model);
+        if (!cpu) {
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
-        irqp = arm_pic_init_cpu(env);
+        irqp = arm_pic_init_cpu(&cpu->env);
         cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
     }
 
@@ -259,7 +258,6 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
                                    qemu_irq *pic, uint32_t *proc_id)
 {
     int n;
-    CPUARMState *env = NULL;
     MemoryRegion *sysmem = get_system_memory();
     MemoryRegion *ram = g_new(MemoryRegion, 1);
     MemoryRegion *sram = g_new(MemoryRegion, 1);
@@ -274,13 +272,15 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
     *proc_id = 0x14000217;
 
     for (n = 0; n < smp_cpus; n++) {
+        ARMCPU *cpu;
         qemu_irq *irqp;
-        env = cpu_init(cpu_model);
-        if (!env) {
+
+        cpu = cpu_arm_init(cpu_model);
+        if (!cpu) {
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
-        irqp = arm_pic_init_cpu(env);
+        irqp = arm_pic_init_cpu(&cpu->env);
         cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
     }
 
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 18/22] exynos4210: Use cpu_arm_init() to store ARMCPU

[Andreas Färber]

Needed for arm_pic_init_cpu().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/exynos4210.c |    6 +++---
 hw/exynos4210.h |    2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index ae53837..7dc3787 100644
--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@@ -107,13 +107,13 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
     SysBusDevice *busdev;
 
     for (n = 0; n < EXYNOS4210_NCPUS; n++) {
-        s->env[n] = cpu_init("cortex-a9");
-        if (!s->env[n]) {
+        s->cpu[n] = cpu_arm_init("cortex-a9");
+        if (!s->cpu[n]) {
             fprintf(stderr, "Unable to find CPU %d definition\n", n);
             exit(1);
         }
         /* Create PIC controller for each processor instance */
-        irqp = arm_pic_init_cpu(s->env[n]);
+        irqp = arm_pic_init_cpu(&s->cpu[n]->env);
 
         /*
          * Get GICs gpio_in cpu_irq to connect a combiner to them later.
diff --git a/hw/exynos4210.h b/hw/exynos4210.h
index b520676..b1b4609 100644
--- a/hw/exynos4210.h
+++ b/hw/exynos4210.h
@@ -83,7 +83,7 @@ typedef struct Exynos4210Irq {
 } Exynos4210Irq;
 
 typedef struct Exynos4210State {
-    CPUARMState * env[EXYNOS4210_NCPUS];
+    ARMCPU *cpu[EXYNOS4210_NCPUS];
     Exynos4210Irq irqs;
     qemu_irq *irq_table;
 
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 19/22] arm_pic: Pass ARMCPU to arm_pic_init_cpu()

[Andreas Färber]

Pass it through to arm_pic_cpu_handler().

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/arm-misc.h     |    2 +-
 hw/arm_pic.c      |    8 +++++---
 hw/armv7m.c       |    2 +-
 hw/exynos4210.c   |    3 ++-
 hw/highbank.c     |    5 ++---
 hw/integratorcp.c |    2 +-
 hw/musicpal.c     |    2 +-
 hw/omap1.c        |    2 +-
 hw/omap2.c        |    2 +-
 hw/realview.c     |    2 +-
 hw/strongarm.c    |    2 +-
 hw/versatilepb.c  |    2 +-
 hw/vexpress.c     |    4 ++--
 hw/xilinx_zynq.c  |    2 +-
 14 files changed, 21 insertions(+), 19 deletions(-)

diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 85fd0e6..1f96229 100644
--- a/hw/arm-misc.h
+++ b/hw/arm-misc.h
@@ -16,7 +16,7 @@
 /* The CPU is also modeled as an interrupt controller.  */
 #define ARM_PIC_CPU_IRQ 0
 #define ARM_PIC_CPU_FIQ 1
-qemu_irq *arm_pic_init_cpu(CPUARMState *env);
+qemu_irq *arm_pic_init_cpu(ARMCPU *cpu);
 
 /* armv7m.c */
 qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
diff --git a/hw/arm_pic.c b/hw/arm_pic.c
index 1094965..ffb4d41 100644
--- a/hw/arm_pic.c
+++ b/hw/arm_pic.c
@@ -13,7 +13,9 @@
 /* Input 0 is IRQ and input 1 is FIQ.  */
 static void arm_pic_cpu_handler(void *opaque, int irq, int level)
 {
-    CPUARMState *env = (CPUARMState *)opaque;
+    ARMCPU *cpu = opaque;
+    CPUARMState *env = &cpu->env;
+
     switch (irq) {
     case ARM_PIC_CPU_IRQ:
         if (level)
@@ -32,7 +34,7 @@ static void arm_pic_cpu_handler(void *opaque, int irq, int level)
     }
 }
 
-qemu_irq *arm_pic_init_cpu(CPUARMState *env)
+qemu_irq *arm_pic_init_cpu(ARMCPU *cpu)
 {
-    return qemu_allocate_irqs(arm_pic_cpu_handler, env, 2);
+    return qemu_allocate_irqs(arm_pic_cpu_handler, cpu, 2);
 }
diff --git a/hw/armv7m.c b/hw/armv7m.c
index 418139a..8cec78d 100644
--- a/hw/armv7m.c
+++ b/hw/armv7m.c
@@ -215,7 +215,7 @@ qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
     nvic = qdev_create(NULL, "armv7m_nvic");
     env->nvic = nvic;
     qdev_init_nofail(nvic);
-    cpu_pic = arm_pic_init_cpu(env);
+    cpu_pic = arm_pic_init_cpu(cpu);
     sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
     for (i = 0; i < 64; i++) {
         pic[i] = qdev_get_gpio_in(nvic, i);
diff --git a/hw/exynos4210.c b/hw/exynos4210.c
index 7dc3787..dd14d01 100644
--- a/hw/exynos4210.c
+++ b/hw/exynos4210.c
@@ -112,8 +112,9 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
             fprintf(stderr, "Unable to find CPU %d definition\n", n);
             exit(1);
         }
+
         /* Create PIC controller for each processor instance */
-        irqp = arm_pic_init_cpu(&s->cpu[n]->env);
+        irqp = arm_pic_init_cpu(s->cpu[n]);
 
         /*
          * Get GICs gpio_in cpu_irq to connect a combiner to them later.
diff --git a/hw/highbank.c b/hw/highbank.c
index a3901b0..4bdea5d 100644
--- a/hw/highbank.c
+++ b/hw/highbank.c
@@ -192,7 +192,6 @@ static void highbank_init(ram_addr_t ram_size,
                      const char *kernel_filename, const char *kernel_cmdline,
                      const char *initrd_filename, const char *cpu_model)
 {
-    CPUARMState *env = NULL;
     DeviceState *dev;
     SysBusDevice *busdev;
     qemu_irq *irqp;
@@ -215,10 +214,10 @@ static void highbank_init(ram_addr_t ram_size,
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
-        env = &cpu->env;
+
         /* This will become a QOM property eventually */
         cpu->reset_cbar = GIC_BASE_ADDR;
-        irqp = arm_pic_init_cpu(env);
+        irqp = arm_pic_init_cpu(cpu);
         cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
     }
 
diff --git a/hw/integratorcp.c b/hw/integratorcp.c
index e927012..deacbf4 100644
--- a/hw/integratorcp.c
+++ b/hw/integratorcp.c
@@ -476,7 +476,7 @@ static void integratorcp_init(ram_addr_t ram_size,
     qdev_init_nofail(dev);
     sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000);
 
-    cpu_pic = arm_pic_init_cpu(&cpu->env);
+    cpu_pic = arm_pic_init_cpu(cpu);
     dev = sysbus_create_varargs("integrator_pic", 0x14000000,
                                 cpu_pic[ARM_PIC_CPU_IRQ],
                                 cpu_pic[ARM_PIC_CPU_FIQ], NULL);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index cef847e..f14f20d 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1538,7 +1538,7 @@ static void musicpal_init(ram_addr_t ram_size,
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
-    cpu_pic = arm_pic_init_cpu(&cpu->env);
+    cpu_pic = arm_pic_init_cpu(cpu);
 
     /* For now we use a fixed - the original - RAM size */
     memory_region_init_ram(ram, "musicpal.ram", MP_RAM_DEFAULT_SIZE);
diff --git a/hw/omap1.c b/hw/omap1.c
index a997d30..ad60cc4 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -3854,7 +3854,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
 
     omap_clkm_init(system_memory, 0xfffece00, 0xe1008000, s);
 
-    cpu_irq = arm_pic_init_cpu(&s->cpu->env);
+    cpu_irq = arm_pic_init_cpu(s->cpu);
     s->ih[0] = qdev_create(NULL, "omap-intc");
     qdev_prop_set_uint32(s->ih[0], "size", 0x100);
     qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck"));
diff --git a/hw/omap2.c b/hw/omap2.c
index 196c4b6..4278dd1 100644
--- a/hw/omap2.c
+++ b/hw/omap2.c
@@ -2277,7 +2277,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
     s->l4 = omap_l4_init(sysmem, OMAP2_L4_BASE, 54);
 
     /* Actually mapped at any 2K boundary in the ARM11 private-peripheral if */
-    cpu_irq = arm_pic_init_cpu(&s->cpu->env);
+    cpu_irq = arm_pic_init_cpu(s->cpu);
     s->ih[0] = qdev_create(NULL, "omap2-intc");
     qdev_prop_set_uint8(s->ih[0], "revision", 0x21);
     qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk"));
diff --git a/hw/realview.c b/hw/realview.c
index 38085f1..19db4d0 100644
--- a/hw/realview.c
+++ b/hw/realview.c
@@ -94,7 +94,7 @@ static void realview_init(ram_addr_t ram_size,
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
-        irqp = arm_pic_init_cpu(&cpu->env);
+        irqp = arm_pic_init_cpu(cpu);
         cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
     }
     env = &cpu->env;
diff --git a/hw/strongarm.c b/hw/strongarm.c
index 38b1d0c..7150eeb 100644
--- a/hw/strongarm.c
+++ b/hw/strongarm.c
@@ -1574,7 +1574,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
     vmstate_register_ram_global(&s->sdram);
     memory_region_add_subregion(sysmem, SA_SDCS0, &s->sdram);
 
-    pic = arm_pic_init_cpu(&s->cpu->env);
+    pic = arm_pic_init_cpu(s->cpu);
     s->pic = sysbus_create_varargs("strongarm_pic", 0x90050000,
                     pic[ARM_PIC_CPU_IRQ], pic[ARM_PIC_CPU_FIQ], NULL);
 
diff --git a/hw/versatilepb.c b/hw/versatilepb.c
index ed54fdd..4fd5d9b 100644
--- a/hw/versatilepb.c
+++ b/hw/versatilepb.c
@@ -209,7 +209,7 @@ static void versatile_init(ram_addr_t ram_size,
     qdev_init_nofail(sysctl);
     sysbus_mmio_map(sysbus_from_qdev(sysctl), 0, 0x10000000);
 
-    cpu_pic = arm_pic_init_cpu(&cpu->env);
+    cpu_pic = arm_pic_init_cpu(cpu);
     dev = sysbus_create_varargs("pl190", 0x10140000,
                                 cpu_pic[0], cpu_pic[1], NULL);
     for (n = 0; n < 32; n++) {
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 4797c6a..8072c5a 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -181,7 +181,7 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
-        irqp = arm_pic_init_cpu(&cpu->env);
+        irqp = arm_pic_init_cpu(cpu);
         cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
     }
 
@@ -280,7 +280,7 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
             fprintf(stderr, "Unable to find CPU definition\n");
             exit(1);
         }
-        irqp = arm_pic_init_cpu(&cpu->env);
+        irqp = arm_pic_init_cpu(cpu);
         cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ];
     }
 
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 010e18c..aa786f9 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -71,7 +71,7 @@ static void zynq_init(ram_addr_t ram_size, const char *boot_device,
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
-    irqp = arm_pic_init_cpu(&cpu->env);
+    irqp = arm_pic_init_cpu(cpu);
     cpu_irq = irqp[ARM_PIC_CPU_IRQ];
 
     /* max 2GB ram */
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 20/22] pxa2xx: Pass ARMCPU to pxa2xx_pic_init()

[Andreas Färber]

Cleans up after storing ARMCPU in PXA2xxState.
Prepares for storing ARMCPU in PXA2xxPICState.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/pxa.h        |    2 +-
 hw/pxa2xx.c     |    4 ++--
 hw/pxa2xx_pic.c |    3 ++-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/hw/pxa.h b/hw/pxa.h
index 2be006d..6a21205 100644
--- a/hw/pxa.h
+++ b/hw/pxa.h
@@ -65,7 +65,7 @@
 # define PXA2XX_INTERNAL_SIZE	0x40000
 
 /* pxa2xx_pic.c */
-DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUARMState *env);
+DeviceState *pxa2xx_pic_init(target_phys_addr_t base, ARMCPU *cpu);
 
 /* pxa2xx_gpio.c */
 DeviceState *pxa2xx_gpio_init(target_phys_addr_t base,
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 5f8f226..7958d14 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -2081,7 +2081,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space,
     memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
                                 &s->internal);
 
-    s->pic = pxa2xx_pic_init(0x40d00000, &s->cpu->env);
+    s->pic = pxa2xx_pic_init(0x40d00000, s->cpu);
 
     s->dma = pxa27x_dma_init(0x40000000,
                     qdev_get_gpio_in(s->pic, PXA2XX_PIC_DMA));
@@ -2213,7 +2213,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
     memory_region_add_subregion(address_space, PXA2XX_INTERNAL_BASE,
                                 &s->internal);
 
-    s->pic = pxa2xx_pic_init(0x40d00000, &s->cpu->env);
+    s->pic = pxa2xx_pic_init(0x40d00000, s->cpu);
 
     s->dma = pxa255_dma_init(0x40000000,
                     qdev_get_gpio_in(s->pic, PXA2XX_PIC_DMA));
diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c
index a806b80..255cc3f 100644
--- a/hw/pxa2xx_pic.c
+++ b/hw/pxa2xx_pic.c
@@ -245,8 +245,9 @@ static int pxa2xx_pic_post_load(void *opaque, int version_id)
     return 0;
 }
 
-DeviceState *pxa2xx_pic_init(target_phys_addr_t base, CPUARMState *env)
+DeviceState *pxa2xx_pic_init(target_phys_addr_t base, ARMCPU *cpu)
 {
+    CPUARMState *env = &cpu->env;
     DeviceState *dev = qdev_create(NULL, "pxa2xx_pic");
     PXA2xxPICState *s = FROM_SYSBUS(PXA2xxPICState, sysbus_from_qdev(dev));
 
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 21/22] pxa2xx_pic: Store ARMCPU in PXA2xxPICState

[Andreas Färber]

Prepares for moving halted field to CPUState.

Add missing braces.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/pxa2xx_pic.c |   29 ++++++++++++++++-------------
 1 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c
index 255cc3f..c560133 100644
--- a/hw/pxa2xx_pic.c
+++ b/hw/pxa2xx_pic.c
@@ -34,7 +34,7 @@
 typedef struct {
     SysBusDevice busdev;
     MemoryRegion iomem;
-    CPUARMState *cpu_env;
+    ARMCPU *cpu;
     uint32_t int_enabled[2];
     uint32_t int_pending[2];
     uint32_t is_fiq[2];
@@ -47,25 +47,28 @@ static void pxa2xx_pic_update(void *opaque)
     uint32_t mask[2];
     PXA2xxPICState *s = (PXA2xxPICState *) opaque;
 
-    if (s->cpu_env->halted) {
+    if (s->cpu->env.halted) {
         mask[0] = s->int_pending[0] & (s->int_enabled[0] | s->int_idle);
         mask[1] = s->int_pending[1] & (s->int_enabled[1] | s->int_idle);
-        if (mask[0] || mask[1])
-            cpu_interrupt(s->cpu_env, CPU_INTERRUPT_EXITTB);
+        if (mask[0] || mask[1]) {
+            cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_EXITTB);
+        }
     }
 
     mask[0] = s->int_pending[0] & s->int_enabled[0];
     mask[1] = s->int_pending[1] & s->int_enabled[1];
 
-    if ((mask[0] & s->is_fiq[0]) || (mask[1] & s->is_fiq[1]))
-        cpu_interrupt(s->cpu_env, CPU_INTERRUPT_FIQ);
-    else
-        cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_FIQ);
+    if ((mask[0] & s->is_fiq[0]) || (mask[1] & s->is_fiq[1])) {
+        cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_FIQ);
+    } else {
+        cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_FIQ);
+    }
 
-    if ((mask[0] & ~s->is_fiq[0]) || (mask[1] & ~s->is_fiq[1]))
-        cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
-    else
-        cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
+    if ((mask[0] & ~s->is_fiq[0]) || (mask[1] & ~s->is_fiq[1])) {
+        cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD);
+    } else {
+        cpu_reset_interrupt(&s->cpu->env, CPU_INTERRUPT_HARD);
+    }
 }
 
 /* Note: Here level means state of the signal on a pin, not
@@ -251,7 +254,7 @@ DeviceState *pxa2xx_pic_init(target_phys_addr_t base, ARMCPU *cpu)
     DeviceState *dev = qdev_create(NULL, "pxa2xx_pic");
     PXA2xxPICState *s = FROM_SYSBUS(PXA2xxPICState, sysbus_from_qdev(dev));
 
-    s->cpu_env = env;
+    s->cpu = cpu;
 
     s->int_pending[0] = 0;
     s->int_pending[1] = 0;
-- 
1.7.7

[Qemu-devel] [PATCH qom-next 22/22] pxa2xx_gpio: Store ARMCPU in PXA2xxGPIOInfo

[Andreas Färber]

Prepares for moving halted field into CPUState.

Add missing braces.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 hw/pxa2xx_gpio.c |    9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c
index 09a408b..3c90c9c 100644
--- a/hw/pxa2xx_gpio.c
+++ b/hw/pxa2xx_gpio.c
@@ -20,7 +20,7 @@ struct PXA2xxGPIOInfo {
     qemu_irq irq0, irq1, irqX;
     int lines;
     int ncpu;
-    CPUARMState *cpu_env;
+    ARMCPU *cpu;
 
     /* XXX: GNU C vectors are more suitable */
     uint32_t ilevel[PXA2XX_GPIO_BANKS];
@@ -118,8 +118,9 @@ static void pxa2xx_gpio_set(void *opaque, int line, int level)
         pxa2xx_gpio_irq_update(s);
 
     /* Wake-up GPIOs */
-    if (s->cpu_env->halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank]))
-        cpu_interrupt(s->cpu_env, CPU_INTERRUPT_EXITTB);
+    if (s->cpu->env.halted && (mask & ~s->dir[bank] & pxa2xx_gpio_wake[bank])) {
+        cpu_interrupt(&s->cpu->env, CPU_INTERRUPT_EXITTB);
+    }
 }
 
 static void pxa2xx_gpio_handler_update(PXA2xxGPIOInfo *s) {
@@ -275,7 +276,7 @@ static int pxa2xx_gpio_initfn(SysBusDevice *dev)
 
     s = FROM_SYSBUS(PXA2xxGPIOInfo, dev);
 
-    s->cpu_env = qemu_get_cpu(s->ncpu);
+    s->cpu = arm_env_get_cpu(qemu_get_cpu(s->ncpu));
 
     qdev_init_gpio_in(&dev->qdev, pxa2xx_gpio_set, s->lines);
     qdev_init_gpio_out(&dev->qdev, s->handler, s->lines);
-- 
1.7.7

Re: [Qemu-devel] [PATCH for-1.1 01/22] arm_boot: Fix typos in comment

[Stefan Weil]

Am 14.05.2012 19:31, schrieb Andreas Färber:
> mimicing ->  mimicking
> thei ->  the
>
> Signed-off-by: Andreas Färber<afaerber@suse.de>
> ---
>   hw/arm-misc.h |    4 ++--
>   1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/arm-misc.h b/hw/arm-misc.h
> index 2f46e21..5302ee8 100644
> --- a/hw/arm-misc.h
> +++ b/hw/arm-misc.h
> @@ -45,9 +45,9 @@ struct arm_boot_info {
>       /* multicore boards that use the default secondary core boot functions
>        * can ignore these two function calls. If the default functions won't
>        * work, then write_secondary_boot() should write a suitable blob of
> -     * code mimicing the secondary CPU startup process used by the board's
> +     * code mimicking the secondary CPU startup process used by the board's
>        * boot loader/boot ROM code, and secondary_cpu_reset_hook() should
> -     * perform any necessary CPU reset handling and set the PC for thei
> +     * perform any necessary CPU reset handling and set the PC for the
>        * secondary CPUs to point at this boot blob.
>        */
>       void (*write_secondary_boot)(CPUARMState *env,
>    

Reviewed-by: Stefan Weil <sw@weilnetz.de>

Re: [Qemu-devel] [PATCH qom-next 12/22] xilinx_zynq: Use cpu_arm_init() to obtain ARMCPU

[Peter Maydell]

On 14 May 2012 18:31, Andreas Färber <afaerber@suse.de> wrote:
> The board initializes only one CPU, so replace first_cpu with that CPU's
> state to facilitate review of arm_load_kernel() signature change and to
> avoid double casts then.

There was a patch proposed to add SMP support to this board:
http://lists.gnu.org/archive/html/qemu-devel/2012-04/msg00047.html

I dunno whether that changes the best thing to do in this patch.

-- PMM

Re: [Qemu-devel] [PATCH qom-next 00/22] ARM: QOM cpu_reset() followups

[Peter Maydell]

On 14 May 2012 18:31, Andreas Färber <afaerber@suse.de> wrote:
> Following up on your remark about ugly naming as a consequence of my CPU reset
> patches and my OMAP field rename, here's a few more patches.
>
> Patch 1 is spelling fixes in a comment and could be pulled into 1.1.
>
> Patches 2-7 fix some more naming ugliness that I missed when running
>  because they were just "cpu->cpu". Again, fix by
> using "mpu" rather than "cpu".
>
> Patches 8-19 are what I had in mind with my choice of variable placement in
> the reset series. They clean up expressions in some targets, at the same time
> incur changes to other targets which would be needed for wiring up the CPU
> later anyway.
>
> Patches 20-22 are preparations cherry-picked from QOM CPUState part 4, which
> I'm including here since you indicated there might be a conflict with cp15 or
> qemu-linaro work.
>
> Please ack and indicate which merge order you would prefer.

Series
Acked-by: Peter Maydell <peter.maydell@linaro.org>
(although note my remark about the Zynq board change).

You might want to look at whether the pxa2xx changes conflict with the
cp15 series I just posted. Other than not wanting to have to respin
that series, I don't much care about merge order.

thanks
-- PMM

Re: [Qemu-devel] [PATCH qom-next 00/22] ARM: QOM cpu_reset() followups

[Igor Mitsyanko]

On 05/14/2012 09:31 PM, Andreas Färber wrote:
> Hello Peter,
>
> Following up on your remark about ugly naming as a consequence of my CPU reset
> patches and my OMAP field rename, here's a few more patches.
>
> Patch 1 is spelling fixes in a comment and could be pulled into 1.1.
>
> Patches 2-7 fix some more naming ugliness that I missed when running
>   because they were just "cpu->cpu". Again, fix by
> using "mpu" rather than "cpu".
>
> Patches 8-19 are what I had in mind with my choice of variable placement in
> the reset series. They clean up expressions in some targets, at the same time
> incur changes to other targets which would be needed for wiring up the CPU
> later anyway.
>
> Patches 20-22 are preparations cherry-picked from QOM CPUState part 4, which
> I'm including here since you indicated there might be a conflict with cp15 or
> qemu-linaro work.
>
> Please ack and indicate which merge order you would prefer.
>
> Regards,
> Andreas
>
> Cc: Peter Maydell<peter.maydell@linaro.org>
>
> Andreas Färber (22):
>    arm_boot: Fix typos in comment
>    omap_sx1: Rename omap_mpu_state_s variable
>    palm: Rename omap_mpu_state_s variable
>    mainstone: Rename PXA2xxState variable
>    spitz: Rename PXA2xxState variable
>    tosa: Rename PXA2xxState variable
>    z2: Rename PXA2xxState variable
>    strongarm: Use cpu_arm_init() to store ARMCPU in StrongARMState
>    integratorcp: Use cpu_arm_init() to obtain ARMCPU
>    musicpal: Use cpu_arm_init() to obtain ARMCPU
>    versatilepb: Use cpu_arm_init() to obtain ARMCPU
>    xilinx_zynq: Use cpu_arm_init() to obtain ARMCPU
>    arm_boot: Pass ARMCPU to arm_boot_info::write_secondary_boot()
>    arm_boot: Pass ARMCPU to arm_boot_info::secondary_cpu_reset_hook()
>    arm_boot: Pass ARMCPU to arm_load_kernel()
>    realview: Use cpu_arm_init() to obtain ARMCPU
>    vexpress: Use cpu_arm_init() to obtain ARMCPU
>    exynos4210: Use cpu_arm_init() to store ARMCPU
>    arm_pic: Pass ARMCPU to arm_pic_init_cpu()
>    pxa2xx: Pass ARMCPU to pxa2xx_pic_init()
>    pxa2xx_pic: Store ARMCPU in PXA2xxPICState
>    pxa2xx_gpio: Store ARMCPU in PXA2xxGPIOInfo
>
>   hw/arm-misc.h       |   12 ++++++------
>   hw/arm_boot.c       |   14 ++++++++------
>   hw/arm_pic.c        |    8 +++++---
>   hw/armv7m.c         |    2 +-
>   hw/collie.c         |    2 +-
>   hw/exynos4210.c     |    9 +++++----
>   hw/exynos4210.h     |    4 ++--
>   hw/exynos4_boards.c |    4 ++--
>   hw/highbank.c       |   13 +++++++------
>   hw/integratorcp.c   |   14 ++++++++------
>   hw/mainstone.c      |   16 ++++++++--------
>   hw/musicpal.c       |   10 +++++-----
>   hw/nseries.c        |    2 +-
>   hw/omap1.c          |    2 +-
>   hw/omap2.c          |    2 +-
>   hw/omap_sx1.c       |    6 +++---
>   hw/palm.c           |   12 ++++++------
>   hw/pxa.h            |    2 +-
>   hw/pxa2xx.c         |    4 ++--
>   hw/pxa2xx_gpio.c    |    9 +++++----
>   hw/pxa2xx_pic.c     |   32 ++++++++++++++++++--------------
>   hw/realview.c       |   12 +++++++-----
>   hw/spitz.c          |   24 ++++++++++++------------
>   hw/strongarm.c      |    6 +++---
>   hw/strongarm.h      |    2 +-
>   hw/tosa.c           |   14 +++++++-------
>   hw/versatilepb.c    |   13 +++++++------
>   hw/vexpress.c       |   18 +++++++++---------
>   hw/xilinx_zynq.c    |   10 +++++-----
>   hw/z2.c             |   26 +++++++++++++-------------
>   30 files changed, 160 insertions(+), 144 deletions(-)
>

Nice, works fine. Exynos part:

Acked-by: Igor Mitsyanko <i.mitsyanko@samsung.com>

-- 
Mitsyanko Igor
ASWG, Moscow R&D center, Samsung Electronics
email: i.mitsyanko@samsung.com

Re: [Qemu-devel] [PATCH qom-next 12/22] xilinx_zynq: Use cpu_arm_init() to obtain ARMCPU

[Andreas Färber]

Am 15.05.2012 13:08, schrieb Peter Maydell:
> On 14 May 2012 18:31, Andreas Färber <afaerber@suse.de> wrote:
>> The board initializes only one CPU, so replace first_cpu with that CPU's
>> state to facilitate review of arm_load_kernel() signature change and to
>> avoid double casts then.
> 
> There was a patch proposed to add SMP support to this board:
> http://lists.gnu.org/archive/html/qemu-devel/2012-04/msg00047.html
> 
> I dunno whether that changes the best thing to do in this patch.

Thanks for pointing me to this. From what I see that series has open
issues and was not applied to target-arm.next yet, right? In that case I
can't rebase my patches on top of it, but I get that touching first_cpu
here is not a good idea for SMP.

I'll apply the preceding patches and will respin with
arm_env_get_cpu(first_cpu) in 15/22.

Andreas


-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH qom-next 00/22] ARM: QOM cpu_reset() followups

[Andreas Färber]

Am 15.05.2012 13:14, schrieb Peter Maydell:
> On 14 May 2012 18:31, Andreas Färber <afaerber@suse.de> wrote:
>> Following up on your remark about ugly naming as a consequence of my CPU reset
>> patches and my OMAP field rename, here's a few more patches.
>>
>> Patch 1 is spelling fixes in a comment and could be pulled into 1.1.
>>
>> Patches 2-7 fix some more naming ugliness that I missed when running
>>  because they were just "cpu->cpu". Again, fix by
>> using "mpu" rather than "cpu".
>>
>> Patches 8-19 are what I had in mind with my choice of variable placement in
>> the reset series. They clean up expressions in some targets, at the same time
>> incur changes to other targets which would be needed for wiring up the CPU
>> later anyway.
>>
>> Patches 20-22 are preparations cherry-picked from QOM CPUState part 4, which
>> I'm including here since you indicated there might be a conflict with cp15 or
>> qemu-linaro work.
>>
>> Please ack and indicate which merge order you would prefer.
> 
> Series
> Acked-by: Peter Maydell <peter.maydell@linaro.org>
> (although note my remark about the Zynq board change).

Thanks, applied 2-11, 13-14, 16-18 to minimize v2.

Patch 1 is irrelevant to my refactorings so I'd ask you, Peter, to queue
it in case some other ARM patch for 1.1 comes along.

Andreas

> You might want to look at whether the pxa2xx changes conflict with the
> cp15 series I just posted. Other than not wanting to have to respin
> that series, I don't much care about merge order.
> 
> thanks
> -- PMM

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH qom-next 00/22] ARM: QOM cpu_reset() followups

[Peter Maydell]

On 18 May 2012 13:13, Andreas Färber <afaerber@suse.de> wrote:
> Patch 1 is irrelevant to my refactorings so I'd ask you, Peter, to queue
> it in case some other ARM patch for 1.1 comes along.

I would not at this point put patch 1 in for 1.1 even if there was
some other target-arm patch that caused me to have to do a pullreq
for 1.1 -- it's not a necessary change (even if it's an obviously
safe one) and we're only two weeks from release.

-- PMM

Re: [Qemu-devel] [PATCH qom-next 00/22] ARM: QOM cpu_reset() followups

[Andreas Färber]

Am 18.05.2012 14:13, schrieb Andreas Färber:
> Am 15.05.2012 13:14, schrieb Peter Maydell:
>> On 14 May 2012 18:31, Andreas Färber <afaerber@suse.de> wrote:
>>> Following up on your remark about ugly naming as a consequence of my CPU reset
>>> patches and my OMAP field rename, here's a few more patches.
>>>
>>> Patch 1 is spelling fixes in a comment and could be pulled into 1.1.
>>>
>>> Patches 2-7 fix some more naming ugliness that I missed when running
>>>  because they were just "cpu->cpu". Again, fix by
>>> using "mpu" rather than "cpu".
>>>
>>> Patches 8-19 are what I had in mind with my choice of variable placement in
>>> the reset series. They clean up expressions in some targets, at the same time
>>> incur changes to other targets which would be needed for wiring up the CPU
>>> later anyway.
>>>
>>> Patches 20-22 are preparations cherry-picked from QOM CPUState part 4, which
>>> I'm including here since you indicated there might be a conflict with cp15 or
>>> qemu-linaro work.
>>>
>>> Please ack and indicate which merge order you would prefer.
>>
>> Series
>> Acked-by: Peter Maydell <peter.maydell@linaro.org>
>> (although note my remark about the Zynq board change).
> 
> Thanks, applied 2-11, 13-14, 16-18 to minimize v2.

After checking against the cp15 series I've also applied 20-22.

/-F

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg