From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44920) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SW6ee-0007A5-Nz for qemu-devel@nongnu.org; Sun, 20 May 2012 09:58:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SW6ec-0004N8-KS for qemu-devel@nongnu.org; Sun, 20 May 2012 09:58:40 -0400 Message-ID: <4FB8F883.4070606@suse.de> Date: Sun, 20 May 2012 15:58:27 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1337381637-24776-1-git-send-email-agraf@suse.de> In-Reply-To: <1337381637-24776-1-git-send-email-agraf@suse.de> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] PPC: mpc8544ds: Span initial TLB entry over as much RAM as we need List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: qemu-ppc , qemu-devel Developers , Stuart Yoder Am 19.05.2012 00:53, schrieb Alexander Graf: > The initial TLB entry is supposed to help us run the guest -kernel payl= oad. > This means the guest needs to be able to access its own memory, the ini= trd > memory and the device tree. >=20 > So far we only statically reserved a TLB entry from [0;256M[. This patc= h > fixes it to span from [0;dt_end[, allowing the guest payload to access > everything initially. >=20 > Reported-by: Stuart Yoder > Signed-off-by: Alexander Graf > --- > hw/ppce500_mpc8544ds.c | 41 +++++++++++++++++++++++++++-------------= - > 1 files changed, 27 insertions(+), 14 deletions(-) >=20 > diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c > index f1dfbe1..42a63aa 100644 > --- a/hw/ppce500_mpc8544ds.c > +++ b/hw/ppce500_mpc8544ds.c > @@ -31,6 +31,7 @@ > #include "elf.h" > #include "sysbus.h" > #include "exec-memory.h" > +#include "host-utils.h" > =20 > #define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb" > #define UIMAGE_LOAD_BASE 0 > @@ -55,6 +56,7 @@ > struct boot_info > { > uint32_t dt_base; > + uint32_t dt_size; > uint32_t entry; > }; > =20 > @@ -164,7 +166,11 @@ static int mpc8544_load_device_tree(CPUPPCState *e= nv, > } > =20 > ret =3D rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size,= addr); > + if (ret < 0) { > + goto out; > + } > g_free(fdt); > + ret =3D fdt_size; > =20 > out: > #endif > @@ -172,23 +178,27 @@ out: > return ret; > } > =20 > -/* Create -kernel TLB entries for BookE, linearly spanning 256MB. */ > +/* Create -kernel TLB entries for BookE. */ > static inline target_phys_addr_t booke206_page_size_to_tlb(uint64_t si= ze) > { > - return ffs(size >> 10) - 1; > + return 63 - clz64(size >> 10); > } > =20 > -static void mmubooke_create_initial_mapping(CPUPPCState *env, > - target_ulong va, > - target_phys_addr_t pa) > +static void mmubooke_create_initial_mapping(CPUPPCState *env) > { > + struct boot_info *bi =3D env->load_info; > ppcmas_tlb_t *tlb =3D booke206_get_tlbm(env, 1, 0, 0); > - target_phys_addr_t size; > - > - size =3D (booke206_page_size_to_tlb(256 * 1024 * 1024) << MAS1_TSI= ZE_SHIFT); > + target_phys_addr_t size, dt_end; > + int ps; > + > + /* Our initial TLB entry needs to cover everything from 0 to > + the device tree top */ > + dt_end =3D bi->dt_base + bi->dt_size; > + ps =3D booke206_page_size_to_tlb(dt_end) + 1; > + size =3D (ps << MAS1_TSIZE_SHIFT); > tlb->mas1 =3D MAS1_VALID | size; > - tlb->mas2 =3D va & TARGET_PAGE_MASK; > - tlb->mas7_3 =3D pa & TARGET_PAGE_MASK; > + tlb->mas2 =3D 0; > + tlb->mas7_3 =3D 0; > tlb->mas7_3 |=3D MAS3_UR | MAS3_UW | MAS3_UX | MAS3_SR | MAS3_SW |= MAS3_SX; > =20 > env->tlb_dirty =3D true; > @@ -218,7 +228,7 @@ static void mpc8544ds_cpu_reset(void *opaque) > env->gpr[1] =3D (16<<20) - 8; > env->gpr[3] =3D bi->dt_base; > env->nip =3D bi->entry; > - mmubooke_create_initial_mapping(env, 0, 0); > + mmubooke_create_initial_mapping(env); > } > =20 > static void mpc8544ds_init(ram_addr_t ram_size, > @@ -374,13 +384,15 @@ static void mpc8544ds_init(ram_addr_t ram_size, > /* If we're loading a kernel directly, we must load the device tre= e too. */ > if (kernel_filename) { > struct boot_info *boot_info; > + int dt_size; > =20 > #ifndef CONFIG_FDT > cpu_abort(env, "Compiled without FDT support - can't load kern= el\n"); > #endif > - dt_base =3D (kernel_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK; > - if (mpc8544_load_device_tree(env, dt_base, ram_size, > - initrd_base, initrd_size, kernel_cmdline) < 0) { > + dt_base =3D (loadaddr + kernel_size + DTC_LOAD_PAD) & ~DTC_PAD= _MASK; > + dt_size =3D mpc8544_load_device_tree(env, dt_base, ram_size, i= nitrd_base, > + initrd_size, kernel_cmdline= ); > + if (dt_size < 0) { > fprintf(stderr, "couldn't load device tree\n"); > exit(1); > } > @@ -388,6 +400,7 @@ static void mpc8544ds_init(ram_addr_t ram_size, > boot_info =3D env->load_info; This is turned into cpu->load_info in my series. Since this patch is not marked 1.1, please ack and apply my patches first, so that we don't run into conflicts with qom-next. Thanks. Andreas > boot_info->entry =3D entry; > boot_info->dt_base =3D dt_base; > + boot_info->dt_size =3D dt_size; > } > =20 > if (kvm_enabled()) { --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg