From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:49319) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SaSG2-0000Cz-Pm for qemu-devel@nongnu.org; Fri, 01 Jun 2012 09:51:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SaSFw-0006jd-Eg for qemu-devel@nongnu.org; Fri, 01 Jun 2012 09:51:14 -0400 Received: from cantor2.suse.de ([195.135.220.15]:34685 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SaSFw-0006hw-4i for qemu-devel@nongnu.org; Fri, 01 Jun 2012 09:51:08 -0400 Message-ID: <4FC8C8C5.80702@suse.de> Date: Fri, 01 Jun 2012 15:51:01 +0200 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1338521008-12740-1-git-send-email-peter.crosthwaite@petalogix.com> In-Reply-To: <1338521008-12740-1-git-send-email-peter.crosthwaite@petalogix.com> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v4] target-microblaze: lwx/swx: first implementation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Peter A. G. Crosthwaite" Cc: edgar.iglesias@gmail.com, david.holsgrove@petalogix.com, qemu-devel@nongnu.org, john.williams@petalogix.com Am 01.06.2012 05:23, schrieb Peter A. G. Crosthwaite: > Signed-off-by: Peter A. G. Crosthwaite > --- > changed from v3: > simplified tcg local variable usage aqcross branch > changed from v2: > fixed tcg local variable usage across branch > reworked carry logic (with new write_carryi() function) > made LOG_DIS show lwx swx properly > changed from v1: > implemented reservation address checking > created new cpu state variable specifically for reservation address/fla= g state >=20 > target-microblaze/cpu.c | 1 + > target-microblaze/cpu.h | 4 ++ > target-microblaze/helper.c | 2 + > target-microblaze/translate.c | 62 +++++++++++++++++++++++++++++++++= ++++--- > 4 files changed, 64 insertions(+), 5 deletions(-) >=20 > diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c > index 9c3b74e..34b3a9b 100644 > --- a/target-microblaze/cpu.c > +++ b/target-microblaze/cpu.c > @@ -39,6 +39,7 @@ static void mb_cpu_reset(CPUState *s) > mcc->parent_reset(s); > =20 > memset(env, 0, offsetof(CPUMBState, breakpoints)); > + env->res_addr =3D RES_ADDR_NONE; > tlb_flush(env, 1); > =20 > /* Disable stack protector. */ Note that my idea for structuring mb_cpu_reset() was to group the "duplicated common" functionality there that would get moved into the base class' reset function once no longer dependent on "env". Not a blocker for this patch but if you have to send a v2 anyway. Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg