From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:41003) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScRM3-0004zO-Ov for qemu-devel@nongnu.org; Wed, 06 Jun 2012 21:17:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ScRM1-00070M-D5 for qemu-devel@nongnu.org; Wed, 06 Jun 2012 21:17:39 -0400 Received: from mail-ob0-f173.google.com ([209.85.214.173]:62223) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ScRM1-0006xq-6R for qemu-devel@nongnu.org; Wed, 06 Jun 2012 21:17:37 -0400 Received: by mail-ob0-f173.google.com with SMTP id wd20so141854obb.4 for ; Wed, 06 Jun 2012 18:17:36 -0700 (PDT) Message-ID: <4FD00129.6060505@codemonkey.ws> Date: Thu, 07 Jun 2012 09:17:29 +0800 From: Anthony Liguori MIME-Version: 1.0 References: <1338859366-20689-1-git-send-email-afaerber@suse.de> In-Reply-To: <1338859366-20689-1-git-send-email-afaerber@suse.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PULL] QOM CPUState, part 3: cpu_state_reset() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?QW5kcmVhcyBGw6RyYmVy?= Cc: Blue Swirl , qemu-devel@nongnu.org, =?UTF-8?B?QXVyw6lsaWVuIEphcm5v?= On 06/05/2012 09:21 AM, Andreas Färber wrote: > Hello Anthony, > > Please pull the next batch of QOM CPUState conversions cherry-picked from > qom-next branch. > > These are more than 50 but all pretty trivial and a self-contained series. Pulled. Thanks. Regards, Anthony Liguori > As before, there are sh4 and mips parts that didn't get ack'ed. > I tested them to the best of my abilities where test images were available. > > After this PULL, these should be the only occurrences of cpu_state_reset(): > target-mips/cpu.c: cpu_state_reset(env); > target-mips/cpu.h:void cpu_state_reset(CPUMIPSState *s); > target-mips/translate.c:void cpu_state_reset(CPUMIPSState *env) > The idea is to eliminate this last occurrence when subclasses for TYPE_MIPS_CPU > have been introduced. > > Known conflicts: > > * ppc AREG0 series (I've provided Alex with a rebased version in advance) > * target-or32 > > Outlook: > > Not included in this PULL are 22 follow-ups for ARM that clean up some > ugliness introduced here and that prepare for QOM CPUState part 4. > Not included either is 1 Xen patch cherry-picked from part 4. > > Apart from these there's 28 more patches on qom-next plus a handful that I've > been modifying on my GitHub "realize" branch. Many if not all of those can be > pulled in parallel to this one, coming up next. :) > > Regards, > Andreas > > Cc: Anthony Liguori > Cc: Blue Swirl > > Cc: Aurélien Jarno > > The following changes since commit 8cc9b43f7c5f826b39af4b012ad89bb55faac29c: > > target-microblaze: lwx/swx: first implementation (2012-06-04 10:19:46 +0200) > > are available in the git repository at: > git://repo.or.cz/qemu/afaerber.git qom-cpu-3 > > Andreas Färber (74): > target-arm: Use cpu_reset() in cpu_arm_init() > pxa2xx: Use cpu_arm_init() and store ARMCPU > omap: Use cpu_arm_init() to store ARMCPU in omap_mpu_state_s > armv7m: Use cpu_arm_init() to obtain ARMCPU > armv7m: Pass ARMCPU to armv7m_reset() > arm_boot: Pass ARMCPU to do_cpu_reset() > target-lm32: Let cpu_lm32_init() return LM32CPU > lm32_boards: Use cpu_lm32_init() to obtain LM32CPU > lm32_boards: Store LM32CPU in ResetInfo > milkymist: Use cpu_lm32_init() to obtain LM32CPU > milkymist: Store LM32 in ResetInfo > target-xtensa: Let cpu_xtensa_init() return XtensaCPU > xtensa_sim: Use cpu_xtensa_init() to obtain XtensaCPU > xtensa_sim: Pass XtensaCPU to sim_reset() > xtensa_lx60: Use cpu_xtensa_init() to obtain XtensaCPU > xtensa_lx60: Pass XtensaCPU to lx60_reset() > target-cris: Reindent cpu_cris_init() > target-cris: Let cpu_cris_init() return CRISCPU > axis_dev88: Use cpu_cris_init() to obtain CRISCPU > cris-boot: Pass CRISCPU to cris_load_image() > cris-boot: Pass CRISCPU to main_cpu_reset(). > target-microblaze: Let cpu_mb_init() return MicroBlazeCPU > petalogix_ml605: Use cpu_mb_init() to obtain MicroBlazeCPU > petalogix_s3adsp1800_mmu: Use cpu_mb_init() to obtain MicroBlazeCPU > microblaze_boot: Pass MicroBlazeCPU to microblaze_load_kernel() > target-i386: Pass X86CPU to do_cpu_{init,sipi}() > target-i386: Let cpu_x86_init() return X86CPU > pc: Use cpu_x86_init() to obtain X86CPU > pc: Pass X86CPU to pc_cpu_reset() > target-sh4: Let cpu_sh4_init() return SuperHCPU > r2d: Use cpu_sh4_init() to obtain SuperHCPU > r2d: Store SuperHCPU in ResetData > target-mips: Use cpu_reset() in cpu_mips_init() > target-mips: Use cpu_reset() in do_interrupt() > target-mips: Let cpu_mips_init() return MIPSCPU > mips_fulong2e: Use cpu_mips_cpu() to obtain MIPSCPU > mips_fulong2e: Pass MIPSCPU to main_cpu_reset() > mips_jazz: Use cpu_mips_init() to obtain MIPSCPU > mips_jazz: Pass MIPSCPU to main_cpu_reset() > mips_malta: Use cpu_mips_init() to obtain MIPSCPU > mips_malta: Pass MIPSCPU to main_cpu_reset() > mips_mipssim: Use cpu_mips_init() to obtain MIPSCPU > mips_mipssim: Store MIPSCPU in ResetData > mips_r4k: Use cpu_mips_init() to obtain MIPSCPU > mips_r4k: Store MIPSCPU in ResetData > target-ppc: Let cpu_ppc_init() return PowerPCCPU > ppce500_mpc8544ds: Pass PowerPCCPU to mpc8544ds_cpu_reset[_sec] > spapr: Use cpu_ppc_init() to obtain PowerPCCPU > spapr: Pass PowerPCCPU to spapr_cpu_reset() > ppc440_bamboo: Use cpu_ppc_init() to obtain PowerPCCPU > ppc440_bamboo: Pass PowerPCCPU to main_cpu_reset() > ppc4xx_devs: Use cpu_ppc_init() to obtain PowerPCCPU > ppc4xx_devs: Pass PowerPCCPU to ppc4xx_reset() > ppc_newworld: Use cpu_ppc_init() to obtain PowerPCCPU > ppc_newworld: Pass PowerPCCPU to ppc_core99_reset() > ppc_oldworld: Use cpu_ppc_init() to obtain PowerPCCPU > ppc_oldworld: Pass PowerPCCPU to ppc_heathrow_reset() > ppc_prep: Use cpu_ppc_init() to obtain PowerPCCPU > ppc_prep: Pass PowerPCCPU to ppc_prep_reset() > virtex_ml507: Use cpu_ppc_init() to obtain PowerPCCPU > virtex_ml507: Let ppc440_init_xilinx() return PowerPCCPU > virtex_ml507: Pass PowerPCCPU to main_cpu_reset() > cpu-exec: Use cpu_reset() in cpu_exec() for TARGET_PPC > target-sparc: Let cpu_sparc_init() return SPARCCPU > sun4m: Use cpu_sparc_init() to obtain SPARCCPU > sun4m: Pass SPARCCPU to {main,secondary}_cpu_reset() > sun4u: Use cpu_sparc_init() to obtain SPARCCPU > sun4u: Let cpu_devinit() return SPARCCPU > sun4u: Store SPARCCPU in ResetData > leon3: Use cpu_sparc_init() to obtain SPARCCPU > leon3: Store SPARCCPU in ResetData > bsd-user: Use cpu_reset() in after cpu_init() > linux-user: Use cpu_reset() after cpu_init() / cpu_copy() > Kill off cpu_state_reset() > > bsd-user/main.c | 2 +- > cpu-all.h | 1 - > cpu-exec.c | 9 ++- > hw/arm_boot.c | 9 ++- > hw/armv7m.c | 15 ++++-- > hw/axis_dev88.c | 6 ++- > hw/cris-boot.c | 10 ++-- > hw/cris-boot.h | 2 +- > hw/leon3.c | 14 +++-- > hw/lm32_boards.c | 18 ++++--- > hw/mainstone.c | 2 +- > hw/microblaze_boot.c | 16 +++--- > hw/microblaze_boot.h | 4 +- > hw/milkymist.c | 12 +++-- > hw/mips_fulong2e.c | 13 +++-- > hw/mips_jazz.c | 13 +++-- > hw/mips_malta.c | 15 ++++-- > hw/mips_mipssim.c | 15 +++-- > hw/mips_r4k.c | 15 +++-- > hw/nseries.c | 6 +- > hw/omap.h | 2 +- > hw/omap1.c | 20 ++++--- > hw/omap2.c | 8 ++-- > hw/omap_sx1.c | 2 +- > hw/palm.c | 2 +- > hw/pc.c | 19 ++++--- > hw/petalogix_ml605_mmu.c | 10 +++- > hw/petalogix_s3adsp1800_mmu.c | 10 +++- > hw/ppc440_bamboo.c | 13 +++-- > hw/ppc4xx_devs.c | 13 +++-- > hw/ppc_newworld.c | 13 +++-- > hw/ppc_oldworld.c | 13 +++-- > hw/ppc_prep.c | 13 +++-- > hw/ppce500_mpc8544ds.c | 21 +++++--- > hw/pxa.h | 2 +- > hw/pxa2xx.c | 40 +++++++------- > hw/r2d.c | 18 ++++--- > hw/spapr.c | 14 +++-- > hw/spitz.c | 2 +- > hw/sun4m.c | 20 +++++--- > hw/sun4u.c | 25 ++++++---- > hw/tosa.c | 2 +- > hw/virtex_ml507.c | 27 ++++++---- > hw/xtensa_lx60.c | 15 +++-- > hw/xtensa_sim.c | 17 ++++-- > hw/z2.c | 2 +- > linux-user/main.c | 2 +- > linux-user/syscall.c | 2 +- > target-arm/helper.c | 7 +-- > target-cris/cpu.h | 12 ++++- > target-cris/translate.c | 110 ++++++++++++++++++++--------------------- > target-i386/cpu.h | 16 +++++-- > target-i386/helper.c | 23 ++++----- > target-i386/kvm.c | 6 ++- > target-lm32/cpu.c | 2 +- > target-lm32/cpu.h | 12 ++++- > target-lm32/helper.c | 10 +--- > target-m68k/helper.c | 5 -- > target-microblaze/cpu.h | 12 ++++- > target-microblaze/translate.c | 18 ++----- > target-mips/cpu.h | 15 +++++- > target-mips/helper.c | 3 +- > target-mips/translate.c | 6 +- > target-ppc/cpu.h | 12 ++++- > target-ppc/helper.c | 9 +--- > target-s390x/helper.c | 9 +--- > target-sh4/cpu.h | 12 ++++- > target-sh4/translate.c | 9 +--- > target-sparc/cpu.c | 9 +--- > target-sparc/cpu.h | 17 +++++- > target-xtensa/cpu.c | 2 +- > target-xtensa/cpu.h | 16 +++++- > target-xtensa/helper.c | 9 +--- > 73 files changed, 516 insertions(+), 389 deletions(-) > >