From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:34766) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sf822-0005AM-JC for qemu-devel@nongnu.org; Thu, 14 Jun 2012 07:16:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Sf81v-0000vz-VW for qemu-devel@nongnu.org; Thu, 14 Jun 2012 07:16:06 -0400 Received: from mx1.redhat.com ([209.132.183.28]:40269) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Sf81v-0000uy-Ms for qemu-devel@nongnu.org; Thu, 14 Jun 2012 07:15:59 -0400 Message-ID: <4FD9C7C4.9020709@redhat.com> Date: Thu, 14 Jun 2012 14:15:16 +0300 From: Orit Wasserman MIME-Version: 1.0 References: <4cc6c255d3c62a99c267c08901e9894ec9496abb.1337710679.git.quintela@redhat.com> In-Reply-To: <4cc6c255d3c62a99c267c08901e9894ec9496abb.1337710679.git.quintela@redhat.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 4/7] Only TCG needs TLB handling List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Juan Quintela Cc: chegu_vinod@hp.com, qemu-devel@nongnu.org On 05/22/2012 09:32 PM, Juan Quintela wrote: > Refactor the code that is only needed for tcg to an static function. > Call that only when tcg is enabled. We can't refactor to a dummy > function in the kvm case, as qemu can be compiled at the same time > with tcg and kvm. > > Signed-off-by: Juan Quintela > --- > exec.c | 31 +++++++++++++++++++++---------- > 1 files changed, 21 insertions(+), 10 deletions(-) > > diff --git a/exec.c b/exec.c > index a0494c7..b6c7675 100644 > --- a/exec.c > +++ b/exec.c > @@ -1943,11 +1943,29 @@ void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr) > TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *)); > } > > +static void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t end, > + uintptr_t length) > +{ > + uintptr_t start1; > + > + /* we modify the TLB cache so that the dirty bit will be set again > + when accessing the range */ > + start1 = (uintptr_t)qemu_safe_ram_ptr(start); > + /* Check that we don't span multiple blocks - this breaks the > + address comparisons below. */ > + if ((uintptr_t)qemu_safe_ram_ptr(end - 1) - start1 > + != (end - 1) - start) { > + abort(); > + } > + cpu_tlb_reset_dirty_all(start1, length); > + > +} > + > /* Note: start and end must be within the same ram block. */ > void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end, > int dirty_flags) > { > - uintptr_t length, start1; > + uintptr_t length; > > start &= TARGET_PAGE_MASK; > end = TARGET_PAGE_ALIGN(end); > @@ -1957,16 +1975,9 @@ void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end, > return; > cpu_physical_memory_mask_dirty_range(start, length, dirty_flags); > > - /* we modify the TLB cache so that the dirty bit will be set again > - when accessing the range */ > - start1 = (uintptr_t)qemu_safe_ram_ptr(start); > - /* Check that we don't span multiple blocks - this breaks the > - address comparisons below. */ > - if ((uintptr_t)qemu_safe_ram_ptr(end - 1) - start1 > - != (end - 1) - start) { > - abort(); > + if (tcg_enabled()) { > + tlb_reset_dirty_range_all(start, end, length); > } > - cpu_tlb_reset_dirty_all(start1, length); > } > > int cpu_physical_memory_set_dirty_tracking(int enable) Reviewed-by: Orit Wasserman