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From: Maksim Kozlov <m.kozlov@samsung.com>
To: Dunrong Huang <riegamaths@gmail.com>
Cc: peter.maydell@linaro.org, kyungmin.park@samsung.com,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v3 1/2] ARM: exynos4210: CMU support
Date: Wed, 04 Jul 2012 17:45:20 +0400	[thread overview]
Message-ID: <4FF448F0.4050809@samsung.com> (raw)
In-Reply-To: <CAOZVR5a52ijcZXw7Y7zJPjTwV_rr8aBrVJHZiUSzMfJ1Au6ZBg@mail.gmail.com>

04.07.2012 14:38, Dunrong Huang пишет:

>> +void exynos4210_register_clock_handler(ClockChangeHandler *func,
>> +                                       Exynos4210Clock clock_id, void *opaque)
>> +{
>> +    ClockChangeEntry *cce = g_malloc0(sizeof(ClockChangeEntry));
>> +    Exynos4210ClockState *clock = exynos4210_clock_find(clock_id);
>> +
>> +    if (clock == NULL) {
>> +        hw_error("We aren't be able to find clock %d\n", clock_id);
>> +    } else if (clock->cmu_id == UNSPECIFIED_CMU) {
>> +
>> +        PRINT_DEBUG("Clock %s never are changed. Handler won't be set.",
>> +                    exynos4210_clock[clock_id]->name);
>> +
>> +        return;
>> +    }
>> +
>> +    cce->func = func;
>> +    cce->opaque = opaque;
>> +
>> +    QTAILQ_INSERT_TAIL(&clock->clock_change_handler, cce, entry);
>> +
>> +    PRINT_DEBUG("For %s have been set handler [%p]\n", clock->name, cce->func);
>> +
>> +    return;
> Dont need to return.

Agree

>> +
>> +static void exynos4210_cmu_set_pll(void *opaque, Exynos4210ClockState *pll)
>> +{
>> +    Exynos4210CmuState *s = opaque;
>> +    Exynos4210ClockState *source;
>> +    target_phys_addr_t offset = pll->div_reg;
>> +    ClockChangeEntry *cce;
>> +    uint32_t pdiv, mdiv, sdiv, enable;
>> +
>> +    source = exynos4210_clock_find(pll->src_id);
>> +
>> +    if (source == NULL) {
>> +        hw_error("We haven't find source clock %d (requested for %s)\n",
>> +                 pll->src_id, pll->name);
>> +    }
>> +
>> +    /*
>> +     * FOUT = MDIV * FIN / (PDIV * 2^(SDIV-1))
>> +     */
>> +
>> +    enable = (s->reg[I_(offset)]&  PLL_ENABLE_MASK)>>  PLL_ENABLE_SHIFT;
>> +    mdiv   = (s->reg[I_(offset)]&  PLL_MDIV_MASK)>>  PLL_MDIV_SHIFT;
>> +    pdiv   = (s->reg[I_(offset)]&  PLL_PDIV_MASK)>>  PLL_PDIV_SHIFT;
>> +    sdiv   = (s->reg[I_(offset)]&  PLL_SDIV_MASK)>>  PLL_SDIV_SHIFT;
>> +
>> +    if (source) {
>> +        if (enable) {
>> +            pll->rate = mdiv * source->rate / (pdiv * (1<<  (sdiv-1)));
>> +        } else {
>> +            pll->rate = 0;
>> +        }
>> +    } else {
>> +        hw_error("%s: Source undefined for %s\n", __func__, pll->name);
>> +    }
>> +
>> +    QTAILQ_FOREACH(cce,&pll->clock_change_handler, entry) {
>> +        cce->func(cce->opaque);
>> +    }
>> +
>> +    PRINT_DEBUG("%s rate: %llu\n", pll->name, pll->rate);
> pll->rate is of type uint64_t incompatible with "%llu"

Type uint64_t is included from /usr/include/stdint.h as

typedef unsigned long long int	uint64_t;

and 'll' specifies that a following 'u' conversion specifier applies to 
a unsigned long long argument

Why do you think they incompatible?


--
MK

  reply	other threads:[~2012-07-04 13:45 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-04  9:21 [Qemu-devel] [PATCH v3 0/2] ARM: Samsung Exynos4210 CMU support Maksim Kozlov
2012-07-04  9:22 ` [Qemu-devel] [PATCH v3 1/2] ARM: exynos4210: " Maksim Kozlov
2012-07-04 10:38   ` Dunrong Huang
2012-07-04 13:45     ` Maksim Kozlov [this message]
2012-07-04 13:54       ` Peter Maydell
2012-07-04 14:12         ` Maksim Kozlov
2012-07-04 14:14       ` Dunrong Huang
2012-07-04 14:53         ` Maksim Kozlov
2012-07-04  9:22 ` [Qemu-devel] [PATCH v3 2/2] exynos4210: UART: Added using of CMU-callback functionality Maksim Kozlov

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