From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36169) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SpMVZ-0001VF-CU for qemu-devel@nongnu.org; Thu, 12 Jul 2012 12:44:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SpMVY-0004Rp-CZ for qemu-devel@nongnu.org; Thu, 12 Jul 2012 12:44:53 -0400 Received: from mailout4.w1.samsung.com ([210.118.77.14]:58405) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SpMVY-0004RY-6g for qemu-devel@nongnu.org; Thu, 12 Jul 2012 12:44:52 -0400 Received: from eusync2.samsung.com (mailout4.w1.samsung.com [210.118.77.14]) by mailout4.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M72000P93VRA3B0@mailout4.w1.samsung.com> for qemu-devel@nongnu.org; Thu, 12 Jul 2012 17:45:27 +0100 (BST) Received: from [106.109.9.187] by eusync2.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0M72000CF3UMQ180@eusync2.samsung.com> for qemu-devel@nongnu.org; Thu, 12 Jul 2012 17:44:46 +0100 (BST) Date: Thu, 12 Jul 2012 20:44:42 +0400 From: Maksim Kozlov In-reply-to: <1341589767-9895-5-git-send-email-m.kozlov@samsung.com> Message-id: <4FFEFEFA.40904@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=UTF-8; format=flowed Content-transfer-encoding: QUOTED-PRINTABLE References: <1341589767-9895-1-git-send-email-m.kozlov@samsung.com> <1341589767-9895-5-git-send-email-m.kozlov@samsung.com> Subject: Re: [Qemu-devel] [PATCH 4/4] ARM: exynos4210_pmu: Add software reset support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, kyungmin.park@samsung.com, qemu-devel@nongnu.org I didn't delete comment in this file. This comment become irrelevant= =20 after apply this patch. I'll send new patch set. 06.07.2012 19:49, Maksim Kozlov =D0=BF=D0=B8=D1=88=D0=B5=D1=82: > Signed-off-by: Maksim Kozlov > --- > hw/exynos4210_pmu.c | 34 +++++++++++++++++++++++++++++++++- > 1 files changed, 33 insertions(+), 1 deletions(-) > > diff --git a/hw/exynos4210_pmu.c b/hw/exynos4210_pmu.c > index 7f09c79..2ae3b60 100644 > --- a/hw/exynos4210_pmu.c > +++ b/hw/exynos4210_pmu.c > @@ -25,6 +25,7 @@ > */ > > #include "sysbus.h" > +#include "sysemu.h" > > #ifndef DEBUG_PMU > #define DEBUG_PMU 0 > @@ -230,6 +231,8 @@ > > #define EXYNOS4210_PMU_REGS_MEM_SIZE 0x3d0c > > +#define SWRESET_SYSTEM_MASK 0x00000001 > + > typedef struct Exynos4210PmuReg { > const char *name; /* for debug only */ > uint32_t offset; > @@ -458,7 +461,17 @@ static void exynos4210_pmu_write(void *opaque,= target_phys_addr_t offset, > PRINT_DEBUG_EXTEND("%s [0x%04x]<- 0x%04x\n", > exynos4210_pmu_regs[index].name, (uint32_t)offset, (= uint32_t)val); > > - s->reg[index] =3D val; > + switch (offset) { > + case SWRESET: > + if (val& SWRESET_SYSTEM_MASK) { > + s->reg[index] =3D val; > + qemu_system_reset_request(); > + } > + break; > + default: > + s->reg[index] =3D val; > + break; > + } > } > > static const MemoryRegionOps exynos4210_pmu_ops =3D { > @@ -477,9 +490,28 @@ static void exynos4210_pmu_reset(DeviceState *= dev) > Exynos4210PmuState *s =3D > container_of(dev, Exynos4210PmuState, busdev.qdev); > unsigned i; > + uint32_t index =3D exynos4210_pmu_get_register_index(s, SWRESE= T); > + uint32_t swreset =3D s->reg[index]; > > /* Set default values for registers */ > for (i =3D 0; i< PMU_NUM_OF_REGISTERS; i++) { > + if (swreset) { > + switch (exynos4210_pmu_regs[i].offset) { > + case INFORM0: > + case INFORM1: > + case INFORM2: > + case INFORM3: > + case INFORM4: > + case INFORM5: > + case INFORM6: > + case INFORM7: > + case PS_HOLD_CONTROL: > + /* keep these registers during SW reset */ > + continue; > + default: > + break; > + } > + } > s->reg[i] =3D exynos4210_pmu_regs[i].reset_value; > } > }