From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NFXXc-0004jZ-S5 for qemu-devel@nongnu.org; Tue, 01 Dec 2009 13:33:36 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NFXXX-0004iu-B3 for qemu-devel@nongnu.org; Tue, 01 Dec 2009 13:33:35 -0500 Received: from [199.232.76.173] (port=43020 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NFXXX-0004ir-55 for qemu-devel@nongnu.org; Tue, 01 Dec 2009 13:33:31 -0500 Received: from mail-fx0-f219.google.com ([209.85.220.219]:45243) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NFXXW-0000r2-K2 for qemu-devel@nongnu.org; Tue, 01 Dec 2009 13:33:30 -0500 Received: by fxm19 with SMTP id 19so5020209fxm.17 for ; Tue, 01 Dec 2009 10:33:28 -0800 (PST) MIME-Version: 1.0 Date: Tue, 1 Dec 2009 21:33:28 +0300 Message-ID: <4aa8564b0912011033n68653e6dufc4bd87ccaf030a5@mail.gmail.com> From: Dima Ilyevsky Content-Type: multipart/alternative; boundary=0016e6d7e32d830d260479aefe46 Subject: [Qemu-devel] TBL register permissions for PPC List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org --0016e6d7e32d830d260479aefe46 Content-Type: text/plain; charset=UTF-8 Hello All, I have a question about read permissions of TBL SPR for all ppc processors: I have discovered that my application, compiled by WindRiver diab compiler and running in vxworks OS on ppc405 architecture bumps into exception generated when trying to read TBL or TBU registers: program Exception current instruction address: 0x0003eb28 Machine Status Register: 0x00088200 Condition Register: 0x40000440 <<<<>>>> ..... <<<<>>>> 0x3eb08 4e800020 blr 0x3eb0c 3860ffff li r3,0xffff # -1 0x3eb10 4e800020 blr 0x3eb14 38a00000 li r5,0x0 # 0 0x3eb18 7cbc43a6 mtspr TBL,r5 0x3eb1c 7c7d43a6 mtspr TBU,r3 0x3eb20 7c9c43a6 mtspr TBL,r4 0x3eb24 4e800020 blr *0x3eb28 7cbd42a6 mfspr r5,TBU 0x3eb2c 7cdc42a6 mfspr r6,TBL 0x3eb30 7cfd42a6 mfspr r7,TBU 0x3eb34 7c053800 cmp crf0,0,r5,r7 0x3eb38 4082fff0 bc 0x4,2, 0x3eb28 # vxTimeBaseGet 0x3eb3c 90a30000 stw r5,0(r3) 0x3eb40 90c40000 stw r6,0(r4) 0x3eb44 4e800020 blr <<<<>>>> ...... I looked into qemu mfspr instruction implementation and discovered that for some reason qemu had set NOACCESS permissions for reading this register upon CPU initialization: /* Generic PowerPC time base */ static void gen_tbl (CPUPPCState *env) { spr_register(env, SPR_VTBL, "TBL", &spr_read_tbl, SPR_NOACCESS, &spr_read_tbl, SPR_NOACCESS, 0x00000000); spr_register(env, SPR_TBL, "TBL", *SPR_NOACCESS*, SPR_NOACCESS, *SPR_NOACCESS*, &spr_write_tbl, 0x00000000); spr_register(env, SPR_VTBU, "TBU", &spr_read_tbu, SPR_NOACCESS, &spr_read_tbu, SPR_NOACCESS, 0x00000000); spr_register(env, SPR_TBU, "TBU", *SPR_NOACCESS*, SPR_NOACCESS, *SPR_NOACCESS*, &spr_write_tbu, 0x00000000); } Is this a right thing to do? it's certainly either qemu bug or diab bug (which i don't think is likely, cause this code has been running on the real hw without any issues) BR, Dmitry I. -- Jonathan Swift - "May you live every day of your life." --0016e6d7e32d830d260479aefe46 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Hello All,

I have a question about read permissions of T= BL SPR for all ppc processors:
I have discovered that my applicat= ion, compiled by WindRiver diab compiler and running in vxworks OS on ppc40= 5 architecture bumps into exception generated when trying to read TBL or TB= U registers:


progr= am
Exception current instruction address: 0x0003eb28
Machine Status Register: 0x00088200
Co= ndition Register: 0x40000440

<<<<<Registers>>>>>

.....

<= div><<<<<Disassembly>>>>>

=C2=A00x3eb08 =C2=A04e800020 =C2=A0 =C2=A0blr
=C2=A00x3eb0c =C2=A03860ffff =C2=A0 =C2=A0li =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0r3,0xffff # -1
=C2=A00x3eb10 =C2=A04e800020 =C2= =A0 =C2=A0blr
=C2=A00x3eb14 =C2=A038a00000 =C2=A0 =C2= =A0li =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0r5,0x0 # 0
=C2= =A00x3eb18 =C2=A07cbc43a6 =C2=A0 =C2=A0mtspr =C2=A0 =C2=A0 =C2=A0 TBL,r5
=C2=A00x3eb1c =C2=A07c7d43a6 =C2=A0 =C2=A0mtspr =C2=A0 =C2= =A0 =C2=A0 TBU,r3
=C2=A00x3eb20 =C2=A07c9c43a6 =C2=A0 = =C2=A0mtspr =C2=A0 =C2=A0 =C2=A0 TBL,r4
=C2=A00x3eb24 = =C2=A04e800020 =C2=A0 =C2=A0blr
*0x3eb28 =C2=A07cbd42a= 6 =C2=A0 =C2=A0mfspr =C2=A0 =C2=A0 =C2=A0 r5,TBU
=C2=A00x3eb2c =C2=A07cdc42a6 =C2=A0 =C2=A0mfspr =C2=A0 =C2= =A0 =C2=A0 r6,TBL
=C2=A00x3eb30 =C2=A07cfd42a6 =C2=A0 = =C2=A0 mfspr =C2=A0 =C2=A0 =C2=A0 r7,TBU
=C2=A00x3eb34= =C2=A07c053800 =C2=A0 =C2=A0cmp =C2=A0 =C2=A0 =C2=A0 =C2=A0 crf0,0,r5,r7
=C2=A00x3eb38 =C2=A04082fff0 =C2=A0 =C2=A0 =C2=A0 bc = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A00x4,2, 0x3eb28 # vxTimeBaseGet
=C2=A00x3eb3c =C2=A090a30000 =C2=A0 =C2=A0stw =C2=A0 =C2=A0= =C2=A0 =C2=A0 r5,0(r3)
=C2=A00x3eb40 =C2=A090c40000 = =C2=A0 =C2=A0stw =C2=A0 =C2=A0 =C2=A0 =C2=A0 r6,0(r4)
= =C2=A00x3eb44 =C2=A04e800020 =C2=A0 =C2=A0blr

<<<<<Traceback>>>>>
......

I looked into qemu = mfspr instruction implementation and discovered that for some reason qemu h= ad set NOACCESS permissions for reading this register upon CPU initializati= on:

/* Generic PowerPC t= ime base */
static void gen_tbl (CPUPPCState *env)
{
=C2=A0=C2=A0 =C2=A0spr_register(env,= SPR_VTBL, =C2=A0"TBL",
=C2=A0=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 &spr_read_tbl, SPR_NOACCESS,<= /div>
=C2=A0=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 &spr_read_tbl, SPR_NOACCESS,
=C2=A0=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 0x00000000);
=C2=A0=C2=A0 =C2=A0spr_register(env, = SPR_TBL, =C2=A0 "TBL",
=C2=A0=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 SPR_NOACCESS, SPR_NOACCESS= ,
=C2=A0=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 SPR_NOACCESS, &spr_write_tbl,
=C2=A0=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 0x00000000);
=C2=A0=C2=A0 =C2=A0spr_register(env, = SPR_VTBU, =C2=A0"TBU",
=C2=A0=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 &spr_read_tbu, SPR_NOACCESS,<= /div>
=C2=A0=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 &spr_read_tbu, SPR_NOACCESS,
=C2=A0=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 0x00000000);
=C2=A0=C2=A0 =C2=A0spr_register(env, = SPR_TBU, =C2=A0 "TBU",
=C2=A0=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 SPR_NOACCESS, SPR_NOACCESS= ,
=C2=A0=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 SPR_NOACCESS, &spr_write_tbu,
=C2=A0=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 0x00000000);
}

Is this a right thing to do? it's certainly either qemu bug or= diab bug (which i don't think is likely, cause this code has been runn= ing on the real hw without any issues)


BR,
Dmitry I.
--

Jonathan Swift =C2=A0- "May you live every da= y of your life."
--0016e6d7e32d830d260479aefe46--