POWER specification docs define TBL/TBU SPRs as readable in user and privileged modes. Therefore SPRs permissions were changed in gen_tbl function in target-ppc/translate_init.c file.

Dmitry Ilyevsky

On Wed, Dec 2, 2009 at 2:23 AM, Alexander Graf <agraf@suse.de> wrote:

On 01.12.2009, at 19:33, Dima Ilyevsky wrote:

> Hello All,
>
> I have a question about read permissions of TBL SPR for all ppc processors:
> I have discovered that my application, compiled by WindRiver diab compiler and running in vxworks OS on ppc405 architecture bumps into exception generated when trying to read TBL or TBU registers:

Unless Linux does something funky, mftlb, mftbu (and mftb on 64 bit) are readable from PR=1.

int main()
{
long tbu=0, tbl=0;

asm("mftbu %0" : "=r" (tbu));
asm("mftbl %0" : "=r" (tbl));

printf("TB: %#x %#x\n", tbl, tbu);
}

agraf@lychee:/tmp> ./mftb
TB: 0xc0397180 0x603

However it can't be written to:

asm("mttbl %0" : : "r" (tbl));

agraf@lychee:/tmp> ./mftb
Illegal instruction

So yes, I'd suspect a bug in qemu here. Feel free to send a patch.

Alex