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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-367cde7e1b3sm163587f8f.20.2024.07.08.09.08.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 08 Jul 2024 09:08:13 -0700 (PDT) Message-ID: <4ab5d46c-ac4d-461f-a571-4f0d33554f26@redhat.com> Date: Mon, 8 Jul 2024 18:08:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 13/19] hw/arm/smmu: Introduce smmu_iotlb_inv_asid_vmid Content-Language: en-US To: Jean-Philippe Brucker , Mostafa Saleh Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org, qemu-devel@nongnu.org, alex.bennee@linaro.org, maz@kernel.org, nicolinc@nvidia.com, julien@xen.org, richard.henderson@linaro.org, marcin.juszkiewicz@linaro.org References: <20240701110241.2005222-1-smostafa@google.com> <20240701110241.2005222-14-smostafa@google.com> <20240704183312.GJ1693268@myrica> From: Eric Auger In-Reply-To: <20240704183312.GJ1693268@myrica> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.142, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/4/24 20:33, Jean-Philippe Brucker wrote: > On Mon, Jul 01, 2024 at 11:02:35AM +0000, Mostafa Saleh wrote: >> Soon, Instead of doing TLB invalidation by ASID only, VMID will be >> also required. >> Add smmu_iotlb_inv_asid_vmid() which invalidates by both ASID and VMID. >> >> However, at the moment this function is only used in SMMU_CMD_TLBI_NH_ASID >> which is a stage-1 command, so passing VMID = -1 keeps the original >> behaviour. >> >> Signed-off-by: Mostafa Saleh > One small issue: the change to hw/arm/trace-events for > trace_smmu_iotlb_inv_asid_vmid() should be in patch 13 rather than 14, > otherwise the series isn't bisectable. > > Reviewed-by: Jean-Philippe Brucker With Jean's comment addressed Reviewed-by: Eric Auger Eric > >> --- >> hw/arm/smmu-common.c | 20 +++++++++++++------- >> hw/arm/smmuv3.c | 2 +- >> include/hw/arm/smmu-common.h | 2 +- >> 3 files changed, 15 insertions(+), 9 deletions(-) >> >> diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c >> index 5bf9eadeff..d0309a95b2 100644 >> --- a/hw/arm/smmu-common.c >> +++ b/hw/arm/smmu-common.c >> @@ -159,13 +159,14 @@ void smmu_iotlb_inv_all(SMMUState *s) >> g_hash_table_remove_all(s->iotlb); >> } >> >> -static gboolean smmu_hash_remove_by_asid(gpointer key, gpointer value, >> - gpointer user_data) >> +static gboolean smmu_hash_remove_by_asid_vmid(gpointer key, gpointer value, >> + gpointer user_data) >> { >> - int asid = *(int *)user_data; >> + SMMUIOTLBPageInvInfo *info = (SMMUIOTLBPageInvInfo *)user_data; >> SMMUIOTLBKey *iotlb_key = (SMMUIOTLBKey *)key; >> >> - return SMMU_IOTLB_ASID(*iotlb_key) == asid; >> + return (SMMU_IOTLB_ASID(*iotlb_key) == info->asid) && >> + (SMMU_IOTLB_VMID(*iotlb_key) == info->vmid); >> } >> >> static gboolean smmu_hash_remove_by_vmid(gpointer key, gpointer value, >> @@ -270,10 +271,15 @@ void smmu_iotlb_inv_ipa(SMMUState *s, int vmid, dma_addr_t ipa, uint8_t tg, >> &info); >> } >> >> -void smmu_iotlb_inv_asid(SMMUState *s, int asid) >> +void smmu_iotlb_inv_asid_vmid(SMMUState *s, int asid, int vmid) >> { >> - trace_smmu_iotlb_inv_asid(asid); >> - g_hash_table_foreach_remove(s->iotlb, smmu_hash_remove_by_asid, &asid); >> + SMMUIOTLBPageInvInfo info = { >> + .asid = asid, >> + .vmid = vmid, >> + }; >> + >> + trace_smmu_iotlb_inv_asid_vmid(asid, vmid); >> + g_hash_table_foreach_remove(s->iotlb, smmu_hash_remove_by_asid_vmid, &info); >> } >> >> void smmu_iotlb_inv_vmid(SMMUState *s, int vmid) >> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c >> index e5ecd93258..928f125523 100644 >> --- a/hw/arm/smmuv3.c >> +++ b/hw/arm/smmuv3.c >> @@ -1329,7 +1329,7 @@ static int smmuv3_cmdq_consume(SMMUv3State *s) >> >> trace_smmuv3_cmdq_tlbi_nh_asid(asid); >> smmu_inv_notifiers_all(&s->smmu_state); >> - smmu_iotlb_inv_asid(bs, asid); >> + smmu_iotlb_inv_asid_vmid(bs, asid, -1); >> break; >> } >> case SMMU_CMD_TLBI_NH_ALL: >> diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h >> index de032fdfd1..2bc9a03d47 100644 >> --- a/include/hw/arm/smmu-common.h >> +++ b/include/hw/arm/smmu-common.h >> @@ -212,7 +212,7 @@ void smmu_iotlb_insert(SMMUState *bs, SMMUTransCfg *cfg, SMMUTLBEntry *entry); >> SMMUIOTLBKey smmu_get_iotlb_key(int asid, int vmid, uint64_t iova, >> uint8_t tg, uint8_t level); >> void smmu_iotlb_inv_all(SMMUState *s); >> -void smmu_iotlb_inv_asid(SMMUState *s, int asid); >> +void smmu_iotlb_inv_asid_vmid(SMMUState *s, int asid, int vmid); >> void smmu_iotlb_inv_vmid(SMMUState *s, int vmid); >> void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova, >> uint8_t tg, uint64_t num_pages, uint8_t ttl); >> -- >> 2.45.2.803.g4e1b14247a-goog >>